However, the invention is adapted for use, in general, in filtering applications or in synthesizing floating impedances through an ELF (Extremely Low Frequency) decoupled circuitry.

Description of the related art The instant description will extensively rely on acronyms/abbreviations that are common in the technical area considered. The following is a list of those acronyms/abbreviations provided by way of direct reference, along with short explanations of the corresponding meanings: xDSL X-Digital Subscriber Line POTS Plain Old Telephone Service PTSN'Public Switching Telecommunication Network ISDN Integrated Service Digital Network CO Central Office CPE Customer Premise Equipment DS Down Stream UP Upstream HV High Voltage LV Low Voltage LPF Low Pass Filter HPF High Pass Filter COMBO Integrated POTS and ADSL line cards PSD Power Spectral Density VCCS Voltage Controlled Current Source ELF Extremely Low Frequencies

PAD Phase Adjuster filter SMD Surface Mounted Device GIC Generalized Immittance Converter Figure 1 of the drawing shows the general layout of a"splitter"for xDSL systems that separates xDSL and POTS/ISDN systems by means of a bi-directional filtering action. The acronyms shown in the figure and the functions performed by the functional blocks designated thereby are well known to those of skill in the art, thus making it unnecessary to provide a detailed description herein XDSL technology can co-exist with other communication channels like POTS and ISDN, which share the same cable/loop placed between CO and CPE as shown in figure 1 The typical bandwidth used in xDSL applications ranges from 20-130KHz to l. llMHz whereas POTS/ISDN applications involve frequencies from DC to 20-130KHz.

Different signals are allocated in the low frequency band too (DC-50Hz), such as: --line test signals, - ringer, - dial pulsing, - on/off hook signals, and - in specific cases, billing tones (12-16KHz).

The basic requirements for a splitter are well known in the art, as witnessed e. g. by the above- referenced ITU-T Recommendation and by additional documents such as: ETSI TR 101 728 (V1. 1. 1) :"Access and Terminals (AT) ; Study for the specification of the low pass section of POTS/ADSL splitters".

ANSI T1. 413:"Network to Customer Installation Interfaces-Asymmetric Digital Subscriber Line (ADSL) Metallic Interface".

ETSI TS 101 388 (VI. 2.1) : "Transmission and Multiplexing (TM); Access transmission systems on metallic access cables".

ETSI TS 101 952 (V1. I. 1) :"Part 1: ADSL splitters for European deployment; Sub-part 3: Specification of ADSL/ISDN splitters".

ETSI TS 101 952 (V1. 1. 1) : Part 1 : ADSL splitters for European deployment; Sub-part 4: Specification of ADSL over"ISDN or POTS universal splitters.

ITU-T Brugge, Belgium, 17-21 June 2002:"Draft Rec. G. 992.3-ADSL2".

ITU-T Recommendation G. 992.5 ASYMMETRIC DIGITAL SUBSCRIBER LINE (ADSL) TRANSCEIVERS-EXTENDED BANDWIDTH ADSL2 (ADSL2plus).

COMMITTEE T1-TELECOMMUNICATIONS Working Group T1E1. 4 (DSL Access): Very-high-bit-rate Digital Subscriber Line (VDSL) Metallic Interface Part 1: Functional Requirements and Common Specification.

ETSI TS 101 952-2-3 vl. 1. 1 : "Part 2 : VDSL splitters for European deployment; Sub-part 3: Specification of VDSL/ISDN splitters for use at the Local Exchange (LE) and the user side near the Network Termination Port (NTP)".

ETSI TS 101 952-2-1 vl. 1. 1 : "Part 2: VDSL splitters for European deployment; Sub-part 1: Specification of the low pass part of VDSL/POTS splitters".

The basic aim of a splitter is to separate xDSL signals from POTS/ISDN signals. Specifically, the splitter attenuates spurious signals falling in the xDSL band due to POTS/ISDN events like on/off-hook, ringer, ring injection, ring trip dial pulses and so

on, while vice versa avoids that xDSL signals may reach the POTS/ISDN port showing high impedance in the xDSL band.

A splitter is usually comprised by a HPF and a LPF: the former is used as xDSL-loop interface by cutting out frequencies lower than 30KHz-130KHz, the latter acts as a POTS/ISDN-loop, interface avoiding noise injection in xDSL band (from POTS to loop) and providing, in the same bandwidth, an high impedance seen from loop to POTS.

Usually, ADSL CO modems already include a CO HPF.

In the rest of the instant description, the term splitter will apply primarily to the LPF part only.

Reference works such as, e. g. J. Cook and P. Sheppard:"ADSL and VDSL Splitter Design and Telephony Performance", IEEE Journal on selected areas in communications, Vol. 13, No. 9, December 1995, XDSL show that splitters can be are divided in passive and active categories.

In the passive case, the a huge presence of HV passive devices is necessary to produce a filter of adequate order (4-7)-see, e. g. US-B-6 144 735 or US-A-5 627 501.

In the active case-see, e. g. US-A-5 623 543 or US-B-6 628 783-active devices permit to reduce the order of the passive filter.

Other arrangements-see, e. g. US-5 627 501 (already cited in the foregoing) or US-A-5 889 856 require digital signal processing.

The inventors have observed that both the article of Cook and Sheppard and US-A-5 623 543 provide an active approach that implements high performance splitters based on GIC and a line voltage sensing with two HV capacitors. These arrangements do not take into

account complexity, density and power consumption (80mW quiescent power).

US-A-5 627 501 adopts a passive approach implemented with a low pass filter (LPF) plus a variable impedance circuit. A measurement unit placed on the ADSL side detects the LPF coil saturation and inserts additional impedance that limits the POTS 'current flow. This solution is not applicable for stand-alone splitter requiring the ADSL system supervision; additionally, expensive additional components such as switches must be added.

US-B-6 144 735 provides a solution based on a configurable filter. It makes extensive use of passive components plus an off-hook detector network that switches the splitter in two different filtering states.

US-B-6 628 783 provides an active solution without supply and able to suppress (with a depletion MOS device) high frequency spurious signals due to POTS events. It requires a HV MOS with low RON value and a 3rd order extra passive section to satisfy standard splitter requirements.

US-A-5 889 856 discloses a purely digital approach applicable only to COMBO arrangements that offer a single termination point on the CO-side. An analog splitter is not required but the complexity of the digital part is increased. Additionally, analog circuitry (which is not easy to integrate) is required provide DC feed, battery voltage and ring. object and summary of the invention The object of the present invention is thus to provide an improved solution dispensing with the intrinsic disadvantages of the prior art arrangements considered in the foregoing.

The present invention achieves that object by means of an arrangement having the features set forth in the claims that follow.

A preferred basic embodiment of the invention is thus an arrangement including : - a transformer having a primary winding and a secondary winding, the transformer exhibiting an impedance across said primary winding, and - an impedance synthesis circuit including: - a transfer function element having a frequency spectrum, said transfer function element having associated a gain element, and - a current source controlled by said transfer function element, the impedance synthesis circuit connected to said secondary winding, whereby said transformer mirrors the impedance synthesized by said impedance synthesis circuit into said impedance across said primary winding.

Preferably, said current source is controlled by the transfer function element via a feedback path and the associated gain element is a distributed gain over said feedback path.

Still preferably, the current source is connected to a current injection point selected out of : - either terminal of said secondary winding, and - a point connected to said secondary winding via an impedance.

Preferred embodiments provide for the transfer function element being connected to sense voltage at said secondary winding. To that effect, the transfer function element is connected to a terminal of the secondary winding. This is preferably via said gain element and/or a voltage divider. Alternatively, the

transfer function element is connected for on-line sensing voltage across an impedance in series with said primary winding.

Brief description of the annexed drawings The invention will now be described, by way of example only, with reference to the annexed figures of drawing, wherein: - figure 1 has been described previously, - figure 2 is a block diagram of a synthesis circuit adapted for use in the arrangement described herein, - figure 3 is a block diagram of an active splitter circuit adapted for use in the arrangement described herein, - figure 4 is a block diagram of a floating impedance synthesis circuit adapted for use in the arrangement described herein, - figures 5 and 6 are exemplary block diagrams for stability analysis and noise analysis of the arrangement described herein, - figure 7 is a simplified system model of the arrangement described herein, - figure 8 is a block diagram exemplary of the general topology of the arrangement described herein, and - figure 9 is exemplary of a line current sensing approach for possible application to the arrangement described herein.

Detailed description of preferred embodiments of the invention

A general aim of this invention is implementing impedance on HV wires by reducing the number of HV components/devices.

Figure 2 shows the basic idea underlying the invention. There, a transformer T provides the DC decoupling between the HV and LV circuit sections.

Blocks K, H, g build the synthesis around the secondary winding L2 that is mirrored on the primary winding Li arranged on the HV wire.

Figure 3 shows a block schematic of an xDSL splitter, based on the synthesis circuit shown above, with a reduced set of passive devices. Here, the whole splitter is implemented with only two passive devices, the transformer T and a capacitor C, plus a LV-part (elements K, H, g, to be detailed in the following) that is completely integrale without specific technological requirements.

This approach leads to an appreciable impact in terms of area reduction of the POTS/ISDN splitter: this is today the main bottleneck in the CO DSLAM line density.

Moreover, making the block H programmable permits the realisation of desired impedance values without changing the external components, thus supporting splitter functionalities for multi xDSL platform.

With respect to the prior art, an advantage offered by the arrangement described herein lies in the reduction of the splitter board space due to the low number of passive devices used. In fact, as explained above, component integration (dashed box) on the "active"side, leads to a very compact active POTS/ISDN splitter for xDSL applications.

Others important advantages relate to:

- the dynamic programmability of the impedance, which permits digital switching from one xDSL technology to another; - longitudinal balance, only depending on the transformer characteristics; - flexibility in terms of capability to work in stand-alone mode or in COMBO systems; and - low cost.

An explanation of the basic principles underlying the synthesis circuit described herein will represent an introduction to a more detailed description of the exemplary embodiment of the present invention. To that end, the basic equations useful for understanding active splitter structure and operation will be given, while describing application of the circuit to an active splitter.

Impedance synthesizer The architecture shown in figure 4, exemplifies the concept of impedance synthesizer where a single ended approach for simplicity.

The whole circuit seen at terminals A, B can be ideally thought as a floating AC-impedance realized with the active blocks H, K, g. The stage K is intended as a distributed gain on the whole feedback path, g is a VCCS (Voltage Controlled Current Source) and H (s) a module (essentially comprised of one or more filters) whose transfer functions determines the"shape" (i. e. the frequency spectrum) of the impedance Zsh over the frequency field.

The synthesis circuit works around L2 and sends/receives signals to/from the branch A, B through the magnetic coupling with L1. The equation system in Eq 1 helps in understanding the concept and can be used to calculate the synthesized impedance seen from one of the two terminals when grounding the other one:

Synthesized impedance As shown in Eq 1, the signal v2 (on the LV side) contains information about current flowing in the primary winding Li (placed on the HV branch). The signal vs is processed by the active part and is then transferred via mutual coupling (M) to the HV side, without a direct DC coupling with the line.

In this way a bi-directional AC floating impedance is generated based on the following expression: Zsh =sLI Ksh Eq 2 where the synthesis factor Ksh is defined as: Ksh = 1 with α = KH(s)g Eq 3 I sL, 4") Eq 2 and Eq 3 highlight that the impedance Zsh is modelled around sL1 acting on a and shaped in terms of frequency range through the transfer function H (s). In agreement with Table 1 below, the value for Alpha permits to increase, decrease or invert the sL impedance, depending on application. Table 1: synthesis effect on sL1 vs. conditions on alpha. Conditions on Ksh Conditions on Effect on SL1 alpha Ksho1 0<a<1/sL2 Incremented Ksh>0 Ksh<1 a<0 Decremented Inverted + lncremented IKshl>l 1/SL2 <a< 2lsL2 Inverted + incremented ) Kshj>l l/<c ; <2/ module Ksh<0 |Ksh|<1 ZIsL2< module module module

For example, by means of the condition expressed in Eq 4 a high impedance can be reached in a frequency band determined by H (s). a sL2_1 Eq 4 The equation above is a key towards an active splitter.

AC stability Stability can be analysed by taking the single ended case of figure 5 as a reference. Generally, both terminals A and B of the floating synthesized impedance are loaded towards ground via impedances ZA and ZB that play an important role in stability. In the situation considered the open loop gain (Go) may extracted by cutting the path feedback at the point indicated with a cross [X] and by solving the circuit with respect the ratio vo, /vix. This leads to the expression:

Eq 5 highlights the dependency of Go. L on ZA, ZB, Li and H (s).

Noise From the point of view of noise, as shown in figure 6, the single ended circuit can be substituted by an equivalent circuit. This equivalent circuit is comprised of the synthesized impedance with a noise generator enO2 connected in series.

If erz denotes the equivalent input noise at the input of the block K, then the equivalent output noise generator eno2 depends linearly on entez as Clearly, the winding ratio: has a strong influence on noise injected on the branch A, B.

Active splitter implementation POTS & ISDN splitters represent a natural field of application for the described impedance synthesizer. In fact, both LV and HV signals flow in splitters but the filtering actions must be activated only on the LV component. In other words, splitters should be transparent for HV signals and provide high impedance for LV signals as specified in the standards already mentioned in the introductory portion of the description.

The main drawbacks of a fully active splitter approach are : - the presence of HV signals like DC battery (6OVDC) and ring (1OOVRMS), which requires a dedicated and expensive HV SOI technology, - power consumption, and - complexity.

For the reasons above, a splitter based on a hybrid arrangement as shown in figure 3 represents an optimum trade off in terms of performance, consumption, cost and complexity.

Although reference will be made in the following primarily to POTS-xDSL splitter complying with the G. 992.1 standard, those of skill in the art will promptly appreciate that the instant disclosure can be easily adapted to other standards or ISDN requirements.

The active splitter described herein is based on a simple architecture comprised of a transformer T, acting as a ELF (Extremely Low Frequency) decoupler and an active part able to synthesize an impedance around La in a frequency range higher than the ELF range considered.

The transformer T will block'the DC as well as the ring signal from Li to L2. The supply requirements of the active-part will be determined only from the choice of the winding ratio n and the PSD masks of the ADSL and Voice signals normally present on line.

Figure 7 gives a simplified single-ended block schematic of a xDSL's system adapted to create a model.

The symbols shown in figure 7 are as follows: -Zadsl (co/cpe) are standard impedances through which the ADSL modem injects UP and DS on the loop,

- the box designated loop indicates the impedance of the test loop, - Zpots (co/cpe) indicate the impedance that the PTSN and POTS side will present: these depend on POTS state (on/off hook, ringing, ring trip...), il is the current on the primary winding L1, which in the ADSL frequency band represents the residual current flowing from the line to POTS due to the finite impedance Zsh, - is is the current on the LV winding that can be also seen as the lower limit for the stage current consumption g.

A number of entities will now be defined in order to describe the whole system. Each of these will be discussed, analysed and adapted in connection with an ADSL-POTS splitter compliant with G. 992.1.

Synthesis factor: this is the ratio of the synthesized impedance and the physically used impedance sL1.

A simplified version of Eq 3 is derived by setting <BR> <BR> (without losses in terms of generality), H = H1#H2 and H1 = 1/sL2, which yields: <BR> <BR> <BR> <BR> <BR> 1<BR> <BR> Ksh = Zsh/sL1 = with ß = H2#K#g Eq 8<BR> 1-ß salz 1 There are thus at least three strategies to realize a POTS splitter, depending on the choice of sL1:

« 1 iu Voice band =l inADSL band for high value of L =1 inADSLband > 1 in Voice band Ksh = for medium value of Li Eq 9 < 1 in ADSL band =1 in Voice band Ksh = for low value of » 1 in ADSL band As the main target pursued is minimizing the splitter board space, the first choice is neglected while the third one is taken as a guideline.

The foregoing translates into the following condition: / ? 1 in the ADSL band Eq 10 Eq 9.3 and Eq 8 indicate H2 will be a high pass filter (HPF). Moreover, its choice should be done in order to implement a G. 992.1 compliant filtering action. The band limitation of K and g acts by switching off the synthesis outside the ADSL band reducing power consumption outside the frequency region of interest.

Synthesized impedance: this is the effective impedance seen around sL1 placed along the HV branch.

Zsh = n2 (sL2) Ksh = sLI KsS2 Eq 11 Zsh determines the active splitter performance in terms of return loss, insertion loss, attenuation distortion, delay distortion, ADSL band attenuation and input impedance (see e. g. ITU-T Recommendation G. 992.1 (1999):"Asymmetric Digital Subscriber Line (ADSL)").

Current factor: this represents the ratio between

the currents on the two windings and it is useful to determine the'minimum current consumption of block g vs. the current flowing on the HV branch.

ICi = L2 = nKsh Eq 12 il Even if Ksh increases in the ADSL band, the current consumption i2 is limited because the filtering action will simultaneously reduce i1. Obviously, this is directly proportional to the transformer ratio n.

Sensing factor: this is a useful parameter to provide the dynamic ranges of signal processed by the active chain vs. the current flowing on primary winding.

As Zsh increases and n decreases, Ks will increase providing a greater signal on the active part. In any case, a decrement of i1, which leads to a limited signal v2 follows an increment of Ks in the ADSL band.

Out noise factor: this is useful in order to obtain the equivalent output noise generator (see figure 6) vs. the equivalent input noise of the active chain K, H, g.

Line noise factor: this is expressed as the ratio of the on-line injected noise to the equivalent input

noise of the active chain including the elements K, H, g. Taking figure 7 again as a reference, ZA and ZB denote the impedances loading the nodes A and B, respectively.

The above-mentioned factor has the expression in Eq 15. This indicates that a certain care is required in properly selecting the transformer ratio n, as this may multiply the noise injected into node B, which may disturb the ADSL channel.

The arrangement described in the foregoing has been tested by taking into account the following edging conditions which consider the main transformer parasitics (leakage inductance and wire DC resistance), active blocks band limitations, and so on.

Additionally, H (s) was considered as notionally comprised of three stages: a high pass filter (HPF), a low pass filter (LPF) and a phase adjustment filter (PAD), while the following quantitative parameters have been used.

Transformer parameters L1= 20mH (primary winding), L2= 12mH (secondary winding), Rw= 10Q (DC resistance for each winding), Llk= 20uH (Leakage inductance), External capacitor Cpots=lOOnF (capacitor in parallel with the PTSN side), Active blocks parameters which represent a distributed gain, eni=100nV/Hz (input equivalent noise of the active chain K, H, g), With the above edging conditions a viable solution is : H(s) = H2HPF(s)#H2LPF(s)#H2PAD(s)#H1(s) Eq 16 With HZHPF is a second order elliptic high pass function with a cut-off frequency of 10kHz and 44dB attenuation,

instead H1 is the function which compensate sL2 in equation Eq 3 From Eq 19, the PAD filter is unitary, given that no phase correction is needed for this kind of H2HPF.

Other configurations Other topologies, again based on a transformer as the synthesis core, will now be briefly described in the following.

A generalization of the idea previously described will be introduced first. A discussion of a different approach that use an HV capacitor follows.

Embodiment generalization The embodiment described in the foregoing may be regarded as representative a more general topology as shown in figure 8. There, three impedances are added (Za, Zb, Zc) and three different injection points are considered (I, II, III). In that way, all possible sensing/injection combinations are realized by properly setting of the three added impedances.

The circuit in figure 8 provides an impedance Zshx which can be expressed as: Zshx = ZshO KShx Eq 19 where Zsho is the impedance seen from the line when the synthesis is off: The impedances Zabc and Zbc are respectively defined as:

abc va + Zb + Z. and Zb = Zb + Z, Eq 21 The synthesis coefficients depend on the injection point, and they may be expressed as follows:

or in a more generalized way: This represents the key point underlying the arrangement described herein, namely. sensing and injection have been done on the secondary winding side.

On-line current sensing approach The last approach is based on current sensing across an impedance Z placed in series with the line (see figure 9). Furthermore, capacitive decoupling allows using LV

devices for circuitry connected to the secondary winding. Analyzing the circuit we obtain the equations:

Ksh depends linearly on Alpha, while the previous solutions (Eq 25) convey a hyperbolic relationship.

This solution exhibits a drawback with respect to the previous one due to the presence of HV capacitors and a component Z placed in series with the line but presents an advantage given by its linear behavior with alpha.

In terms of stability, Eq 29 shows the open loop gain when terminals P and L are respectively loaded with Zp and ZL ; this formula put in evidence that stability is not an issue when one/both terminals are floating.

As indicated, the arrangement described herein exhibits a number of advantages.

In filtering applications where HV signals are present, integration has heretofore met with serious obstacles due to taxing technology requirements and

power consumption: in fact, the signal dynamics made it practically compulsory to use an HV supply for the active part, thus making design very expensive in terms of power dissipation.

The arrangement described herein achieves a reduction in the passive components needed in filtering applications like xDSL splitter. Using LV technology to integrate active devices, provides a high density solution in terms of area and cost: for instance, a high order filter can be implemented by means of an ASIC, a single transformer plus some SMD components, in the place of a huge transformers chain, thus achieving a substantial saving in PCB space.

Of course, without prejudice to the underlying principles of the invention, the details and embodiments may vary, also significantly, with respect to what has been described, by way of example only, without departing from the scope of the invention as defined in the claims that follow.