ACTIVE MATRIX DISPLAY - SEIKO EPSON CORP

Title:

ACTIVE MATRIX DISPLAY

Document Type and Number:

WIPO Patent Application WO/1999/010861

Kind Code:

A1

Abstract:

An active matrix display (1) in which a thick insulating film is formed surrounding an organic semiconductor film to suppress a parasitic capacitance and prevent the occurrence of breakage in the opposing electrodes formed on the upper layer of the insulating film, and which is provided with bank layers (bank) made of resist films and formed along a data line (sig) and a scanning line (gate), and an electrode (op) opposed to a thin-film light-emitting element (40) and laminated on the upper layer of a bank layer (bank), thereby to suppress the capacitance parasitic on the data line (sig). An interrupted portion (off) is formed in a bank layer (bank), and is a flat portion without having a large step caused by the bank layer (bank) and, hence, the opposing electrode (op) is not broken in this portion. When an organic semiconductor film (43) is to be formed by the ink-jet method, the liquid material jetted from the ink-jet head is blocked by the bank layer (bank).

Inventors:

YUDASAKA ICHIO (JP)

Application Number:

PCT/JP1998/003663

Publication Date:

March 04, 1999

Filing Date:

August 18, 1998

Export Citation:

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Assignee:

SEIKO EPSON CORP (JP)
YUDASAKA ICHIO (JP)

International Classes:

H05B33/22; G09F9/30; G09F9/33; H01L27/32; H01L51/50; H05B33/26; H01L51/00; H01L51/40; (IPC1-7): G09F9/30; H01L33/00; H05B33/22

Foreign References:

JPH0266867A	1990-03-06
JPS5264891A	1977-05-28
JPH09161970A	1997-06-20

Other References: