Title:
AMPLIFICATION CIRCUIT, ADDITION CIRCUIT, RECEPTION CIRCUIT AND INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2019/155582
Kind Code:
A1
Abstract:
The present invention comprises: a first current source (IS11) connected to a power line supplied with a first potential; a differential input circuit (TR11, TR12) that is connected between the first current source and a first node, and receives a differential input signal; second current sources (IS12, IS13) that are each connected between a power line supplied with a second potential and the first node; and a load circuit (R11, R12) connected between the power line supplied with the first potential and a second node. An inductor circuit (L13, L14) is also connected between the first node and the second node. The present invention thereby achieves both linearity and lower voltage.
Inventors:
KANO HIDEKI (JP)
Application Number:
PCT/JP2018/004457
Publication Date:
August 15, 2019
Filing Date:
February 08, 2018
Export Citation:
Assignee:
SOCIONEXT INC (JP)
International Classes:
H03F1/22; H03F3/45; H04L25/03
Domestic Patent References:
| WO2009025008A1 | 2009-02-26 | |||
| WO2012036207A1 | 2012-03-22 |
Foreign References:
| JP2013106010A | 2013-05-30 | |||
| JP2016139976A | 2016-08-04 | |||
| JPH10209537A | 1998-08-07 | |||
| JP2014135646A | 2014-07-24 |
Attorney, Agent or Firm:
KOKUBUN, Takayoshi (JP)
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