The invention relates to an amplifier comprising an input terminal for receiving an input signal; an output terminal for supplying an output signal; a first and a second supply terminal for receiving a supply voltage; an output transistor with a first main electrode coupled to the first supply terminal, a second main electrode coupled to the output terminal, and a control electrode; and a control circuit which together with the output transistor forms a switched current mirror and which has a first input coupled to the input terminal, a second input coupled to the output terminal, and an output coupled to the control electrode of the output transistor.

Such an amplifier is known from a Japanese patent abstract published under no. JP--A-07/273631. An amplifier is described therein which reduces the interference signals caused by the amplifier during switching over of the output signal from a logic "high"to a logic"low", and vice versa. The reduction of the interference signals is realized in that the current through the output transistor, i. e. the transient current, is limited during switching-over of the output signal.

It is a disadvantage of the known amplifier that the transient current is not accurately defined. It is desirable, or even necessary for a number of electronic circuits that the transient current should be accurately defined. This may be the case, for example, if the value of the so-called slewrate of the output signal is relevant for a correct operation of the electronic circuit in question.

It is an object of the invention to provide an amplifier which does not have the above disadvantage.

According to the invention, the amplifier mentioned in the opening paragraph is for this purpose characterized in that the control circuit comprises a reference resistor and a diode which are connected in series between the first and the second supply terminal. It is achieved thereby that the current through the diode, which forms the input branch for the switched current mirror, is determined by the quotient of the supply voltage minus the voltage drop across the diode and the value of the reference resistor during switching-over of the output signal. Since both the supply voltage and the value of the reference resistor can be accurately defined in principe, it is also possible to define the

current through the diode accurately. This at the same time accurately defines the transient current because the output transistor forms the output branch of the switched current mirror.

The amplifier according to the invention may furthermore be characterized in that switching means are connected in series with the reference resistor and the diode for switching the switched current mirror on and off. It is achieved thereby that the current through the output transistor can be (much) greater than the transient current in a stationary condition of the output signal, i. e. while the output signal is logically"high"or logically "low". This has the advantage that the amplifier is capable of driving comparatively low- ohmic loads, while nevertheless the transient current can be comparatively low.

The amplifier according to the invention may furthermore be characterized in that the switching means are provided with a switching signal input which is coupled to the output terminal for the purpose of receiving the output signal. Given a correct dimensioning of the amplifier, this will achieve that the switched current mirror is automatically switched on and off at the correct moments.

The invention will be explained in more detail with reference to the accompanying drawing, in which the sole Figure shows a circuit diagram of an embodiment of an amplifier according to the invention.

The embodiment of an amplifier according to the invention shown in the Figure comprises an input terminal 1, an output terminal 2, a first supply terminal 3, and a second supply terminal 4. A voltage source Ui for supplying an input signal is connected between the input terminal 1 and the second supply terminal 4. The amplifier is supplied from a supply voltage source SV which is connected between the first supply terminal 3 and the second supply terminal 4. The amplifier comprises an output transistor To for supplying an output signal to a load ZL which is connected between the output terminal 2 and the second supply terminal 4. The output transistor To is connected with its first main electrode, or source, and with its second main electrode, or drain, between the first supply terminal 3 and the output terminal 2, respectively. A control electrode, i. e. the gate, of the output transistor To is coupled to an output of a control circuit CT. The control circuit CT has a first and a second input which are connected to the input terminal 1 and to the output terminal 2, respectively. The control circuit CT comprises a first transistor T1 which is connected as a diode in that the drain and the gate of the first transistor T1 are short- circuited, and a second transistor T2 which is connected with a source to the first supply terminal 3 and with a drain to the source of the first transistor Tl. The gate of the second transistor T2 forms the second input of the control circuit CT. The control circuit CT further

comprises a third transistor T3 which is connected with a source to the second supply terminal 4, and a fourth transistor T4 which is connected with a source to the first supply terminal 3 and with a drain to the gate of the output transistor To. The gates of the third transistor T3 and the fourth transistor T4 are interconnected and form the first input of the control circuit CT. The control circuit CT further comprises a reference resistor R which is connected between the drain of the first transistor T1 and the drain of the third transistor T,.

The control circuit CT together with the output transistor To forms a switched current mirror.

The circuit CT described above and the output transistor To together form half of the embodiment of an amplifier according to the invention shown in the Figure. The other half of the embodiment is composed of components having the reference symbols: Toa, Tla, T2a, T3a, T4a, and Ra. The two halves are complementarily constructed in respect of one another and also have a mutually complementary operation. The elements of the following pairs correspond to one another: To; Toa, Tj; Tla, T2 ; T2as T3 ; T3as T4 ; T4as R ; Ra The operation of only one half will now be described because of the complementary operation of the two halves.

It is assumed at the start that both the input signal at the input terminal 1 and the output signal at the output terminal 2 are logically"low". Although the second transistor T2 is in the conducting state, there will flow no current through the input branch of the switched current mirror because the third transistor T3 is not conducting. The voltage at the gate of the output transistor To is logically"high"because the fourth transistor T4 is conducting, so that the output transistor To is cut off. As a result, the output signal at the output terminal 2 remains logically"low". When subsequently the input signal changes from logically"low"to logically"high", the third transistor T3 becomes conducting and the fourth transistor T4 is cut off. Since the output signal does not change initially, the second transistor T2 will remain conducting initially, so that the switched current mirror remains switched on.

An input current will start to flow through the input branch of the switched current mirror.

The value of this current is approximately equal to the quotient of the supply voltage minus the voltage drop across the diode and the value of the reference resistor R. The output current of the switched current mirror flows through the output transistor To. The ratio of the output current to the input current is only determined (by approximation) by the mutual geometrical relations of the output transistor To and the first transistor T1. The output current can be accurately defined in this manner through a suitable choice of the supply voltage, the value of the reference resistor R, and the dimensional relations of the first transistor T2 and

the output transistor To. Since the output transistor To is conducting, the output signal at the output terminal 2 will change from logically"low"to logically"high". The voltage at the output terminal 2 will become so high, somewhere in the transition region from logically "low"to logically"high" (of the output signal), that the second transistor T2 becomes non- conducting, whereby the switched current mirror is switched off. From that moment, the gate of the output transistor To is kept logically"low"via the series arrangement of the third transistor T3, the reference resistor R, and the first transistor TI. The output current through the output transistor To is now no longer accurately defined, but may assume a much higher value now, so that the output signal can also reach the logic value"high"if the load ZL has a comparatively low value. In other words, the output current, which is denoted as transient current in the transition region, is accurately defined only in the transition region (of the output signal) from logically"high"to logically"low", or vice versa. The output current may be (much) greater than the transient current when the output signal is logically"high"or logically"low".

The amplifier may be constructed with bipolar transistors instead of the field effect transistors shown in the Figure. A combination of field effect transistors and bipolar transistors is also possible, for example bipolar transistors for the second transistor T2, the third transistor T3, and the fourth transistor T4, and field effect transistors for the first transistor T1 and the output transistor To. The transistors need not necessarily have the conductivity types shown in the Figure, instead, all or some of the transistors may also be constructed with an opposite conductivity type.

The amplifier may be implemented both in an integrated circuit and by means of discrete components.