Title:
AMPLIFIER
Document Type and Number:
WIPO Patent Application WO/2020/183657
Kind Code:
A1
Abstract:
The present invention provides an amplifier equipped with a first transistor 1 to which a signal input terminal is connected, a second transistor 2 to which a signal output terminal is connected, wiring 14 connecting the first transistor 1 and the second transistor 2, and a variable inductor circuit 100 electrically connected to the wiring 14 and grounded via a capacitor 101 for cutting off a DC current. The inductance value of the variable inductor circuit 100 is set to one such that the parasitic capacitance Cx between the first transistor 1 and the second transistor 2 is cancelled.
Inventors:
SUGITANI TAKUMI (JP)
HANGAI MASATAKE (JP)
SHINJO SHINTARO (JP)
HANGAI MASATAKE (JP)
SHINJO SHINTARO (JP)
Application Number:
PCT/JP2019/010326
Publication Date:
September 17, 2020
Filing Date:
March 13, 2019
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H03F3/19; H03F1/22
Foreign References:
| JP2011055144A | 2011-03-17 | |||
| JP2006032579A | 2006-02-02 | |||
| JP2005176331A | 2005-06-30 | |||
| JP2011159953A | 2011-08-18 |
Other References:
KUO-JUNG SUN: "2007 IEEE/MTT-S International Microwave Symposium", June 2007, IEEE, article "A 10.8-GHz CMOS Low-Noise Amplifier Using Parallel-Resonant Inductor", pages: 1795 - 1798
See also references of EP 3926825A4
See also references of EP 3926825A4
Attorney, Agent or Firm:
SOGA, Michiharu et al. (JP)
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