TECHNICAL FIELD

The invention relates to an apparatus for connecting digital terminals to a digital exchange via a terminal junction point.

BACKGROUND ART

In future digital communication systems including terminals for both data transmission and speech connections (Integrated Services Digital Network, ISDN) the subscribers will be connected to digital exchanges via digital subscriber lines. Via a bus network or a star network, all the terminals will be in communication with a terminal junction point, which in turn is connected to the exchange.

Different solutions are conceivable for multiple access in digital subscriber connection. One possibility is polling, for example, where the terminal junction point gives permission to the terminals to send in a given order. The method requires that each terminal has an unambigous individual address, which causes large practical problems however.

According to another solution, the terminal wanting to send data information investigates whether the data channel send direction is idle and the channel is then engaged, while if this is not the case there is a wait of one time interval before a new attempt to send is made. If several terminals start sending simultaneously, this is detected and sending is interrupted by all the terminals. Collision is usually detected by the signals on the transmission medium having an unexpected distortion. This method requires that each terminal has access to signal information from all the other terminals, which is a disadvantage.

The aforementioned solutions are described in the publication "Multiaccess Protocols in Packet Communication Systems", IEEE Trans, on Comm, Vol COM-28 NO 4 April 1980, Fouad A Tobagi.

DISCLOSURE OF INVENTION

The object of the invention is to provide an apparatus which gives multiple access with the aid of simple means to a digital subscriber line, and enables the utilization of the same terminal interface for both bus and star structures.

The invention is characterized by what is apparent from the claims.

BRIEF DESCRIPTION OF DRAWINGS

The invention will be described in detail below by means of an embodiment, with reference to the accompanying drawing, on which Figure 1 illustrates a terminal junction point to which terminals are connected via a bus line or via lines connected in star pattern, Figure 2 shows the frame configuration for signalling from the terminals to the exchange, and in the opposite direction, Figure 3 illustrates a terminal junction point for co-operation with bus-con- - nected terminals, Figure 4 illustrates a terminal and Figure 5 illustrates a terminal junction point for co-operation with star- connected terminals.

MODE FOR CARRYING OUT THE INVENTION

Figure 1 schematically illustrates a digital communication system including a transit station 1 with a plurality of terminal junction points 2, of which one is shown. The terminals 3 may be connected to the terminal junction points via a common bus 4 as well as in the form of a star structure 5.

Information interchange between subscriber and exchange takes place via an information packet channel or D channel and also via one or more information interchange channels or B channels, according to planned standard. All the channels are bi-directional, the D channels having a bit rate of 16 kbϊts/s and the B channels a bit rate of for example 64 kbits/s. The B channels are utilized for transmitting information between set-up connections, which means that if a terminal occupies a B channel the latter will be engaged the whole time the connection is set up. On the other hand, information is transmitted in packet form in the D channel, which means that a terminal utilizes the channel in the send direction only during the time intervals when it has information to

transmit, and other terminals can utilize the channel between such intervals. As distinguished from the B channels, the D channel can thus be utilized for several simultaneous connections, provided that the total quantity of data to be transmitted does not exceed the channel capacity. The invention enables utilization of the D channel in the most efficient way. What has been said above with regard to the speed and use of the channels is not novel, but corresponds to planned CCITT standards for the future.

Figure 2 illustrates the frame configuration used for signalling from the terminals to the exchange and vice versa via the terminal junction points. By dx is denoted the information in the D channel transmitted from a terminal to the junction point, and DX the corresponding information which is forwarded from the junction point to the exchange. In the same way, DR denotes information transmitted from exchange to junction point and to the terminal over the D channel respectively. BIX, B2X and B1R, B2R, respectively, denote information transmitted via an established connection and having no importance from the inventive aspect. Two 64 kbits/s channels, for example, are used for the latter information, while a 16 kbits/s channel is used for the data packet information.

According to the invention, there is a further channel of e g a 16 kbits/s which is added to the information sent from the exchange to the junction point when this information is forwarded to the terminal. In this outband channel is sent back the information DX which the terminal junction point 2 sends to the exchange. The outband channel of course implies a requirement of increased capacity in the transmission between junction point and terminals, but this is of less importance, since the lines in a subscriber installation are relatively short, the transmission capacity thus not being a limiting factor. The cost caused by an increase of the channel capacity between junction point and terminals is substantially less than the advantage achieved by the setting up method.

Figure 3 illustrates a terminal junction point 2 for use in terminals connected in a bus structure.' A receiver 6 receives signals from the terminals, and via a dεmultiplexor 7 forwards these to a multiplexor 8, directly in the case of BX-type signals and via directing means 9 in the case of dx-type signals. For communication with the exchange there is a transmitter- 10 and a receiver 11, and for communication with the terminals there is a transmitter 12. A sensing

circuit 13 senses whether any signal of the dx-type is present in the information received from the terminals. Should there be no such signal, the directing means 9 is not affected, maintaining instead its idle state in which it connects a flag register 14 to the line going to the exchange. As soon as a dx-type signal occurs, the directing means 9 is reset by a control signal from the sensing circuit 13, whereby the signal received from the terminal is fed to the line going to the exchange. Accordingly, as long as there is no dx-type signal present, a flag signal is fed both to the terminals and the exchange to form filling-out information indicating that no information transmission over the channel occurs. The flag signal can be of the form 01111110 or 11111111, resulting in that there is no danger for mixing together with data signals, since the normal data information is supposed to be of the type having at most five successive "ones". Registers 15, 16 store the signals obtained from the terminals and from the exchange, respectively, before these are fed to the terminals by a multiplexor 17. In this case the multiplexor has a bit rate which, apart from the normal channels of 16,64 and 64 kbits/s, can carry a further - channel of 16 kbits/s, ϊ e it has a bit rate of at least 160 kbits/s.

Figure 4 schematically illustrates a terminal and explains its co-operation with the terminal junction point illustrated in Figure 3. Only the parts necessary for explaining the inventive principle are shown, while it is assumed that sending and receiving B-type information, i e information communication in a set-up condition, and D-type information, ϊ e communication between the terminal and station, are carried out conventionally. The terminal and its conventional parts is denoted by 20. When the terminal needs to utilize the data packet channel for sending, this is indicated by a call signal REQ. For this signal to become active there is required a logical decision by the AND circuit 21 also having its second input activated, its first input being fed with the call signal. The flag signal obtained from the junction point 2 when the directing means 9 is in its first position is fed via a receiver 22 and a demultiplexer 23 to a series-parallel converter 24, and is compared in a comparison circuit 25 with the content of a flag register 26. In case of conformity, a signal is fed to a counter 27, said counter being settable with the aid of a switch in correspondence to the terminal priority, so that the flag signal must occur a given number of times before an activating signal is sent from the counter to the second input of the AND circuit 21. The output signal from the AND circuit 21 resets a bistable

flipflop 28, which in this state feeds a send permission signal PERM to the terminal equipment 20, implying that the signal dx is sent out by the multiplexor 29 and the transmitter 30. Said transmission is carried out under control of a switch 31, activated by the send permission signal PERM from the output of the bistable flipflop 28 via an AND circuit 32, the second input of which is activated by a time signal T during the time periods reserved for the dx signal messages. The sent dx signal is stored in a register 33 for enabling comparison with the information coming from the junction point in the outband channel, said information now being sent out due to the fact that the directing means 9 have been reset by the received dx signals, and is fed to the second input of the negating AND circuit 34, to the other input of which the contents of the register 33 is supplied. If there is no conformity between these two signals, this signifies that interference with a signal from another terminal has occurred, resulting in that an AND circuit 35, one input of which is kept activated by the send permission signal PERM delayed in a register 36, sends an output signal via the OR circuit 37 and resets the bistable flipflop 28 to its inactive state, whereby sending of the signal to the terminal junction point ceases. The counter 27 is set to zero via the OR circuit 38 when the call signal REQ ceases, or when the send permission signal PERM occurs.

As will be appreciated, the invention enables a plurality of digital terminals which are connectable via a common bus line to a common terminal junction point, to be connected thereto in accordance with a given order of priority, and if several terminals call simultaneously, the terminal is selected whose own call signal re -sent from the junction point agrees with the delayed signal stored in the terminal, while the remaining terminals are disconnected.

Both terminals and junction point can also be used in a star-pattern connection of terminals, with the only difference that in this case a supplementary circuit

40 is required, as will be seen from Figure 5. The dashed line I-I denotes the boundary between the junction point itself and the equipment required for respectively connecting terminals via a common bus or star pattern connection of a number of terminals. There are receivers- 1, 42, 43 via which the signals are received from respective terminals, and transmitters 44, 45, 46 via which the signals are forwarded to the terminals. A demultϊplexor 50, 51, 52 is associated with each of the receivers for feeding the received BX-type signals

_V-7E, OMPI

via selector 53, which is not described further, to the transmitter 10 for transmission to the exchange 1, and for feeding the dx-type signals to an AND circuit 55. Sensing circuits 56, 57, 58 sense, in the same way as the sensing circuit 13 in Figure 3, whether any dx-type signal is present on the respective line, and as long as there is no such signal it sends a "1" signal to an AND circuit 60. The output signal from this circuit constitutes a control signal to the directing means 9 in the same way as the signal from the sensing circuit 13 in Figure 3, such that as long as no dx-type signal occurs, the directing means is kept in the state where it feeds out to the flag signal.

The AND circuit 55 has the task of returning a binary signal to all the terminals in response to the binary signals received from all the connected terminals via the directing means 9. According to the example, a binary 0 is recognised as a working signal, indicating that a terminal has been activated, whereas the absence of a signal from non-activated terminals results in that the demulti- plexor feeds the binary value 1 to the AND circuit 55. As soon as the binary value at a terminal is changed to 0 as a result of activation, the output signal of the AND circuit is changed to 0 and in comparison with the value stored in the register 33 of the respective terminals, the terminals which have the value 1 are disconnected, and the terminal with the value 0 is retained connected, as will be apparent from Figure 4. A "1" instead of a "0" can, of course, be selected for the working state provided a suitable logical circuit is selected.