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Title:
APPARATUS AND METHOD FOR ADJUSTING POWER CONSUMPTION IN A RADIO FREQUENCY CHIP
Document Type and Number:
WIPO Patent Application WO/2023/146551
Kind Code:
A1
Abstract:
According to one aspect of the present disclosure, a radio frequency (RF) chip is provided. The RF chip may include a transmitter (Tx) path coupled to an input of a power amplifier (PA). The Tx path may be configured to provide a set of Tx path samples associated with a Tx input signal. The RF chip may include a Tx auxiliary receiver (TAR) path coupled to an output of the PA. The TAR path may be configured to provide a set of TAR path samples. The RF chip may include a digital signal processor (DSP). The DSP may be configured to receive the set of Tx path samples and the set of TAR path samples. The DSP may be configured to perform an APT adaptation process by kernel-fitting the set of Tx path samples and the set of TAR path samples.

Inventors:
GENG JIFENG (US)
Application Number:
PCT/US2022/014627
Publication Date:
August 03, 2023
Filing Date:
January 31, 2022
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
ZEKU INC (US)
International Classes:
H03F1/36; H03G3/10; H04M1/02; H04W52/02
Foreign References:
US20110188553A12011-08-04
US20080113628A12008-05-15
US20140341318A12014-11-20
US20100271997A12010-10-28
US20060170499A12006-08-03
Other References:
FLOYD B A, HUNG C-M, KENNETH K O: "Intra-chip wireless interconnect for clock distribution implemented with integrated antennas, receivers, and transmitters.", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 37, no. 5, 1 May 2002 (2002-05-01), USA, pages 543 - 552, XP002979663, ISSN: 0018-9200, DOI: 10.1109/4.997846
Attorney, Agent or Firm:
ZOU, Zhiwei (US)
Download PDF:
Claims:
WHAT IS CLAIMED IS:

1. A radio frequency (RF) chip, comprising: a transmitter (Tx) path coupled to an input of a power amplifier (PA) and configured to provide a set of Tx path samples associated with a first Tx input signal; a Tx auxiliary receive (TAR) path coupled to an output of the PA and configured to provide a set of TAR path samples; and a digital signal processor (DSP) coupled to the Tx path and the TAR path and configured to: receive the set of Tx path samples and the set of TAR path samples; and perform an average power tracking (APT) adaptation process by kernel-fitting the set of Tx path samples and the set of TAR path samples.

2. The RF chip of claim 1, wherein the DSP is configured to perform the APT adaptation process by: performing kernel-fitting based on the set of Tx path samples and the set of TAR path samples to generate PA model; and estimating a performance metric based on the PA model and one or more coefficients used in the kernel -fitting; and identifying a PA bias voltage adjustment based on the performance metric.

3. The RF chip of claim 2, wherein the performance metric is associated with error vector magnitude (EVM) performance of the PA, adjacent channel leakage ratio (ACLR) performance of the PA, or PA compression level.

4. The RF chip of claim 2, further comprising: a bias voltage supply configured to apply the PA bias voltage adjustment.

5. The RF chip of claim 4, wherein the DSP is further configured to: identify a Tx input signal voltage adjustment based on the PA bias voltage adjustment and a target output power of the PA, wherein the RF chip further comprises: a signal generator configured to generate a second Tx input signal based on the Tx input signal voltage adjustment.

6. The RF chip of claim 1, further comprising: a microcontroller configured to initiate the APT adaption process at predetermined intervals.

7. The RF chip of claim 1, wherein the kernel -fitting reduces one or more of out-of-band (OOB) blocker interference or adjacent channel interference associated with the set of TAR samples.

8. An apparatus for digital signal processing, comprising: at least one processor; and memory having instructions stored thereon, which when executed by the at least one processor cause the at least one processor to: periodically receive a set of transmitter (Tx) path samples from a Tx path coupled to an input of a power amplifier (PA); periodically receive a set of TAR path samples from a TAR path coupled to an output of the PA; and perform an average power tracking (APT) adaptation process by kernel-fitting the set of Tx path samples and the set of TAR path samples.

9. The apparatus of claim 8, wherein the instructions, which when executed by the at least one processor, cause the at least one processor to perform the APT adaptation process by: performing kernel-fitting based on the set of Tx path samples and the set of TAR path samples to generate PA model; and estimating a performance metric based on the PA model and one or more coefficients used in the kernel -fitting; and identifying a PA bias voltage adjustment based on the performance metric.

10. The apparatus of claim 9, wherein the performance metric is associated with error vector magnitude (EVM) performance of the PA, adjacent channel leakage ratio (ACLR) performance of the PA, or PA compression level. 11. The apparatus of claim 9, wherein the instructions, which when executed by the at least one processor, further cause the at least one processor to: cause a bias voltage supply to apply the PA bias voltage adjustment.

12. The apparatus of claim 11, wherein the instructions, which when executed by the at least one processor, further cause the at least one processor to: identify a Tx input signal voltage adjustment based on the PA bias voltage adjustment and a target output power of the PA.

13. The apparatus of claim 8, wherein the instructions, which when executed by the at least one processor, further cause the at least one processor to: initiate the APT adaptation process at predetermined intervals.

14. The apparatus of claim 8, wherein the kernel-fitting reduces one or more of out-of-band (OOB) blocker interference or adjacent channel interference associated with the set of TAR samples.

15. A method of wireless communication of a radio frequency (RF) chip, comprising: receiving, from a transmitter (Tx) path coupled to an input of a power amplifier (PA), a set of Tx path samples associated with a Tx input signal for transmission to a base station; receiving, from a Tx auxiliary receiver (TAR) path coupled to an output of the PA, a set of TAR path samples; and adjusting, by a digital signal processor (DSP), power consumption of the PA by kernelfitting the set of Tx path samples and the set of TAR path samples.

16. The method of claim 15, wherein the adjusting the power consumption of the PA comprises: performing kernel-fitting based on the set of Tx path samples and the set of TAR path samples to generate PA model; estimating a performance metric based on the PA model and one or more coefficients associated with the kernel-fitting; and identifying a PA bias voltage adjustment based on the performance metric.

17. The method of claim 16, wherein: the performance metric is associated with error vector magnitude (EVM) performance of the PA, adjacent channel leakage ratio (ACLR) performance of the PA, or PA compression level, and the kernel-fitting reduces one or more of out-of-band (OOB) blocker interference or adjacent channel interference associated with the set of TAR samples.

18. The method of claim 16, further comprising: applying, by a bias voltage supply, the PA bias voltage adjustment to the PA.

19. The method of claim 18, further comprising: identifying, by the DSP, a Tx input signal voltage adjustment based on the PA bias voltage adjustment and a target output power of the PA; and applying, by a signal generator, the Tx input signal voltage adjustment to a subsequent Tx input signal.

20. The method of claim 15, further comprising: initiating, by a microcontroller, the APT adaptation process at predetermined intervals.

Description:
APPARATUS AND METHOD FOR ADJUSTING POWER CONSUMPTION IN A RADIO FREQUENCY CHIP

BACKGROUND

[0001] Embodiments of the present disclosure relate to apparatus and method for wireless communication.

[0002] Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcasts. A radio access technology (RAT) is the underlying physical connection method for a radio-based communication network. Many modem terminal devices, such as mobile devices, support several RATs in one device. In cellular communication, such as the 4th-generation (4G) Long Term Evolution (LTE) and the 5th-generation (5G) New Radio (NR), the 3rd Generation Partnership Project (3GPP) defines various mechanisms for performing average power tracking (APT) for a power amplifier (PA) of a radio frequency (RF) chip.

SUMMARY

[0003] According to one aspect of the present disclosure, an RF chip is provided. The RF chip may include a transmitter (Tx) path coupled to an input of a power amplifier (PA). The Tx path may be configured to provide a set of Tx path samples associated with a Tx input signal. The RF chip may include a Tx auxiliary receiver (TAR) path coupled to an output of the PA. The TAR path may be configured to provide a set of TAR path samples. The RF chip may include a digital signal processor (DSP). The DSP may be configured to receive the set of Tx path samples and the set of TAR path samples. The DSP may be configured to perform an APT adaptation process by kernel-fitting the set of Tx path samples and the set of TAR path samples.

[0004] According to another aspect of the present disclosure, an apparatus for digital signal processing is disclosed. The apparatus may include at least one processor. The apparatus may include memory having instructions stored thereon, which when executed by the at least one processor may cause the at least one processor to receive a set of Tx path samples from a Tx path coupled to an input of a PA. The instructions, which when executed by the at least one processor, may cause the at least one processor to receive a set of TAR path samples from a TAR path coupled to an output of the PA. The instructions, which when executed by the at least one processor, may cause the at least one processor to perform an APT adaptation process by kernel-fitting the set of Tx path samples and the set of TAR path samples. [0005] According to another aspect of the present disclosure, a method of wireless communication of an RF chip is provided. The method may include receiving, from a Tx path coupled to an input of a PA, a set of Tx path samples associated with a Tx input signal for transmission to a base station. The method may include receiving, from a TAR path coupled to an output of the PA, a set of TAR path samples. The method may include adjusting, by a digital signal processor (DSP), power consumption of the PA by kernel-fitting the set of Tx path samples and the set of TAR path samples.

[0006] These illustrative embodiments are mentioned not to limit or define the disclosure, but to provide examples to aid understanding thereof. Additional embodiments are discussed in the Detailed Description, and further description is provided there.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable a person skilled in the pertinent art to make and use the present disclosure.

[0008] FIG. 1 illustrates an exemplary wireless network, according to some embodiments of the present disclosure.

[0009] FIG. 2 illustrates a block diagram of an exemplary node, according to some embodiments of the present disclosure.

[0010] FIG. 3 illustrates a block diagram of an exemplary apparatus including a baseband chip, a radio frequency (RF) chip, and a host chip, according to some embodiments of the present disclosure.

[0011] FIG. 4A illustrates a detailed block diagram of the exemplary RF chip of FIG. 3, according to some embodiments of the present disclosure.

[0012] FIG. 4B illustrates a graphical representation of an exemplary PA model generated by kernel-fitting, according to some embodiments of the present disclosure.

[0013] FIG. 4C illustrates a first graphical representation of a power spectrum density (PSD) associated with an actual PA output signal, a TAR signal, and a kernel-fitted signal, according to some embodiments of the disclosure.

[0014] FIG. 4D illustrates a second graphical representation of a PSD associated with an actual PA output signal, a TAR signal, and a kernel-fitted signal, according to some embodiments of the disclosure. [0015] FIG. 4E illustrates a third graphical representation of a PSD associated with an actual PA output signal, a TAR signal, and a kernel-fitted signal, according to some embodiments of the disclosure.

[0016] FIG. 5 illustrates a flow chart of an exemplary method of online PA bias voltage adjustment, according to some embodiments of the present disclosure.

[0017] Embodiments of the present disclosure will be described with reference to the accompanying drawings.

DETAILED DESCRIPTION

[0018] Although some configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the pertinent art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present disclosure. It will be apparent to a person skilled in the pertinent art that the present disclosure can also be employed in a variety of other applications.

[0019] It is noted that references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” “some embodiments,” “certain embodiments,” etc., indicate that the embodiment described may include a feature, structure, or characteristic, but every embodiment may not necessarily include the feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

[0020] In general, terminology may be understood at least in part from usage in context. For example, the term “one or more” as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense. Similarly, terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.

[0021] Various aspects of wireless communication systems will now be described with reference to various apparatus and methods. These apparatus and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, units, components, circuits, steps, operations, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, firmware, computer software, or any combination thereof. Whether such elements are implemented as hardware, firmware, or software depends upon the application and design constraints imposed on the overall system.

[0022] The techniques described herein may be used for various wireless communication networks, such as code division multiple access (CDMA) system, time division multiple access (TDMA) system, frequency division multiple access (FDMA) system, orthogonal frequency division multiple access (OFDMA) system, single-carrier frequency division multiple access (SC- FDMA) system, wireless local area network (WLAN) system, and other networks. The terms “network” and “system” are often used interchangeably. A CDMA network may implement a radio access technology (RAT), such as Universal Terrestrial Radio Access (UTRA), evolved UTRA (E-UTRA), CDMA 2000, etc. A TDMA network may implement a RAT, such as global system for mobile communications (GSM). An OFDMA network may implement a first RAT, such as LTE or NR. A WLAN system may implement a second RAT, such as Wi-Fi. The techniques described herein may be used for the wireless networks and RATs mentioned above, as well as other wireless networks and RATs.

[0023] As used herein, the term “online PA bias voltage adjustment” may refer to a bias voltage adjustment that is applied to the PA during an uplink signal transmission. As also used herein, the term “APT adaptation process” may refer to an exemplary technique to estimate performance metrics, which may be used to identify an online PA bias voltage adjustment.

[0024] There are various mechanisms by which PA bias voltage can be adjusted to optimize

PA performance, and hence, the performance of the RF chip. One such mechanism is referred to as “average power tracking (APT) .” While operating in APT mode, the PA bias voltage (also referred to herein as “V cc ”) of the RF chip may be adjusted from symbol-to-symbol according to a target output power level associated with an uplink signal transmission. If PA bias voltage adjustments can be estimated with a high degree of accuracy, the linearity of the PA may be maintained while improving its efficiency.

[0025] The Tx auxiliary receiver (TAR) path of the RF chip is one way to monitor APT performance directly while the RF chip is in use. However, the accuracy of such performance measurements may be limited by the analog noise floor, and hence, the signal-to-noise ratio (SNR) of the TAR path. Consequently, it may be impractical to estimate performance metrics, e.g., such as error vector magnitude (EVM) performance, adjacent channel leakage ratio (ACLR) performance, and/or PA compression, for the purposes of online PA bias voltage adjustment using TAR path samples. Another challenge of online PA bias voltage adjustment relates to the presence of adjacent channel interference (ACI), e.g., such as an Out-Of-Band blocker (OOB). The presence of ACI may dominate TAR samples and degrade the accuracy of performance metric estimation. An inaccurate performance metric estimation may lead to an online PA bias voltage adjustment that is less than optimal. Thus, there exists an unmet need for an APT adaptation process that uses TAR samples to estimate a PA bias voltage adjustment with a high degree of accuracy even in the presence of ACI.

[0026] To overcome these and other challenges, the present disclosure provides an exemplary APT adaptation process that mitigates the presence of noise and/or ACI from TAR samples by kernel-fitting Tx input signal information and TAR samples. Kernels or other curvefitting algorithms may exploit the correlation of PA input voltage signals and PA output voltage signals to achieve an SNR that is higher than that of the TAR path. Furthermore, kernel-fitting may remove or reduce ACI when present, which may enable performance metrics to be estimated with a high degree of accuracy. Using the performance metrics, the RF chip of the present disclosure may estimate an optimal online PA bias voltage adjustment, even in the presence of TAR path noise and/or ACI. Additional details of the exemplary APT adaptation process are provided below in connection with FIGs. 1-5.

[0027] Although the techniques described below are directed to kernel -fitting for PA supply voltage adjustment based on APT, the same or similar kernel-fitting techniques may be used for PA supply voltage adjustment based on envelope tracking (ET) without departing from the scope of the present disclosure.

[0028] FIG. 1 illustrates an exemplary wireless network 100, in which some aspects of the present disclosure may be implemented, according to some embodiments of the present disclosure. As shown in FIG. 1, wireless network 100 may include a network of nodes, such as a user equipment 102 (UE), an access node 104, and a core network element 106. User equipment 102 may be any terminal device, such as a mobile phone, a desktop computer, a laptop computer, a tablet, a vehicle computer, a gaming console, a printer, a positioning device, a wearable electronic device, a smart sensor, or any other device capable of receiving, processing, and transmitting information, such as any member of a vehicle to everything (V2X) network, a cluster network, a smart grid node, or an Intemet-of-Things (loT) node. It is understood that user equipment 102 is illustrated as a mobile phone simply by way of illustration and not by way of limitation.

[0029] Access node 104 may be a device that communicates with user equipment 102, such as a wireless access point, a base station (BS), a Node B, an enhanced Node B (eNodeB or eNB), a next-generation NodeB (gNodeB or gNB), a cluster master node, or the like. Access node 104 may have a wired connection to user equipment 102, a wireless connection to user equipment 102, or any combination thereof. Access node 104 may be connected to user equipment 102 by multiple connections, and user equipment 102 may be connected to other access nodes in addition to access node 104. Access node 104 may also be connected to other user equipments. When configured as a gNB, access node 104 may operate in millimeter wave (mmW) frequencies and/or near mmW frequencies in communication with the user equipment 102. When access node 104 operates in mmW or near mmW frequencies, the access node 104 may be referred to as an mmW base station. Extremely high frequency (EHF) is part of the RF in the electromagnetic spectrum. EHF has a range of 30 GHz to 300 GHz and a wavelength between 1 millimeter and 10 millimeters. Radio waves in the band may be referred to as a millimeter wave. Near mmW may extend down to a frequency of 3 GHz with a wavelength of 100 millimeters. The super high frequency (SHF) band extends between 3 GHz and 30 GHz, also referred to as centimeter wave. Communications using the mmW or near mmW radio frequency band have extremely high path loss and a short range. The mmW base station may utilize beamforming with user equipment 102 to compensate for the extremely high path loss and short range. It is understood that access node 104 is illustrated by a radio tower by way of illustration and not by way of limitation.

[0030] Access nodes 104, which are collectively referred to as E-UTRAN in the evolved packet core network (EPC) and as NG-RAN in the 5G core network (5GC), interface with the EPC and 5GC, respectively, through dedicated backhaul links (e.g., SI interface). In addition to other functions, access node 104 may perform one or more of the following functions: transfer of user data, radio channel ciphering and deciphering, integrity protection, header compression, mobility control functions (e.g., handover, dual connectivity), inter-cell interference coordination, connection setup and release, load balancing, distribution for non-access stratum (NAS) messages, NAS node selection, synchronization, radio access network (RAN) sharing, multimedia broadcast multicast service (MBMS), subscriber and equipment trace, RAN information management (RIM), paging, positioning, and delivery of warning messages. Access nodes 104 may communicate directly or indirectly (e.g., through the 5GC) with each other over backhaul links (e.g., X2 interface). The backhaul links may be wired or wireless.

[0031] Core network element 106 may serve access node 104 and user equipment 102 to provide core network services. Examples of core network element 106 may include a home subscriber server (HSS), a mobility management entity (MME), a serving gateway (SGW), or a packet data network gateway (PGW). These are examples of core network elements of an evolved packet core (EPC) system, which is a core network for the LTE system. Other core network elements may be used in LTE and in other communication systems. In some embodiments, core network element 106 includes an access and mobility management function (AMF), a session management function (SMF), or a user plane function (UPF) of the 5GC for the NR system. The AMF may be in communication with a Unified Data Management (UDM). The AMF is the control node that processes the signaling between the user equipment 102 and the 5GC. Generally, the AMF provides quality-of-service (QoS) flow and session management. All user Internet protocol (IP) packets are transferred through the UPF. The UPF provides user equipment (UE) IP address allocation as well as other functions. The UPF is connected to the IP Services. The IP Services may include the Internet, an intranet, an IP Multimedia Subsystem (IMS), a PS Streaming Service, and/or other IP services. It is understood that core network element 106 is shown as a set of rackmounted servers by way of illustration and not by way of limitation.

[0032] Core network element 106 may connect with a large network, such as the Internet 108, or another Internet Protocol (IP) network, to communicate packet data over any distance. In this way, data from user equipment 102 may be communicated to other user equipments connected to other access points, including, for example, a computer 110 connected to Internet 108, for example, using a wired connection or a wireless connection, or to a tablet 112 wirelessly connected to Internet 108 via a router 114. Thus, computer 110 and tablet 112 provide additional examples of possible user equipments, and router 114 provides an example of another possible access node. [0033] A generic example of a rack-mounted server is provided as an illustration of core network element 106. However, there may be multiple elements in the core network including database servers, such as a database 116, and security and authentication servers, such as an authentication server 118. Database 116 may, for example, manage data related to user subscription to network services. A home location register (HLR) is an example of a standardized database of subscriber information for a cellular network. Likewise, authentication server 118 may handle authentication of users, sessions, and so on. In the NR system, an authentication server function (AUSF) device may be the entity to perform user equipment authentication. In some embodiments, a single server rack may handle multiple such functions, such that the connections between core network element 106, authentication server 118, and database 116, may be local connections within a single rack.

[0034] Each element in FIG. 1 may be considered a node of wireless network 100. More detail regarding the possible implementation of a node is provided by way of example in the description of a node 200 in FIG. 2. Node 200 may be configured as user equipment 102, access node 104, or core network element 106 in FIG. 1. Similarly, node 200 may also be configured as computer 110, router 114, tablet 112, database 116, or authentication server 118 in FIG. 1. As shown in FIG. 2, node 200 may include a processor 202, a memory 204, and a transceiver 206. These components are shown as connected to one another by a bus, but other connection types are also permitted. When node 200 is user equipment 102, additional components may also be included, such as a user interface (UI), sensors, and the like. Similarly, node 200 may be implemented as a blade in a server system when node 200 is configured as core network element 106. Other implementations are also possible.

[0035] Transceiver 206 may include any suitable device for sending and/or receiving data. Node 200 may include one or more transceivers, although only one transceiver 206 is shown for simplicity of illustration. An antenna 208 is shown as a possible communication mechanism for node 200. Multiple antennas and/or arrays of antennas may be utilized for receiving multiple spatially multiplex data streams. Additionally, examples of node 200 may communicate using wired techniques rather than (or in addition to) wireless techniques. For example, access node 104 may communicate wirelessly to user equipment 102 and may communicate by a wired connection (for example, by optical or coaxial cable) to core network element 106. Other communication hardware, such as a network interface card (NIC), may be included as well.

[0036] As shown in FIG. 2, node 200 may include processor 202. Although only one processor is shown, it is understood that multiple processors can be included. Processor 202 may include microprocessors, microcontroller units (MCUs), digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described throughout the present disclosure. Processor 202 may be a hardware device having one or more processing cores. Processor 202 may execute software. Software shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Software can include computer instructions written in an interpreted language, a compiled language, or machine code. Other techniques for instructing hardware are also permitted under the broad category of software. [0037] As shown in FIG. 2, node 200 may also include memory 204. Although only one memory is shown, it is understood that multiple memories can be included. Memory 204 can broadly include both memory and storage. For example, memory 204 may include random-access memory (RAM), read-only memory (ROM), static RAM (SRAM), dynamic RAM (DRAM), ferroelectric RAM (FRAM), electrically erasable programmable ROM (EEPROM), compact disc readonly memory (CD-ROM) or other optical disk storage, hard disk drive (HDD), such as magnetic disk storage or other magnetic storage devices, Flash drive, solid-state drive (SSD), or any other medium that can be used to carry or store desired program code in the form of instructions that can be accessed and executed by processor 202. Broadly, memory 204 may be embodied by any computer-readable medium, such as a non-transitory computer-readable medium.

[0038] Processor 202, memory 204, and transceiver 206 may be implemented in various forms in node 200 for performing wireless communication functions. In some embodiments, processor 202, memory 204, and transceiver 206 of node 200 are implemented (e.g., integrated) on one or more system-on-chips (SoCs). In one example, processor 202 and memory 204 may be integrated on an application processor (AP) SoC (sometimes known as a “host,” referred to herein as a “host chip”) that handles application processing in an operating system (OS) environment, including generating raw data to be transmitted. In another example, processor 202 and memory 204 may be integrated on a baseband processor (BP) SoC (sometimes known as a “modem,” referred to herein as a “baseband chip”) that converts the raw data, e.g., from the host chip, to signals that can be used to modulate the carrier frequency for transmission, and vice versa, which can run a real-time operating system (RTOS). In still another example, processor 202 and transceiver 206 (and memory 204 in some cases) may be integrated on an RF SoC (sometimes known as a “transceiver,” referred to herein as an “RF chip”) that transmits and receives RF signals with antenna 208. It is understood that in some examples, some or all of the host chip, baseband chip, and RF chip may be integrated as a single SoC. For example, a baseband chip and an RF chip may be integrated into a single SoC that manages all the radio functions for cellular communication. [0039] Referring back to FIG. 1, in some embodiments, user equipment 102 may include an exemplary RF chip configured to perform the present APT adaptation process. For example, the APT adaptation process may include kernel-fitting a corresponding set of Tx input signals and TAR samples to generate a PA model that models the non-linearity of the PA. The PA model may be used to estimate APT performance metrics, which are used to estimate or identify an online PA bias voltage adjustment. Kernels or other curve-fitting algorithms may exploit the correlation of PA input voltage signals and PA output voltage signals to achieve an SNR that is higher than that of the TAR path. Furthermore, kernel -fitting may remove or reduce ACI when present in the TAR samples, which enables the estimation of APT performance metrics with a high degree of accuracy. Using the APT performance metrics, user equipment 102 may achieve an optimal online PA bias voltage adjustment, even in the present of ACI. Additional details of the exemplary APT adaptation process are described below in connection with FIGs. 3-5.

[0040] FIG. 3 illustrates a block diagram of an apparatus 300 including a baseband chip 302, an RF chip 304, and a host chip 306, according to some embodiments of the present disclosure. Apparatus 300 may be implemented as user equipment 102 of wireless network 100 in FIG. 1. As shown in FIG. 3, apparatus 300 may include baseband chip 302, RF chip 304, host chip 306, and one or more antennas 310. In some embodiments, baseband chip 302 is implemented by processor 202 and memory 204, and RF chip 304 is implemented by processor 202, memory 204, and transceiver 206, as described above with respect to FIG. 2. Besides the on-chip memory 318 (also known as “internal memory,” e.g., registers, buffers, or caches) on each chip 302, 304, or 306, apparatus 300 may further include an external memory 308 (e.g., the system memory or main memory) that can be shared by each chip 302, 304, or 306 through the system/main bus. Although baseband chip 302 is illustrated as a standalone SoC in FIG. 3, it is understood that in one example, baseband chip 302 and RF chip 304 may be integrated as one SoC; in another example, baseband chip 302 and host chip 306 may be integrated as one SoC; in still another example, baseband chip 302, RF chip 304, and host chip 306 may be integrated as one SoC, as described above.

[0041] In the uplink, host chip 306 may generate raw data and send it to baseband chip 302 for encoding, modulation, and mapping. Interface 314 of baseband chip 302 may receive the data from host chip 306. Baseband chip 302 may also access the raw data generated by host chip 306 and stored in external memory 308, for example, using the direct memory access (DMA). Baseband chip 302 may first encode (e.g., by source coding and/or channel coding) the raw data and modulate the coded data using any suitable modulation techniques, such as multi-phase shift keying (MPSK) modulation or quadrature amplitude modulation (QAM). Baseband chip 302 may perform any other functions, such as symbol or layer mapping, to convert the raw data into a signal that can be used to modulate the carrier frequency for transmission. In the uplink, baseband chip 302 may send the modulated signal to RF chip 304 via interface 314. RF chip 304, through the transmitter (Tx) path 320 (e.g., which includes the Tx 322), may convert the modulated signal in the digital form into analog signals, i.e., RF signals, and perform any suitable front-end RF functions, such as filtering, digital pre-distortion, up-conversion, or sample-rate conversion. Antenna 310 (e.g., an antenna array) may transmit the RF signals provided by the transmitter of RF chip 304.

[0042] In the downlink, antenna 310 may receive RF signals from an access node or other wireless device. The RF signals may be passed to the receiver (Rx) 330 of RF chip 304. RF chip 304 may perform any suitable front-end RF functions, such as filtering, IQ imbalance compensation, down-paging conversion, or sample-rate conversion, and convert the RF signals (e.g., transmission) into low-frequency digital signals (baseband signals) that can be processed by baseband chip 302.

[0043] As shown in FIG. 3, RF chip 304 may include various hardware, firmware, and/or software (e.g., Tx path 320, a TAR path 340, a digital signal processor (DSP) 350, a microcontroller (uC) 360, etc.) that perform the APT adaptation process for online PA bias voltage adjustment. In some embodiments, the exemplary APT adaptation process may be initiated by uC 360 at predetermined intervals (e.g., 1ms, 5ms, 10ms, etc.). Additionally and/or alternatively, the exemplary APT adaptation process may be initiated by uC 360 opportunistically, e.g., such as when the power consumption of the PA meets a threshold condition. In either case, signal generator 370 may generate a Tx input signal that is injected along the Tx path 320 when instructed by uC 360. Input signal information, such as input voltage level information or input power level information, may be input into DSP 350 by either the Tx path 320, the input signal generator, and/or uC 360, for example. TAR path 340 may capture corresponding TAR samples via a coupler at an input to TAR path 340, which may be located between the PA (see FIG. 4A) and antenna 310.

[0044] DSP 350 may apply kernel -fitting to one or more of the Tx input signal information and/or TAR samples to generate a PA model associated with the PA’s non-linearity. Once the PA model is generated, DSP 350 may estimate one or more performance metric(s). Non-limiting examples of performance metrics that may be estimated by DSP 350 include, e.g., an EVM performance point, an ACLR performance point, and/or a PA compression point. DSP 350 may access a look-up table or function that correlates performance metric(s) with PA bias voltage adjustments. Thus, once the performance metric(s) is/are estimated, DSP 350 may identify and/or estimate the PA bias voltage adjustment using the look-up table and/or function. Information associated with the PA bias voltage adjustment may be sent to uC 360 and/or an RF front-end controller (RFFE) coupled to a PA bias voltage supply, as shown in FIG. 4A. The PA bias voltage supply may apply the PA bias voltage adjustment to the PA.

[0045] When the PA bias voltage adjustment is applied, the PA output power may be affected. Thus, to compensate for the PA output power change caused by the PA bias voltage adjustment, DSP 350 may identify a pre-adjusted Tx input signal power level and/or voltage level. DSP 350 may access a look-up table that correlates PA bias voltage adjustments with Tx input signal voltage/power levels target PA output power levels. Information associated with the preadjusted Tx input signal power level and/or voltage level may be sent to one or more of uC 360 and/or signal generator 370. uC 360 may indicate the pre-adjusted Tx input signal power/voltage level to signal generator 370. Signal generator 370 may generate a Tx input signal with the preadjusted voltage/power level so that the target PA output voltage/power level is maintained. Using the APT adaptation process described herein, the power consumption of the PA may be optimized, thereby reducing the overall power consumption of apparatus 300 and improving user experience. Additional details of the APT adaptation process are provided below in connection with FIGs. 4A, 4B, 4C, 4D, 4E, and 5.

[0046] FIG. 4 A illustrates a detailed block diagram 400 of the exemplary RF chip 304 of FIG. 3, according to some embodiments of the present disclosure. FIG. 4B illustrates a graphical representation of an exemplary PA model 425 generated by kernel-fitting, according to some embodiments of the present disclosure. FIG. 4C illustrates a first graphical representation of a PSD 435 associated with an actual PA output signal, a TAR signal, and a kernel -fitted signal, according to some embodiments of the disclosure. FIG. 4D illustrates a second graphical representation of a PDS 445 associated with an actual PA output signal, a TAR signal, and a kernel- fitted signal, according to some embodiments of the disclosure. FIG. 4E illustrates a third graphical representation of a PDS 455 associated with an actual PA output signal, a TAR signal, and a kernel- fitted signal, according to some embodiments of the disclosure. FIGs. 4A-4E will be described together.

[0047] Referring to FIG. 4A, RF chip 304 may include, e.g., Tx path 320, TAR path 340, DSP 350, uC 360, signal generator 370, RF integrated circuit (RFIC) 430, PA 402, switch-mode power supply (SMPS) 404, and band-filter 406. Tx path 320 may include Tx 322, a digital-to- analog circuit (DAC) 408, and an RFFE 410. RFIC 430 may include a first mixer 412, data amplifier (DA) 414, a local oscillator 416, a low-noise amplifier (LNA) 418, and a second mixer 420. An analog-to-digital converter (ADC) 422 may be coupled between second mixer 420 and TAR path 340. In some embodiments, one or more of first mixer 412, DA 414, PA 402, SMPS 404, and band-filter 406 may be considered part of the Tx path. In some embodiments, one or more of LNA 418 and second mixer 420 may be considered part of the TAR path.

[0048] The various hardware, software, and/or firmware of RF chip 304 depicted in FIG. 4A may be configured to perform the exemplary APT adaptation process. By way of example and not limitation, the exemplary APT adaptation process may include one or more of the following operations: 1) triggering Tx input signal and TAR sample captures, 2) kernel -fitting of the Tx input signal(s) and TAR sample(s) to generate a PA model, 3) estimating performance metric(s) based on the PA model, 4) estimating an online PA bias voltage adjustment based on the performance metric(s), and 5) estimating a pre-adjusted Tx input signal power level and/or voltage level based on the one PA bias voltage adjustment.

[0049] In some embodiments, the exemplary APT adaptation process may be triggered at predetermined intervals (e.g., 1ms, 5ms, 10ms, etc.). Additionally and/or alternatively, uC 360 may trigger the exemplary APT adaptation process opportunistically, e.g., such as when the power consumption of the PA meets a threshold condition. In some embodiments, the threshold condition may be met when the power consumption of PA 402 reaches or exceeds a threshold level. In some other embodiments, the threshold condition may be met when the power consumption of PA 402 meets or exceeds a threshold level for a predetermined length of time.

[0050] In either case, when the APT adaptation process is triggered, signal generator 370 may generate a Tx input signal that is injected along the Tx path 320. Input signal information, such as input voltage level information and/or input power level information, may be sent to DSP 350 by one or more of the Tx path 320, uC 360, and/or signal generator 370, for example. TAR path 340 may capture corresponding TAR samples via a coupler located between PA 402 and antenna 310. TAR path 340 may send the TAR samples to DSP 350. The TAR samples may include, e.g., the PA output signal, as well as TAR path noise and/or ACI.

[0051] Referring to FIG. 4B, to accurately estimate the actual PA output signal, DSP 350 may apply kernel-fitting to raw TAR samples 401 to generate a kernel-fitted PA model 403 (referred to hereinafter as “PA model 403”). The kernel (also referred to as a “polynomial”) may be selected such that PA model 403 has an SNR higher than that of TAR path 340. In other words, PA model 403 may model the non-linearity of PA 402 with a higher degree of accuracy than a PA model generated solely using raw TAR samples 401. Kernels have various factors that may be exploited so that enable the generation of a PA model with a higher SNR than that of TAR path 340. One factor may be that kernel-fitting exploits the correlation of Tx input signals (e.g., Vin) and raw TAR samples 401 (e.g., V ou t). Another factor may be that the analog noise floor of TAR path 340 is uncorrelated with the Tx input signal. Still another factor may be that that ACI is uncorrelated with the Tx input signal. For at least these reasons, PA model 403 may more accurately describe the PA’s non-linearity than a PA model generated solely based on raw TAR samples 401. A non-limiting example of a kernel that may be used by DSP 350 is depicted below in expression (1). However, other kernels and/or polynomials may be used to generate PA model 403 without departing from the scope of the present disclosure.

[0052] By way of example and not limitation, assuming x represents the Tx input signal vector and y represents the TAR sample vector, a kernel matrix H can be formed according to expression (1).

[0053] Then, using the least-squares method or another regression analysis, optimal kernel weight(s) w may be estimated, as shown below in expression (2). w = Rxx R X v (2), where w is the kernel weight(s), R xx = H H H, and R xy = H H y.

[0054] The kernel matrix H and the optimal kernel weights may be applied to raw TAR samples 401 to generate PA model 403. Since TAR path 340 usually has a limited SNR (e.g., 30 dB), using raw TAR samples 401 to estimate performance metrics (e.g., EVM, ACLR, PA compression, etc.) with a high degree of accuracy may be impractical. However, after kernelfitting, a more accurate performance metric estimation may be achieved with the use of PA model 403. For example, using the kernel-fitting technique described herein, the error of the estimated EVM may reduce the error of estimated EVEM to within 0.1%, e.g., from about 0.1% to about 0.05%. Thus, EVM estimation performed using PA model 403 may achieve a higher degree of accuracy than by using a model solely generated from raw TAR samples 401. Each performance metric may be estimated using, e.g., one or more kernel-fitting coefficients used to generate PA model 403. For example, the kernel weights w from expression (2) may be used to directly estimate the ACLR level for a given Vin. In another example, a modulated waveform scaled to a certain Vin may be passed through the kernel-based PA model, and the output waveform may be used to directly compute the EVM and/or ACLR level. The scaling level may be adjusted until the target performance is achieved.

[0055] Referring to FIG. 4C, a PSD 435 of raw TAR signal 411, kernel-fitted TAR signal 413, and the actual PA output signal 415 is shown. In FIG. 4C, raw TAR signal 411 includes the actual PA output signal 415 and noise caused by the analog noise floor of TAR path 340. When PA model 403 is applied to raw TAR signal 411, a kernel-fitted TAR signal 413 may be generated, which tracks actual PA output signal 415 with a high degree of accuracy. This level of accuracy can be seen in FIG. 4C because the kernel-fitted TAR signal 413 overlays the actual PA output signal 415 at most points. Not only does kernel-fitting mitigate the analog noise floor of TAR path 340, but kernel-fitting may also mitigate ACI (e.g., OOB), as depicted in FIG. 4D.

[0056] Referring to FIG. 4D, the Tx frequency of Tx path 320 may roughly correspond to the OOB region of Rx 330. The OOB level at the Tx antenna port may be around -15dBm, for example. Thus, assuming 40dB rejection of the coupler, TAR path 340 may observe an OOB of - 55dBm. Moreover, APT power may fall in a range between -40dBm to lOdBm, for example. In the APT power range of -lOdBm to lOdBm, lowering the PA supply voltage may reduce the amount of current drawn by PA 402 by a beneficial amount. Thus, assuming a coupling factor of 20dB, a -lOdBm to lOdBm signal at an input of TAR path 340 may have power between -30dBm to -lOdBm. Targeting an ACLR with a carrier power of -38dBc, the ACLR level may fall within the range of -68dBm to -48dBm. When compared with a -55dBm OOB, some methods of ACLR estimation may fail since the ACLR level is relatively close to the OOB. On the other hand, the kernel-based approach described herein may provide a robust and accurate ACLR measurement by mitigating OOB interference, as depicted in simulated results shown in FIG. 4D.

[0057] Sill referring to FIG. 4D, an OOB tone of -55dBm may occur at the coupler to the input of TAR path 340, e.g., due to Rx 330. Thus, TAR signal 417 may be made up of the actual Tx output signal, the analog noise floor of TAR path 340, and the ACI caused by the OOB tone. The actual PA output signal 415 at the TAR input is -30dBm, in one example. Estimating ACLR based on TAR signal 417 using techniques other than the exemplary APT adaptation process may yield an estimated ACLR of 25dBc, for example. On the other hand, using kernel-fitted TAR signal 413, the estimated ACLR may be 49.8dBc, which is significantly closer to the actual ACLR of around 50dBc.

[0058] Referring to FIG. 4E, in the presence of modulated OOB, TAR signal 417 may be dominated by ACI, which may lead to an inaccurate estimation of the ACLR without kernel-fitting. However, by applying kernel -fitting to TAR signal 417, a kernel -fitted TAR signal 413 may be achieved that more closely tracks the actual PA output signal 415. Thus, estimating ACLR based on kernel-fitted TAR signal 413 may achieve a more accurate result than using TAR signal 417.

[0059] Referring again to FIG. 4A, once the performance metric(s) is/are estimated, DSP 350 may access a look-up table or function that correlates performance metric(s) with PA bias voltage adjustments. DSP 350 compare the difference between the estimated performance metric and the target performance metric to the look-up table to determine an estimated PA bias voltage adjustment. This look-up table or function may be maintained in one or more of a local memory or storage device (not shown) at RF chip 304, on-chip memory 318 of baseband chip 302, and/or external memory 308. Information associated with the PA bias voltage adjustment may be sent to uC 360 and/or an RF front-end controller (RFFE) coupled to SMPS 404 (e.g., PA bias voltage supply), as shown in FIG. 4A. Then, SMPS 404 may apply the PA bias voltage adjustment to PA 402.

[0060] Moreover, when the PA bias voltage adjustment is applied, the PA output power may be affected. Thus, to compensate for the PA output power change, DSP 350 may identify a pre-adjusted Tx input signal voltage/power level using a look-up table or function that correlates PA bias voltage adjustments with Tx input signal voltage/power levels. This look-up table or function may be maintained in one or more of a local memory or storage device (not shown) at RF chip 304, on-chip memory 318 of baseband chip 302, and/or external memory 308. Information associated with the pre-adjusted Tx input signal power level and/or voltage level may be sent to one or more of uC 360 and/or signal generator 370. In some embodiments, uC 360 may indicate the pre-adjusted Tx input signal voltage/power level to signal generator 370. Signal generator 370 may generate a Tx input signal using the pre-adjusted Tx input signal voltage/power level information. Thus, a Tx input signal with the pre-adjusted Tx input voltage/power may be input to PA 402 while the online PA bias voltage adjustment estimated based on the APT adaptation process is applied thereto. Using the APT adaptation process described in connection with FIGs. 4A-4E, the power consumption of PA 402 may be optimized, thereby reducing the overall power consumption of RF chip 304 and improving user experience.

[0061] FIG. 5 illustrates a flowchart of an exemplary method 500 of wireless communication, according to embodiments of the disclosure. Exemplary method 500 may be performed by an apparatus for wireless communication, e.g., such as user equipment 102, node 200, processor 202, memory 204, transceiver 206, apparatus 300, RF chip 304, Tx path 320, Tx 322, TAR path 340, DSP 350, uC 360, signal generator 370, RFIC 430, PA 402, SMPS 404, bandfilter 406, DAC 408, RFFE 410, first mixer 412, DA 414, local oscillator 416, LNA 418, second mixer 420, ADC 422, or a combination thereof. Method 500 may include steps 502-516 as described below. It is to be appreciated that some of the steps may be optional, and some of the steps may be performed simultaneously, or in a different order than shown in FIG. 5. Referring to FIG. 5, at 502, the apparatus may receive, from a Tx path coupled to a PA, a set of Tx path samples. For example, referring to FIG. 4A, when the APT adaptation process is triggered, signal generator 370 may generate a Tx input signal that is injected along the Tx path 320. Input signal information, such as input voltage level information and/or input power level information may be sent to DSP 350 by one or more of the Tx path 320, uC 360, and/or signal generator 370, for example. In some embodiments, the set of Tx path samples are received periodically or opportunistically. Events that may trigger a Tx path sample capture/TAR path sample capture may include, e.g., a Tx power change, a temperature change, a frequency change, etc.

[0062] At 504, the apparatus may receive, from a TAR path coupled to an output of the PA, a set of TAR path samples. For example, referring to FIG. 4A, TAR path 340 may capture corresponding samples via a coupler located between PA 402 and antenna 310. TAR path 340 may send the TAR samples to DSP 350. In some embodiments, the set of TAR path samples are received periodically or opportunistically. Events that may trigger a Tx path sample capture/TAR path sample capture may include, e.g., a Tx power change, a temperature change, a frequency change, etc.

[0063] At 506, the apparatus may perform kernel-fitting based on the set of Tx path samples and the set of TAR path samples to generate the PA model. For example, referring to FIG. 4B, to accurately estimate the actual PA output signal, DSP 350 may apply kernel-fitting to raw TAR samples 401 to generate a kernel -fitted PA model 403 (referred to hereinafter as “PA model 403”). The kernel (also referred to as a “polynomial”) may be selected such that PA model 403 has an SNR higher than that of TAR path 340. In other words, PA model 403 may model the nonlinearity of PA 402 with a higher degree of accuracy than a PA model generated solely using raw TAR samples 401. Kernels have various factors that may be exploited so that enable the generation of a PA model with a higher SNR than that of TAR path 340. One factor is that kernel-fitting exploits the correlation of Tx input signals (e.g., Vm) and raw TAR samples 401 (e.g., V ou t). Another factor is that the analog noise floor of TAR path 340 is uncorrelated with the Tx input signal. Furthermore, another factor is that ACI is uncorrelated with the Tx input signal. For at least these reasons, PA model 403 may more accurately describe the PA’s non-linearity than a PA model generated solely based on raw TAR samples 401. A non-limiting example of a kernel that may be used by DSP 350 is depicted below in expression (1). However, other kernels and/or polynomials may be used to generate PA model 403 without departing from the scope of the present disclosure.

[0064] At 508, the apparatus may estimate a performance metric based on one or more coefficients associated with the kernel-fitting. For example, referring to FIG. 4B, each performance metric may be estimated using, e.g., one or more kernel-fitting coefficients used to generate PA model 403. For example, the kernel weights w from expression (2) may be used to directly estimate the ACLR level for a given Vm. In another example, a modulated waveform scaled to a certain Vin may be passed through the kernel-based PA model, and the output waveform may be used to directly compute the EVM and/or ACLR level. The scaling level may be adjusted until the target performance is achieved.

[0065] At 510, the apparatus may identify a PA bias voltage adjustment based on the performance metric. For example, referring to FIGs. 3 and 4A, once the performance metric(s) is/are estimated, DSP 350 may access a look-up table or function that correlates performance metric(s) with PA bias voltage adjustments. This look-up table or function may be maintained in one or more of a local memory or storage device (not shown) at RF chip 304, on-chip memory 318 of baseband chip 302, and/or external memory 308.

[0066] At 512, the apparatus may identify a Tx input signal voltage adjustment based on the PA bias voltage adjustment and a target output power of the PA. For example, referring to FIGs. 3 and 4A, when the PA bias voltage adjustment is applied, the PA output power may be affected. Thus, to compensate for the PA output power change, DSP 350 may identify a preadjusted Tx input signal voltage/power level using a look-up table or function that correlates PA bias voltage adjustments with Tx input signal voltage/power levels. This look-up table or function may be maintained in one or more of a local memory or storage device (not shown) at RF chip 304, on-chip memory 318 of baseband chip 302, and/or external memory 308.

[0067] At 514, the apparatus may apply the PA bias voltage adjustment to the PA. For example, referring to FIG. 4A, information associated with the PA bias voltage adjustment may be sent to uC 360 and/or an RF front-end controller (RFFE) coupled to SMPS 404 (e.g., PA bias voltage supply), as shown in FIG. 4A. Then, SMPS 404 may apply the PA bias voltage adjustment to PA 402.

[0068] At 516, the apparatus may apply the Tx input signal voltage adjustment to a subsequent Tx input signal. For example, referring to FIGs. 3 and 4A, information associated with the pre-adjusted Tx input signal power level and/or voltage level may be sent to one or more of uC 360 and/or signal generator 370. In some embodiments, uC 360 may indicate the pre-adjusted Tx input signal voltage/power level to signal generator 370. Signal generator 370 may generate a Tx input signal using the pre-adjusted Tx input signal voltage/power level information. Thus, a Tx input signal with the pre-adjusted Tx input voltage/power may be input to PA 402 while the online PA bias voltage adjustment estimated based on the APT adaptation process is applied thereto.

[0069] In various aspects of the present disclosure, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or encoded as instructions or code on a non-transitory computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computing device, such as node 200 in FIG. 2. By way of example, and not limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, HDD, such as magnetic disk storage or other magnetic storage devices, Flash drive, SSD, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a processing system, such as a mobile device or a computer. Disk and disc, as used herein, includes CD, laser disc, optical disc, DVD, and floppy disk where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0070] According to one aspect of the present disclosure, an RF chip is provided. The RF chip may include a Tx path coupled to an input of a PA. The Tx path may be configured to provide a set of Tx path samples associated with a first Tx input signal. The RF chip may include a TAR path coupled to an output of the PA. The TAR path may be configured to provide a set of TAR path samples. The RF chip may include a DSP. The DSP may be configured to receive the set of Tx path samples and the set of TAR path samples. The DSP may be configured to perform an APT adaptation process by kernel -fitting the set of Tx path samples and the set of TAR path samples.

[0071] In some embodiments, the DSP may be configured to perform the APT adaptation process by performing kernel -fitting based on the set of Tx path samples and the set of TAR path samples to generate a PA model. In some embodiments, the DSP may be configured to perform the APT adaptation process by estimating a performance metric based on one or more coefficients used in the kernel-fitting. In some embodiments, the DSP may be configured to perform the APT adaptation process by identifying a PA bias voltage adjustment based on the performance metric.

[0072] In some embodiments, the performance metric may be associated with an EVM performance of the PA, an ACLR performance of the PA, or a PA compression level.

[0073] In some embodiments, the RF chip may further include a bias voltage supply configured to apply the PA bias voltage adjustment.

[0074] In some embodiments, the DSP may be further configured to identify a Tx input signal voltage adjustment based on the PA bias voltage adjustment and a target output power of the PA. In some embodiments, the RF chip may include a signal generator configured to generate a second Tx input signal based on the Tx input signal voltage adjustment.

[0075] In some embodiments, the RF chip may include a microcontroller configured to initiate the APT adaptation process at predetermined intervals.

[0076] In some embodiments, the kernel -fitting may reduce one or more of OOB blocker interference or adjacent channel interference associated with the set of TAR samples.

[0077] According to another aspect of the present disclosure, an apparatus for digital signal processing is disclosed. The apparatus may include at least one processor. The apparatus may include memory having instructions stored thereon, which when executed by the at least one processor may cause the at least one processor to periodically receive a set of Tx path samples from a Tx path coupled to an input of a PA. The instructions, which when executed by the at least one processor, may cause the at least one processor to periodically receive a set of TAR path samples from a TAR path coupled to an output of the PA. The instructions, which when executed by the at least one processor, may cause the at least one processor to perform an APT adaptation process by kernel -fitting the set of Tx path samples and the set of TAR path samples.

[0078] In some embodiments, the instructions, which when executed by the at least one processor, may cause the at least one processor to perform the APT adaptation process by performing kernel-fitting based on the set of Tx path samples and the set of TAR path samples to generate a PA model. In some embodiments, the instructions, which when executed by the at least one processor, may cause the at least one processor to perform the APT adaptation process by estimating a performance metric based on one or more coefficients used in the kernel-fitting. In some embodiments, the instructions, which when executed by the at least one processor, may cause the at least one processor to perform the APT adaptation process by identifying a PA bias voltage adjustment based on the performance metric.

[0079] In some embodiments, the performance metric may be associated with an EVM performance of the PA, an ACLR performance of the PA, or PA compression level.

[0080] In some embodiments, the instructions, which when executed by the at least one processor, may further cause the at least one processor to cause a bias voltage supply to apply the PA bias voltage adjustment.

[0081] In some embodiments, the instructions, which when executed by the at least one processor, further cause the at least one processor to identify a Tx input signal voltage adjustment based on the PA bias voltage adjustment and a target output power of the PA.

[0082] In some embodiments, the instructions, which when executed by the at least one processor, further cause the at least one processor to initiate the APT adaptation process at predetermined intervals.

[0083] In some embodiments, the kernel-fitting may reduce one or more of OOB blocker interference or adjacent channel interference associated with the set of TAR samples.

[0084] According to another aspect of the present disclosure, a method of wireless communication of an RF chip is provided. The method may include receiving, from a Tx path coupled to an input of a PA, a set of Tx path samples associated with a Tx input signal for transmission to a base station. The method may include receiving, from a TAR path coupled to an output of the PA, a set of TAR path samples. The method may include adjusting, by a digital signal processor (DSP), power consumption of the PA by kernel-fitting the set of Tx path samples and the set of TAR path samples.

[0085] In some embodiments, the adjusting the power consumption of the PA may include performing kernel-fitting based on the set of Tx path samples and the set of TAR path samples to generate a PA model. In some embodiments, the performing the APT adaptation process may include estimating a performance metric based on one or more coefficients associated with the kernel-fitting. In some embodiments, the performing the APT adaptation process may include identifying a PA bias voltage adjustment based on the performance metric.

[0086] In some embodiments, the performance metric may be associated with EVM performance of the PA, ACLR performance of the PA, or PA compression level. In some embodiments, the kernel -fitting reduces one or more of OOB blocker interference or adjacent channel interference associated with the set of TAR samples.

[0087] In some embodiments, the method may include applying, by a bias voltage supply, the PA bias voltage adjustment to the PA.

[0088] In some embodiments, the method may include identifying, by the DSP, a Tx input signal voltage adjustment based on the PA bias voltage adjustment and a target output power of the PA. In some embodiments, the method may include applying, by a signal generator, the Tx input signal voltage adjustment to a subsequent Tx input signal.

[0089] In some embodiments, the method may include initiating, by a microcontroller, the APT adaptation process at predetermined intervals.

[0090] The foregoing description of the embodiments will so reveal the general nature of the present disclosure that others can, by applying knowledge within the skill of the art, readily modify and/or adapt for various applications such embodiments, without undue experimentation, without departing from the general concept of the present disclosure. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

[0091] Embodiments of the present disclosure have been described above with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed.

[0092] The Summary and Abstract sections may set forth one or more but not all exemplary embodiments of the present disclosure as contemplated by the inventor(s), and thus, are not intended to limit the present disclosure and the appended claims in any way.

[0093] Various functional blocks, modules, and steps are disclosed above. The arrangements provided are illustrative and without limitation. Accordingly, the functional blocks, modules, and steps may be re-ordered or combined in different ways than in the examples provided above. Likewise, certain embodiments include only a subset of the functional blocks, modules, and steps, and any such subset is permitted.

[0094] The breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.