The present invention relates to an apparatus and method for voltage sensing, and relates particularly, but not exclusively, to an apparatus and method for power sensing in energy harvesting systems.

Energy supply is of great importance in designing battery powered circuits, because the lifetime and utility of systems are limited by how long the batteries are able to sustain operation. Energy harvesting systems, in which energy is harvested from the environment around a device, become a promising alternative to battery supplies to increase system lifetime and reduce the maintenance cost of periodic battery replacement. However, because of the varying nature of the energy supplied from the environment compared with a battery source, different power management methods are required for energy harvesting systems than for battery powered systems. In addition, adaptive power management schemes need to be developed to adapt to the dynamics of energy consumers and of the energy supply of the system.

In order to enable run-time power management of energy harvesting systems, it is important to be able to carry out low overhead power sensing. A power sensor provides a measure of the existing energy reservoir, and can be used to enable the system to adapt to the energy supply. However, the operation of conventional power sensing apparatus becomes difficult, since many components, such as analogue to digital convertors used to enable digital control of the system, work under the assumption of a constant and stable power supply, which assumes unlimited current supply with a constant supply voltage. This assumption is no longer valid in energy harvesting systems, since the supply voltage drops while the system power- dissipates, and may rise when new energy is harvested. As a result, known power sensing apparatus requires a separate stable power supply in order to ensure its correct operation. This increases the equipment and maintenance cost of the apparatus.

Preferred embodiments of the present invention seek to overcome one or more of the above disadvantages of the prior art .

According to an aspect of the present invention, there is provided a voltage measuring apparatus comprising:- capacitor means adapted to be charged by means of a voltage to be measured; and

digital counter means having power supply terminals adapted to be selectively connected to said capacitor means during discharge thereof and to provide a digital output signal dependent upon the voltage level of said capacitor means at the start of said discharging of said capacitor means .

By providing digital counter means having power supply terminals adapted to be selectively connected to the

capacitor means during discharge thereof and to provide a digital output signal dependent upon the voltage level of the capacitor means at the start of said discharging, this provides the advantage that a separate stable power supply for powering the voltage measuring apparatus is no longer required, since the voltage measuring apparatus can be powered by the voltage source being measured. This in turn provides the advantage of reducing the equipment and

maintenance cost of the apparatus.

The counter means may comprise at least one toggle circuit adapted to produce output pulses when sufficient voltage is applied to power supply terminals thereof. This provides the advantage of enabling efficient digital processing of the output signal of the voltage measuring apparatus, by supplying a digital signal directly to a digital processor, because the voltage on the capacitor means at the start of discharging thereof will be dependent on the number of pulses generated by the toggle circuit. For example, in order to control operation of an energy

harvesting system incorporating the apparatus, the power of the energy harvesting system can be determined from a rapid measurement of the voltage on the capacitor means at the start of discharging, which can be input directly from the toggle circuit to a digital processor to provide a control signal for controlling the energy harvesting system.

The counter means may comprise a plurality of said toggle circuits interconnected to provide a multi-bit output signal .

This provides the advantage of enabling rapid and efficient processing of the output signal of the digital counter means.

A said toggle circuit of one stage of said counter means may be adapted to produce output pulses of twice the frequency of a said toggle circuit of a following stage of said counter means.

This provides the advantage of enabling a binary multi- bit counter to be efficiently provided.

The counter means may comprise at least one ring oscillator .

The counter means may be adapted to use thermometer coding .

According to another aspect of the present invention, there is provided an apparatus for controlling the power of an energy harvesting system, the apparatus comprising:- a voltage measuring apparatus as defined above for sensing a power level of said system; and

control means for receiving an output signal from said digital counter means and for generating a control signal for controlling operation of said energy harvesting system.

According to a further aspect of the present invention, there is provided a voltage measuring method comprising: - causing a voltage to be measured to charge capacitor means; and

selectively connecting said capacitor means to power supply terminals of digital counter means adapted to provide a digital output signal dependent upon the voltage level of said capacitor means at the start of said discharging of said capacitor means.

The counter means may be adapted to provide a multi-bit output signal.

A preferred embodiment of the invention will now be described, by way of example only, and not in any limitative sense, with reference to the accompanying drawings in which: -

Figure 1 is a schematic representation of a power sensing apparatus embodying the present invention for use with an energy harvesting system;

Figure 2 is a circuit diagram of an asynchronous toggle circuit of the apparatus of Figure 1;

Figure 3 is a signal transition graph describing operation of the toggle circuit of Figure 2;

Figure 4 is a two-bit counter including two toggle circuits of Figure 2;

Figure 5 is an n-bit asynchronous counter based on the counter of Figure 4; and

Figure 6 is a graph showing the dependence of the output of the counter of Figure 5 on supply voltage. Referring to Figure 1, a power sensing apparatus 2 for sensing the run-time power of an energy harvesting system 4 comprises a sampling capacitor 6 selectively connectable via a switch 8 to the energy harvesting system 4 and via a switch 10 to the power supply terminals of an asynchronous digital counter 12. The power sensing apparatus 2 has two states, i.e. a first state in which the switch 8 is on and switch 10 is off such that the sampling capacitor 6 is charged to a voltage Vin-Vsl where Vsl is the voltage drop across the switch 8, and a second state in which switch 8 is off and switch 10 is on so that the sampling capacitor 6 discharges through the power supply terminals of the counter 12. In the second state, the supply voltage to the counter 12 is Vin- Vsl-Vs2, where Vs2 is the voltage drop across the switch 10.

The capacitor 6 discharges exponentially through the counter 12 and the counter begins counting (i.e. producing an output signal representing a number of pulses generated by the counter 12) as soon as the voltage applied to its power supply terminals is high enough to operate its transistors. When the supply voltage of the counter 12 approaches zero, the amplitude of the counter signals also approaches zero and the switching activity by the transistors of the counter 12 ceases .

Referring to Figure 2, the asynchronous counter 12 includes a toggle circuit 14 comprising a first flip flop consisting of a pair of NAND gates 16, 18, wherein one of the NAND gates 16 provides an output signal Qt representing a number of pulses generated by the toggle circuit 14 since a sufficiently high supply voltage is applied to its power supply terminals (not shown) . The outputs of NAND gates 16, 18 are connected via respective NAND gates 20, 22 to

respective NAND gates 24, 26 of a second flip flop which provides output signals Q and Qn respectively. The output of NAND gate 24 is connected to the inputs of NAND gates 16 and 20, and the output of NAND gate 26 is connected to the inputs of NAND gates 18 and 22. The outputs of NAND gates 20 and 22 are connected to NAND gate 28, which supplies a reset signal R to the inputs of NAND gates 24 and 26.

The operation of the toggle circuit 14 shown in Figure 2 will now be described with reference to Figures 2 and 3.

Taking the initial state of the toggle circuit of

Figure 2 as Qt=0, R=0, Q=l and Qn=l, the output of NAND gate 22 is forced by the output of NAND gate 26 to 0, as a result of which the output of NAND gate 28 changes to 1 to change the reset signal R to 1. As a result, all of the inputs to NAND gate 24 are 1, which changes output Q of NAND gate 24 to 0. This in turn forces the outputs of NAND gates 16 and 20 to 1, as a result of which the output signal Qt of NAND gate 16 changes to 1. This in turn changes the output of NAND gate 18 to 0 and the output of NAND gate 22 to 1 so that both of the inputs to NAND gate 28 are now 1. The output of NAND gate 28 therefore goes to zero and the reset signal R becomes 0. As result, the output of NAND gate 24 (i.e. the output Q) becomes 1. This in turn causes the output of NAND gate 20 to become 0 and the output of NAND gate 28 (i.e. reset signal R) therefore becomes 1. As a result of this transition, all three inputs to NAND gate 26 are 1, and its output Qn

therefore becomes 0. This in turn forces the outputs of NAND gates 18 and 22 to 1, and since both inputs to NAND gate 16 are 1, output signal Qt therefore changes to 0. This in turn drives the output of NAND gate 20 to 1, which makes the output of NAND gate 28 zero so that the reset signal R becomes 0. This in turn drives the output of NAND gate 26 to 1 to bring the toggle circuit to its initial state, after which the entire process described above repeats itself as long as a sufficiently high voltage is applied to the voltage supply terminals to drive the transistors of the NAND gates of the circuit 14. It can therefore be seen that during the entire cycle, the output signal Qt goes from Oto 1 and back to zero, while the reset signal R goes from 0 to 1 and back to 0 twice.

Referring to Figure 4, a two-bit counter 32 comprises a pair of counters 14A, 14B, each of which is as disclosed in Figure 2 but instead of connecting the output of NAND gate 28 directly to the inputs of NAND gates 24, 26 as a reset signal as in Figure 2, the reset signal Rl for counter 14B is provided from output QnO of counter 14A via an inverter 34, and the output of NAND gate 28B of toggle circuit 14B is connected to the inputs of NAND gates 18A, 22A and 24A.

The operation of the two-bit counter 32 shown in Figure 4 will now be described.

As a result of the reset signal Rl for the second toggle circuit 14B of the counter being reset to 1 via inverter 34 when output QnO of the first toggle circuit 14A goes to 0, and the output of NAND gate 28B of toggle circuit 14B replacing the feedback effect of output QnO in toggle circuit 14A, it can be seen that during one complete cycle of operation of the toggle circuit 14A, the reset signal Rl goes from 0 to 1 and back to 0, whereas the reset signal R0 makes the transition from 0 to 1 and back to 0 twice. Accordingly, in order to ensure the complete cycle of operation of the toggle circuit 14B, i.e. in which the output signal Qtl goes from 0 to 1 and back to 0, two cycles of operation of the toggle circuit 14A are necessary, i.e. the output Qtl of the counter 32 toggles at half the frequency of the output QtO. The counter 32 therefore outputs a two-bit binary word at outputs QtO, Qtl representing the number of pulses produced by toggle circuit 14A, which in turn is dependent upon the initial level of voltage in the capacitor 6 of Figure 1. W

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The arrangement of Figure 4 can be extended by- cascading further toggle circuits 14 in a similar manner to produce an n+1 - bit asynchronous counter 12 as shown in Figure 5, (i.e. the counter 12 of Figure 1) in which the n+1 - bit digital word is taken from the outputs Qtl, Qt2 to Qtn. This provides a digital output signal which can be

efficiently processed by a digital controller to control operation of the energy harvesting system 4.

Referring to Figure 6, it can seen that the counter 12 of Figure 5 acts as an analogue to digital converter

providing a digital output dependent upon the voltage stored on sampling capacitor 6. Figure 6 shows the results of the output of the counter of Figure 5 for different values of the input voltage Vdd=Vout . It can be seen that the counter begins to work at about Vdd=0.2 volts and the digital counts are approximately linearly proportional to the input voltage from 0.2 volts to 0.7 volts. At input voltages higher than 0.7 volts, the curve flattens and converges to a count of 40, and the linear region of the curve provides a reasonable resolution of analogue to digital conversion. In this way, a low overhead power sensor is provided for the energy

harvesting system which does not require a separate stable power supply.

It will be appreciated by persons skilled in the art that the above embodiment has been described by way of example only, and not in any limitative sense, and that various alterations and modifications are possible without departure from the scope of the invention as defined by the appended claims. For example, instead of using flip flops, a digital counter can be provided which is based on ring oscillators. The counter 12 may comprise different

configurations of logic whose power supply comes from the capacitor 6. These configurations can produce different forms of digital information encoding. In the case of the toggle circuit 14 of Figure 2, the encoding is binary, where each bit of higher significance has the weight that is double of that of the lower significance bit, immediately before it. Less dense digital encoding can be used, for example a one hot code, such as 10000, 01000, 00100 ... in which logical one will propagate through a set of latches, or the so called thermometer code 00000, 10000, 11000, 11100, ... can be used, where a chain of buffers (e.g. built as pairs of inverters) propagates a wave of logical ones. Depending on the code used, and hence its information density (i.e. number of digital values per wire) , the sensor can have different amounts of energy required for changing the state of the counter. For example, the binary counter based on the toggles would require more energy per single count event than the thermometer code configuration based on the chain of buffers. This energy can be measured in terms of the number of

transitions of a gate as a rough estimate. In that case the toggle circuit based counter requires 18 transitions per count compared to only 2 transitions in the chain of buffers. This measure can help guide several design options and tradeoffs including the accuracy, delay of measurement and amount of energy consumption per sample of voltage, which will ultimately determine the value of the sampling capacitor and the time of its charge during the sample.