FIELD OF THE INVENTION

The present invention relates to an autonomous power supply switch with a main supply input and a backup supply input and a supply output to which a power consumer may be connected to supply the power consumer with power provided at the main supply input and to switch to the backup supply input, if the power provided at the main supply input is below a switch threshold of the autonomous power supply switch.

BACKGROUND OF THE INVENTION

There are all kind of different examples where a power consumer like an integrated circuit or a discreet circuit or a consumer device needs to be powered by either a main power source or in case this drops below a switch threshold by a backup power source. A power supply switch is needed to ensure that the main power source and the backup power source are disconnected from each other all the time and to ensure that the main power source is connected with the power consumer as long as the main power source delivers enough power. It is furthermore essential to ensure that the power supply switch only needs a short time to switch from main power source to the backup power source, if the main power source is not able anymore to deliver enough power to ensure stable operation of the power consumer.

Known power supply switches comprise a controller to measure the voltage of the main power source and compare it with the switch threshold voltage and to activate the mechanical or electronic switch to switch over from the connection of main power source with the power consumer to the connection of the backup power source with the power consumer. The switch of the power supply switch could be realized as mechanical relays or a power transistor like e.g. a thyristor. These known power supply switches comprise the disadvantage that the controller needs to be powered as well to work proper, what needs to be ensured by a separate power supply for the controller like a battery.

Document US 5,886,561 A discloses a switching circuit for switching between a main power supply and a battery power supply which uses a p-channel battery power transfer transistor, a p-channel main power transfer transistor and an inverter. This prior art switching circuit comprises a comparator with its output enabling a second steering point. This comparator increases the complexity, power consumption and prone to errors of the switching circuit.

SUMMARY OF THE INVENTION

It is an object of the invention to provide a power supply switch that is robust and always works in a proper and safe way. This object is achieved with a power supply switch as defined in claim 1.

This concept of an autonomous power supply switch comprises a first and a second switch transistor. These transistors may be realized by bipolar transistors with its connection between the collector and emitter terminals switched by the potential/voltage at the base terminal or may be realized by a field-effect transistor with its connection between the source and drain terminals switched by the potential on its gate terminal. Furthermore, these transistors may be realized as N-channel or NPN type transistors with a normal logic or as P- channel or PNP type transistors with an inverted logic. The claimed autonomous power supply switch may be realized with these types of transistors. In its simplest embodiment an inverter is connected between the second steering point and the first steering point. Furthermore the “threshold”, when these switch transistors switch, can be at any voltage depending on the switch transistor itself, and also on the technology node used (0.18pm or 40nm, etc.). It can be at 0.7V or 0.5V or 0.3 V. These thresholds of the switch transistors are different to the overall “switch threshold” of the autonomous power supply switch, which depends on the internal structure of the inverter. Finetuning the switch threshold to the required voltage can be done through careful selection and sizing of the switch transistors, combined with careful sizing of the push and pull transistors in the inverter relative to the size and gate capacitance of the switch transistors it is driving and can be in the range as explained below.

This simple way to connect the two switch transistors and the inverter with a first and second steering point in-between the main supply input, backup supply input and the supply output provides the advantages that neither a controller with an own power supply, nor a measurement or comparison means are needed. Therefore, a fast, robust, and safe way to switch between the two different power sources with a priority on the main power source is achieved.

In a second embodiment of the invention, the claimed autonomous power supply switch may be realized with a Schmitt trigger instead of the inverter. The Schmitt trigger introduces hysteresis so that the ON switch threshold voltage is higher than the OFF switch threshold voltage. This prevents any oscillations on the first steering point in case of relatively high startup current load on the supply output that causes the voltage on an unbuffered supply connected to the main supply input to spike down.

In a further embodiment a control transistor connected between the main supply input and ground potential with its gate/base connected to the first steering point enables that some remaining electrical charge still present at the main supply input at the time the main power source went down will be short circuited to ground potential, what safeguards that the gate/base terminal of the first switch transistor switches off the connection between the main supply input and the supply output. This increases the security and robustness of the power supply switch and prevents reverse currents into the main supply input.

In a further embodiment an ohmic resistor connected between the main supply input and the second steering point of the switch is used to protect the second switch transistor and the inverter or Schmitt trigger from voltage peaks at the main supply input. This increases the robustness of the power supply switch against voltage spikes and safeguards against potential damages.

These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter. A person skilled in the art will understand that various embodiments may be combined.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 shows a first embodiment of an autonomous power supply switch according to the invention using transistors of the PMOS type.

Figures 2 to 10 show voltage signals over time at relevant locations of the autonomous power supply switch of figure 1 in different constellations of supply inputs.

Figure 11 shows a second embodiment of an autonomous power supply switch according to the invention using transistors of the PMOS type.

Figure 12 shows a third embodiment of the invention that is similar to the first embodiment as shown in figure 1, but uses transistors of the NMOS type.

Figure 13 shows a fourth embodiment of the invention that is similar to the second embodiment as shown in figure 11, but uses transistors of the NMOS type. DETAILED DESCRIPTION OF EMBODIMENTS

Figure 1 shows an autonomous power supply switch 1 with a main supply input 2 and a backup supply input 3 and a supply output 4 to which a power consumer may be connected. A power consumer could for instance be an integrated circuit that needs to be supplied with DC 5V or a discreet circuit that needs to be supplied with DC 9V or a consumer device that needs to be supplied with DC 12V to name some examples. Depending on the transistors used voltages of DC 100 V and more with different current strength and power could be switched. There is a need that the power consumer is supplied with power even, if the power provided by a main power source connected to the main power supply 2 drops below a switch threshold. In that case the power supply switch 1 needs to switch autonomously and as fast as possible to a backup power source connected to the backup power supply 3 to continuously provide the power needed at the supply output 4. The main and backup power sources could be a battery, an accumulator, a power network or comparable devices or sources to provide the power needed. Power is meant to cover a specified voltage within an upper and a lower limit and an electrical current within an upper and lower limit needed by the power consumer. The relevant switch threshold to switch from the main power source to the backup power source is a voltage level.

In this first embodiment of the invention the power consumer is an integrated circuit that needs to be powered with a voltage of DC 1.8V, within the limits of maximal DC 3.3V and minimal DC 1.1V. The switch threshold of the autonomous power supply switch 1 has been set to DC 1 ,4V. Other switch threstholds could be realized by careful selection and sizing of the switch transistors SI and S2 explained below, combined with careful sizing of the push and pull transistors in the inverter relative to the size and gate capacitance of the switch transistors it is driving.

Switch 1 comprises a first switch transistor SI connected between the main supply input 2 and the supply output 4 in that way that its drain is connected to the main supply input 2 and its source and bulk are connected to the supply output 4. With its gate, the first switch transistor SI is connected to a first steering point 5 of the switch 1. Switch 1 furthermore comprises a second switch transistor S2 connected between the backup supply input 3 and the supply output 4 in that way that its drain is connected to the backup supply input 3 and its source and bulk are connected to the supply output 4. With its gate, the second switch transistor S2 is connected to a second steering point 6 of the switch 1. Both switch transistors SI and S2 are realized as MOSFET transistors of the PMOS type and could be realized as MOSFET transistors of the NMOS type with an inverted logic as shown in figure 12, where the bulks of the first switch transistor SI and the second switch transistor S2 are connected to ground potential G. Furthermore both switch transistors SI and S2 could be realized as NPN type transistors with normal logic as well as BJT transistors of the PNP type with an inverted logic. This means that main supply input 2 and supply output 4 are connected via the source and drain terminals of the first switch transistor SI, if the gate terminal of the first switch transistor SI is low (i.e. at ground potential G or close to ground potential G). The first switch transistor SI, on the other hand, disconnects main supply input 2 from supply output 4, if the gate terminal of the first switch transistor SI is high (i.e. at same voltage potential as the main supply input 2 or close to voltage potential of the main supply input 2).

The switch 1 furthermore comprises an inverter 7 with its input connected to the second steering point 6, its output connected to the first steering point 5, and its power supply connected to the backup supply input 3 of the switch 1. Ground potential G is the zero reference level for all other potentials and voltages of the switch 1.

In a preferred embodiment of the invention as shown in figure 1 switch 1 furthermore comprises a control transistor C connected with its source and drain terminal between the main supply input 2 and ground potential G in that way that its drain is connected to the main supply input 2 and its source is connected to ground potential G. With its gate, the control transistor C is connected to the first steering point 5. This control transistor C is realized as a weak pull-down transistor to pull the potential of the main supply input 2 to ground potential G, if the main supply input 2 is floating (i.e. high impedance). This control transistor C enables that some remaining electrical charge that is still present at the main supply input 2 at the time the main power source went down will be short circuited to ground potential G what ensures that the second steering point 6 is successfully discharged and pulled to ground potential G, in turn causing inverter 7 to drive the first steering point 5 high opening the first switch transistor SI which switches off the connection between the main supply input 2 and the supply output 4. This increases the security and robustness of the power supply switch 1.

In a preferred embodiment of the invention as shown in figure 1 switch 1 furthermore comprises an ohmic resistor R connected between the main supply input 2 and the second steering point 6 of the switch 1 to protect the second switch transistor S2 and the inverter 7 of the switch 1 from voltage spikes. Such voltage spikes may happen if a new main supply source is connected to the main supply input 2 which could create voltage spikes due to electrostatic discharge of more than 100V peak which could damage the transistors. The functionality of the autonomous power supply switch 1 will now be explained as follows. Since main supply input 2 has priority, it is used as the main supply source for the power consumer. When the main supply input 2 is turned ON, it drives the gate of the second switch transistor S2 high opening the second switch transistor S2 and isolating the supply output 4 from the backup supply input 3. Whether a backup supply source is connected to backup supply input 3 and a voltage is present or not is not relevant. As long as the main supply input 2 is ON, the gate terminal of the first switch transistor SI will always be driven low closing the first switch transistor SI and connecting the supply output 4 to the main supply input 2. This is due to the fact that when the backup supply input 3 is OFF, the inverter 7 is not supplied, therefore the output is zero, which closes first switch transistor SI. Furthermore, when the backup supply input 3 is ON, it supplies the inverter 7, which will again output a zero due to its high input voltage level coming from main supply input 2 at the second steering point 6.

In the case where both the main supply input 2 and the backup supply input 3 are present, and suddenly main supply input 2 disappears, the input voltage on the inverter 7 will drop causing the inverter output to switch to high and opening first switch transistor SI and turning ON the control transistor C. The control transistor C will ensure that the voltage at the main supply input 2 is pulled to ground potential G, even if the main supply input 2 is left floating (high impedance). This in turn will close the second switch transistor S2 and connect the supply output 4 to the backup supply input 3, effectively creating a voltage supply redundancy.

According to above explanation of the functionality of the autonomous power supply switch 1, a method is realized to supply the power consumer connected to the autonomous power supply switch 1 according to figure 1 with priority with the main power source connected to the main supply input 2 or with the backup power source connected to the backup supply input 3. This method comprises the following steps:

Connect the main supply input 2 with the supply output 4 via the first switch transistor SI and disconnect the backup supply input 3 from the supply output 4 via the second switch transistor S2, if the voltage provided at the main supply input 2 is above the switch threshold of DC 1.4 V. Furthermore, connect the backup supply input 3 with the supply output 4 via the second switch transistor S2 and disconnect the main supply input 2 from the supply output 4 via the first switch transistor SI, if voltage provided at the main supply input 2 is below the switch threshold. Furthermore, connect the main supply input 2 with ground potential G via the control transistor C, if voltage provided at the main supply input 2 is below the switch threshold of DC 1.4 V. These switch thresholds of the autonomous power supply switch are just examples and could be configured to any other voltage level a person skilled in the art deems useful.

Figures 2 to 10 show voltage signals over time at relevant locations of the autonomous power supply switch 1 of figure 1 in different constellations of supply inputs. Figure 2 shows an example of the voltage signals at the stated locations, if main supply source connected to main supply input 2 is switched ON and backup supply source at backup supply input 3 switches ON to DC 1.8V and later OFF to DC 0V again.

Figure 3 shows an example of the voltage signals at the stated locations, if main supply source connected to main supply input 2 is OFF and backup supply source at backup supply input 3 switches ON to DC 1.8V and later OFF to DC 0V again.

Figure 4 shows an example of the voltage signals at the stated locations, if main supply source connected to main supply input 2 is FLOATING and backup supply source at backup supply input 3 switches ON to DC 1.8V and later OFF to DC 0V again.

Figure 5 shows an example of the voltage signals at the stated locations, if backup supply source connected to backup supply input 3 is ON and main supply source at main supply input 2 switches ON to DC 1.8V and later OFF to DC 0V again.

Figure 6 shows an example of the voltage signals at the stated locations, if backup supply source connected to backup supply input 3 is ON and main supply source at main supply input 2 switches ON to DC 1.8V and later is FLOATING.

Figure 7 shows an example of the voltage signals at the stated locations, if backup supply source connected to backup supply input 3 is OFF and main supply source at main supply input 2 switches ON to DC 1.8V and later OFF to DC 0V again.

Figure 8 shows an example of the voltage signals at the stated locations, if backup supply source connected to backup supply input 3 is OFF and main supply source at main supply input 2 switches ON to DC 1.8V and later is FLOATING.

Figure 9 shows an example of the voltage signals at the stated locations, if the main supply source connected to the main supply input 2 and the backup supply source connected to backup supply input 3 RAMP UP together switching ON and then OFF again. Figure 10 shows an example of the voltage signals at the stated locations, if the main supply source connected to the main supply input 2 and the backup supply source connected to backup supply input 3 RAMP UP together switching ON and are then FLOATING.

Figure 11 shows a second embodiment of a claimed autonomous power supply switch 8 that is realized with a Schmitt trigger 9 instead of the inverter 7 of the embodiment in figure 1. All other elements are the same as in the embodiment shown in fiugre 1. The Schmitt trigger 9 introduces hysteresis so that the ON switch threshold voltage is higher than the OFF switch threshold voltage. This prevents any oscillations on the first steering point 5 in case of relatively high startup current load on the supply output 4 that causes the voltage on an unbuffered supply connected to the main supply input 2 to spike down.

Figure 12 shows a third embodiment of a claimed autonomous power supply switch 10 that is similar to the first embodiment with the inverter 7 as shown in figure 1, but uses transistors of the NMOS type. Due to the different types of transistors, the gate of the first switch transistor SI has to be connected with the second steering point 6 and the gate of the second switch transistor S2 has to be connected with the first steering point 5 to achieve the same logic functionality.

Figure 13 shows a fourth embodiment of claimed autonomous power supply switch 11 that is similar to the second embodiment with the Schmitt trigger 9 as shown in figure 11, but uses transistors of the NMOS type. Due to the different types of transistors, the gate of the first switch transistor SI has to be connected with the second steering point 6 and the gate of the second switch transistor S2 has to be connected with the first steering point 5 to achieve the same logic functionality.

The autonomous power switches 1 and 8 as shown in figures 1 and 11 are the preferred embodiments due to the diode connections formed at autonomous power switches 10 and 11 as shown in figures 10 and 13 when either one of the NMOS switch transistors SI or S2 turn ON and thus causing a voltage drop between input and output that is inherently higher than the potential voltage drop when using autonomous power switches 1 or 8 with PMOS type transistors. However, this doesn't mean that the autonomous power switches 10 and 11 with the NMOS type transistors do not comprise advantages as well. Although the PMOS embodiments are more efficient, in some scenarios it is advantageous due to the diode connection preventing reverse current flow back to the main supply input 2 and the backup supply input 3. With above examples it becomes clear that for all these different constellations of supply inputs the autonomous power supply switch 1 always switches correct and fast in a robust way. Therefore, supply redundancy for critical power consumers is provided with a simplistic approach to autonomously switch between the available power sources. Powering down parts of the chip is allowed, without losing functionality in critical blocks.

The autonomous power supply switch 1 of figure 1 could be realized by discrete parts or within an integrated circuit. The type and specification of the switch transistors will enable higher or lower supply power/ supply voltages to be switched.