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Title:
BLOCK INSTRUCTION PROCESSING METHOD AND BLOCK INSTRUCTION PROCESSOR
Document Type and Number:
WIPO Patent Application WO/2024/087039
Kind Code:
A1
Abstract:
Disclosed in the embodiments of the present application are a block instruction processing method and a block instruction processor, wherein a block instruction comprises a block header and a block body. The method comprises: acquiring an i-th block header; on the basis of first information indicated by the i-th block header, distributing the i-th block header to a j-th block execution unit, wherein the first information indicated by the i-th block header comprises input register information and output register information of an i-th block instruction which corresponds to the i-th block header; by means of the j-th block execution unit, acquiring an i-th block body on the basis of second information indicated by the i-th block header, wherein the i-th block body corresponds to a block body of the i-th block instruction, and the second information indicated by the i-th block header comprises a storage location of the i-th block body, i being an integer greater than 1, and j being an integer greater than or equal to 1; and executing N micro-instructions, which are comprised in the i-th block body, wherein N is an integer greater than or equal to 1. By using the embodiments of the present application, the execution efficiency of a block instruction can be effectively improved.

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Inventors:
ZHOU RUOYU (CN)
ZHANG GUOWEI (CN)
ZHU FAN (CN)
SU FANG (CN)
ZHOU XIPING (CN)
LIAO HENG (CN)
Application Number:
PCT/CN2022/127507
Publication Date:
May 02, 2024
Filing Date:
October 25, 2022
Export Citation:
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Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
G06F9/06
Foreign References:
CN108027769A2018-05-11
CN101114218A2008-01-30
US20140122843A12014-05-01
Attorney, Agent or Firm:
SCIHEAD IP LAW FIRM (CN)
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