Title:
BONDING STRUCTURE AND FABRICATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2021/134940
Kind Code:
A1
Abstract:
Provided in the present invention are a bonding structure and a fabrication method therefor. A chip is bonded onto a wafer, a mixed bonding structure is formed on a die of the wafer, and a back connection line structure and a mixed bonding structure are also pre-formed on the back surface of the chip. Thus, electrical lead-out of an interconnecting structure in the chip is implemented by means of the back connection line structure, and the chip can further be bonded to the mixed bonding structure on the die by means of a mixed interconnecting structure on the chip, thus achieving the interconnection of the chip and the wafer. In the present solution, there is no need to carry out the processes of filling and grinding a large number of dielectric layers after chip bonding, which, while reducing fabrication costs can better ensure consistency between chips, and has better scalability.
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Inventors:
LIU TIANJIAN (CN)
HU XING (CN)
ZHAN DI (CN)
GUO WANLI (CN)
HU XING (CN)
ZHAN DI (CN)
GUO WANLI (CN)
Application Number:
PCT/CN2020/081525
Publication Date:
July 08, 2021
Filing Date:
March 27, 2020
Export Citation:
Assignee:
WUHAN XINXIN SEMICONDUCTOR MFG (CN)
International Classes:
H01L21/60; H01L23/488
Foreign References:
| CN109192718A | 2019-01-11 | |||
| US20170141071A1 | 2017-05-18 | |||
| CN104916619A | 2015-09-16 | |||
| CN1708840A | 2005-12-14 | |||
| CN101026102A | 2007-08-29 |
Attorney, Agent or Firm:
UNITALEN ATTORNEYS AT LAW (CN)
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