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Patent Searching and Data


Title:
BUFFERING METHOD AND INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2022/206397
Kind Code:
A1
Abstract:
Provided in the present application are a buffering method and an integrated circuit, which can avoid a false hit. The buffering method comprises: acquiring a first packet, wherein the first packet comprises a destination internet protocol (IP) address; searching a buffer for a routing prefix that matches the destination IP address; in response to the fact that the routing prefix is not stored in the buffer, searching, according to the destination IP address, for a tree structure corresponding to a routing table, and determining a prefix node that matches the destination IP address; in response to the fact that the prefix node is not a leaf node, a processor determining a first prefix match length, wherein the first prefix match length is equal to the length between a root node and a tail node of the tree structure; determining a first routing prefix according to the first prefix match length and the destination IP address; and triggering the buffer to store a first correspondence, wherein the first correspondence is a correspondence between the first routing prefix and routing information that corresponds to the prefix node.

Inventors:
YU JINGZHOU (CN)
LIU YANG (CN)
YANG FEIRAN (CN)
GUO LINGBO (CN)
XING YUSHENG (CN)
ZHOU LIWEI (CN)
Application Number:
PCT/CN2022/081320
Publication Date:
October 06, 2022
Filing Date:
March 17, 2022
Export Citation:
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Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
H04L45/24
Foreign References:
CN108259326A2018-07-06
CN101577662A2009-11-11
CN107347035A2017-11-14
US20040052251A12004-03-18
Attorney, Agent or Firm:
SHENPAT INTELLECTUAL PROPERTY AGENCY (CN)
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