FIELD OF THE INVENTION

The present invention is related to computer chip technology, especially being a representation method of computer chip data, a mathematical operation method to use this method for addition, subtraction and multiplication etc., and the operation blocks to realize mathematical operation according to this method. BACKGROUND OF THE INVENTION

At present all the computer chips in market represent a number by dividing it into its ones, tens, hundredths parts and so on. For example, 9999 is represented as 9000+900+90+9. This phenomenon is also referred to as OPENING UP". When the said technique is used for addition, subtraction, multiplication and so on, the operations will be completed through a series of additions. Restricted by data representation means, the said operations will need more physical memory. Further more, longer time is needed due to the restriction of clock count and operation times. Therefore, it is impossible to use the current circuits to effectively pick up chip operation speed.

OBJECT OF INVENTION

The first object of this invention is to supply a computer data representation method which can effectively pick up data operation speed and keep data intact.

The second object of this invention is to supply an operation method which can effectively pick up the speed of addition, subtraction, multiplication and other operations through the application of improved data representation method.

The third object of this invention is to supply an operation block which performs data addition operation with the application of improved data representation method.

The forth object of this invention is to supply an operation block which performs data multiplication operation with the application of improved data representation method.

The fifth object of this invention is to supply an operation block which performs data subtraction operation with the application of improved data representation method.

The sixth object of this invention is to supply a logic block

which judges bigger and smaller numbers with the application of improved data representation method.

A representation method of computer internal data has been provided, it does not represent the number as its ones, tens, hundredths parts and so on, but keeps it intact and does the operations directly without breaking the number. This invention improves the division representation of the current data representation method of computer internal chips into integral representation; based on this, it effectively improves data addition, subtraction, multiplication and other mathematical operations through newly designed addition, multiplication, subtraction and logic blocks; it improves the current multiple additions in addition, multiplication, subtraction and other mathematical operations into simple circuit operation; it effectively improves the speed of mathematical operation; during the operation, only two-digit physical memory at STES and SOTES are needed, which effectively lowers memory occupation and picks up operation speed; during mathematical operation, due to the logic gate circuit

points of this invention have no memory, clock only counts 1 operation for 100 operations of the logic gate circuit, and because of this the microprocessor can work on full speed; it also makes the microprocessor chip independent of the limitation of the system clock required to synchronize the microprocessor operations. The chip speed can be effectively improved with this invention.

Summary of the invention

The advancements made in this invention namely the addition, multiplication and subtraction are discussed. Here carry data ^' refers to the left side digit and result data refers to the right side digit.

In an embodiment the addition operation is:

A. Software interface firstly sends the ones digit of the first number to the first storage block, and then sends the ones digit of the second number to the first storage block. The first storage block (STES 3) releases the data to the first addition block. The first addition block will perform the operation.

B. The carry data and result data obtained from the operation of the first addition block are stored independently in storage block(SOTES) of the BLOCK A1 , and the storage block of the first addition block sends the result data first to the STES4 where "0" has been stored in the initial programming. The second storage block (STES4) will release its initial value "0" and the result data for operation in the second addition block(BLOCK A2), and then,

the carry data of the first addition block will be sent to the second storage block(STES4).

C. The carry data and result data obtained from the operation of the second addition block are stored independently in storage block (SOTES) of BLOCK A2, and the storage block of the second, addition block sends the result data first to the third storage block(STES 5) where "0" has been stored, in the initial programming. The third storage block (stes5) will release its initial value "0" and the result data for operation in the third addition block, and then, the carry data of the second addition block will be sent to the "STES5" block.

D. The carry data and result data obtained from the operation of the third addition block are stored independently in storage block(SOTES) of BLOCK A3, and the storage block of the third addition block sends the result data first to the fourth storage block STES 6 where "0" has been stored in the initial programming. The fourth condition pass block will release its initial value "0" and the result data for operation in the fourth

addition block, and then, the carry data of the third addition block will be sent to the fourth storage block(stesθ) .

E. Performing the above operation the sixth addition block will give the result data as the output(ones place digit) while the carry data(O) will be deleted and not stored in SOTES. Also the carry data of previous addition blocks is released for storage in the subsequent storage blocks.

F. The software interface will send the higher bit(ten's digit) of the first number to the first condition pass block, and then sends the higher bit(ten's digit) of the second number to the first condition pass block. The first addition block will perform the operation; and this time the subsequent STES are having carry data from the previous operation stored in the place of zero.

G. Repeating the above steps B, C, D ₁ E ₁ F; at this time, the initial value of the second, third .fourth .fifth and sixth STES blocks is the carry number obtained from the addition of the former digit. With each cycle of B, C ₁ D, E and F, the output of the sixth addition block will move a bit to a higher digit (i.e. from one's

place to ten's place and so on), until all the digits have been added .

H. Performing addition of "0"+"0", the initial value of each STES block and SOTES of ADDITION BLOCK is restored to "0".

In an embodiment, the multiplication operation is:

A. Software interface firstly sends the ones digit of the first number to the first storage block or condition pass block STES 9, and then sends the ones digit of the second number to STES 9. The condition block will release the two digits for operation in the BLOCK M1, and the carry data and result data obtained by the multiplication block will be temporarily stored in its storage block SOTES.

B. Then, the result data of the multiplication block will be sent first to the second condition pass block STES 10 where "0" has been stored in the initial programming. The second condition pass block will release the "0" and result data for operation in the first addition block, and the carry data of the multiplication block will be sent in the place of "0" to the second condition pass block for

storage.

C. The first addition block will temporarily store the carry data in its storage block, while the result data will be sent to the third condition pass block STES 11 where "0" has been stored in the initial programming. The "0" and result data of the third condition pass block will be released to the second addition block.

D. Continuing the above operations, the result of the sixth addition block will be the result data while the carry data will be removed from the sixth addition block. Also the sixth addition block will release its result data for storage in the ones place of the output block. Also the carry data of previous multiplication and addition blocks will be released for storage in the subsequent STES to be stored in the place of zero.

E. And then, the ten's digit of the first number and the one's digit of the second number will be released respectively to the first condition pass block STES 9 which will release the two digits for operation in the multiplication block .

F. This operation of changing to the higher digit on the first

number while taking the lower digit from the second number will continue as long as there are higher digits in the first number. When all the digits of the first number have been sent for the multiplication ,the software will perform a "0" multiply "0" operation before shifting so as to get the final output of the multiplication of first number and the one's digit of the second number and also to bring all the blocks to the initial condition. Now the software will release the tens digit of the second number and one's digit of first number to the storage block STES 9. The entire output of the multiplication of the first number and the ones digit of the second number will be stored in the output block.

G. Now the software will take the tens digit from the second number and ones digit of the first number to STES 9. Continuing the above steps A, B ₁ C, D, E, F we will get the result of multiplication of the first number and the tens digit of the second number. Since the software has shifted once from one digit to other of the second number, at the end of multiplication of first number and the ten's digit of the second number, it will add an

additional zero at the end of output of multiplication of first number and ten's digit of second number. That means if the output is 261 it will store it as 2610. It has been explained in the example as well. It will be stored in the output block which will send all these numbers for addition in the addition block. The addition block will send the final output to the user interface.

In an embodiment, the subtraction operation is

A. The software compares the two numbers and finds out the bigger one. This is done by using LOGIC BLOCK. If the number of digits of these two numbers are different from each other, the number with fewer digits will be added with several "0" as shown in the example until they have same number of digits. After that, they will be compared with the application of logic block.

B. Logic block obtains the highest digits of the two numbers. If the highest digit of the former number is bigger, it will give an output of "1" and judges the number before the minus is bigger and performs specific subtraction. If the highest digit of the first number is smaller, it will give an output of "2" and judges the

number behind the minus is bigger. And then, the positions of the two numbers will be exchanged and specific subtraction will be performed. Besides, a minus will be added before the final result. If they have the same highest digits, it will give an output of "3". And then, the lower digits will be compared until the first different digit will be found out. If all the digits are the same, "0" will be the final output .

C. The software will take the one's digit from the first number and the ones digit from the second number and sends them to the condition pass block STES 16. STES 16 will release these numbers for subtraction in the first subtraction block.

D. The first subtraction block will release the result data obtained by it to the second condition pass block (STES17) and the carry data will be stored in the SOTES. In STES 17 "0" has been stored in the initial programming. The second condition pass block will release the result data minus "0" for operation in the second subtraction block, and then, the first subtraction block will release the carry data to be stored in STES 17 to be

subtracted from the next result data.

E. The second SUBTRACTION BLOCK will release the result data obtained by it to the third condition pass block STES 18 where "0" has been stored in the initial programming. The third condition pass block will release the result data minus "0" for operation in the third subtraction block, and then, the second subtraction block will release the carry data to the third condition pass block STES 18 to be subtracted from the next result data.

F. Continuing the above steps the sixth subtraction block will release result data to be stored in the one's place in the output. The sixth subtraction block will send the result data obtained by it to the ones place of the output, and the carry data will be blocked at its storage block.

G. Now we will send ten's digit of the bigger number and the ten's digit of the smaller number to STES 16 .Repeating C, D, E, F; at this time, the initial value of the STES blocks is the carry digit which will be subtracted from the next result digit. With each cycle of C, D, E AND F, the output of the sixth subtraction block will

move to a higher digit, that is first cycle will give one's digit, next cycle will give ten's digit and the third cycle will give hundredths digit and so on.

H. When all the digits have been subtracted, perform a "0"- ¹¹ O" operation to bring all the STES and SOTES to the initial state. DESCRIPTION OF THE DRAWINGS:

NOTE: In the circuit drawings of number identifiers,, number generators, and sequencers, there are numbers at the input and output ends of logic gates (AND GATE, OR GATE, NOT GATE). These numbers show the connection points. Also the input of each circuit has been marked 1 ,2,3,4 to show sequence of input.

For the purpose of making the invention easier to understand, some particular embodiments will now be described with reference to the appended drawings in which:

Figure 1 is the logic diagram of this invention.

Figure 2-4 are respectively the addition, multiplication and subtraction logic block diagrams of this invention.

Figure 5-8 are respectively the BLOCK A, BLOCK M, BLOCK

S, BLOCK L. These are the basic building blocks for addition, multiplication and subtraction blocks.

Figure 9 shows one of the basic building blocks of BLOCK A, BLOCK M, BLOCK S. This circuit gives valid signal when NA and NB are different. The values of both Number identifiers varies from 0-9. The values of Number Generators varies from 0-9. The values of "SE AB" is such that A is not equal to B. By altering the values of NA ₁ NB, GA, GB, SEAB, 90 base circuits are obtained Jn the BLOCK A, BLOCK M, BLOCK S.

Figure 10 shows the second basic building block of BLOCK A, BLOCK M, BLOCK S. This circuit is applicable when two same digits are given one after another. The value of Number identifier varies from 0-9. The values of Number Generators varies from 0- 9. By altering the values of NA, GA, GB, 10 base circuits are obtained in the BLOCK A, BLOCK M, BLOCK S.

Figure 11 shows the one of the basic building blocks of BLOCK L. This circuit gives valid signal when NA and NB are different. The values of both Number identifiers varies from 0-9.

The values of Number Generator varies from 1-2. The values of "SE AB" is such that A is not equal to B. By altering the values of NA ₁ NB, GA, SEAB, 90 base circuits are obtained in the BLOCK

Figure 12 shows the second basic building block of BLOCK L. This circuit is applicable when two same digits are given one after another. The value of Number identifier varies from 0-9. The value of Number Generator is 3. By altering the values of NA, 10 base circuits are obtained in the BLOCK L.

Figure 13-26 are respectively the logic circuit diagrams number identifiers of numbers N0-N9 and four mathematical operators namely addition, subtraction, multiplication and division.

Figures 27-36 are respectively the logic circuit diagrams of number generator circuit G0-G9 of this invention.

Figures 37-126 are respectively the logic circuit diagrams of SEQUENCER SE AB (0<A<9, 0<B<9; A and B are integers) where A is not equal to B.

Figure 127-136 are respectively the logic circuit diagrams of

sequencer circuit SE AB (0<A<9, 0<B≤9; A and B are integers) where A is equal to B. In these sequencers, only Initializer and the logic of operation of software constitute the sequencer.

Note: The sequencer circuits are having Number identifiers as the starting points. Number identifiers at the start are not a part of sequencers. They have been shown to explain logic properly.

DETAILED DESCRIPTION OF THE WORKING OF THE CIRCUIT AND LOGIC OF "CALCULATOR BIT PROCESSOR"

STES: This block signifies a data storage location. At all the blocks specified by "STES", the software will not let the data pass until a specified number of valid digits have been received. At this point a logic operation is being performed, to check whether 2 digits have been received (0000 is not a digit). If 2 digits have been obtained, these two digits will be released at the same time to the next stage. In case of blocks A, S, M, L ₁ ¹¹ STES" releases data of two digits at the same time.

SOTES: This block signifies a data storage location. At this

location the software will ensure that two valid digits have been received. It then releases these digits one at a time to the output of the block. If one digit is error signal (0000), then "SOTES" will not release the digits to output. If one of the signals is error signal, software will delete both the signals.

EXPLAINED LOGIC:

The input given by the user (in digits like 9, 0 etc) is converted into digital representation of four bits. The representations of various numbers and mathematical operators are given below. The current method is to represent all the number in a six bit representation, whereas I am using a four bit representation.

Figure 1: This is the block diagram of this invention:

In the block diagram, all the numbers like 9, 0 and the mathematical operators are passed through "STES 1" which lets these signals pass through the mathematical operators shown in the block diagram. These identifiers will let the signal pass through them only if the signal is of the number/operator specified.

If any other digit/operator comes they will generate "0000". This signal is taken as blocker/no signal. So when the signal are passed through these operators , only one of the mathematical operators will respond by letting a valid signal pass through it which reaches "STES 2". At "STES2" logic operation is performed and information is sent to "software interface". Software interface then sends the numbers to the specified mathematical block (addition, subtraction, multiplication). The mathematical block performs the operation and sends one digit (4 bits) at a time to the "output/user interface".

Note: Al! the blocks A, M, S, L are made of logic gates. They do not perform any operation but let the signal pass through them. Ex: 1 +1 will release "0", "2". There is no representation of the numbers. That is 9910 will not be represented as (9000 +900+10+ 0), but will be represented as (9910). The software takes one digit at a time from the first number and one from the second number. The answers given by blocks "A", "M" and "S" are the straight forward. 1*1 will release "0" and "1" as the answer. "1"+"1" will

release "0" and "2" as the answers. These digits are stored in the "SOTES" which lets the signal on the "right side" that is the "four bits " on the right side pass through first and then the "4 bits" on "left side " will be released. The unknown quality of this algorithm is that there is no representation because of which this logic will be able to perform addition operation of 2 numbers having very large number of digits like 900 million digits each.

That means if I had to do addition operation of two numbers of "9 digits" each, I will be processing nearly "18x4 bits". But based on the algorithm currently used in the markets, the chips will have to process nearly" 6 ^* (9+8+7+6+5+4+3+2+1) bits which is equal to 270 bits. Because of this difference in the number of bits to be processed , I do not need any compaction algorithm where as these chips will need a lot of compaction to be done.

In these blocks the operations require that the number of digits in both the numbers be same whether it is addition, multiplication or subtraction. Hence if we are to perform an operation of (111+1 T) then the software will read the two numbers

and perform a simple logic operation by counting the number bits in both the numbers and will add 0 at the end. I mean (111+11 ) will be represented as (111+ 011 ). Also in these circuits we take high voltage as 1 and low voltage as 0, we can take any of the following (5v, 2.5v-0v) or (2.5v-0v).

If two numbers are given for addition, multiplication or subtraction operation the software will first equate the number of digits in the two numbers like 9+ 99, 9x99 will become 09+99 and 09x99.

If 9-99 is given, in the subtraction block it will become 99-09. If the software reverses the sequence in the subtraction block it will put a negative sign before the output. Only one digit at a time will be sent to the blocks that means except in subtraction, the digits sent to all the blocks will be sent one digit from any of the two numbers at a time the only requirement is that the numbers should have the same designation, that means that "ones" place digits will be sent first then "tens " place digits will be sent, then "hundredths place digits will be sent. These digits will be sent one by one. Only in the subtraction block the sequence will be reversed and the

digit from the higher number will be sent first and the digit from the lower number will be sent after that. The only requirement will be that to ensure that both the digits are of the same value, that means the ones place digit from the higher number will be sent first and the ones place digit from the lower number will be sent later. The same sequence will be followed in higher digits during subtraction operation.

Figure No-2: Addition block:

Before addition, subtraction or multiplication the two numbers will be equated ,that means that the software will add zeros before the smaller number. That means

2+222

Will be made 002+222.

Here carry data refers to the left side digit and result data refers to the right side digit.

In an embodiment, the addition operation is:

A. Software interface firstly sends the ones digit of the first

data to the first storage block, and then sends the ones digit of the second data to the first storage block. The first storage block (STES 3) releases the data to the first addition block. The first addition block will perform the operation.

B. The carry data and result data obtained from the operation of the first addition block are stored independently in storage block(SOTES) of the BLOCK A1, and the storage block of the first addition block sends the result data first to the STES4 where "0" has been stored in the initial programming. The second storage block (STES4) will release its initial value "0" and the result data for operation in the second addition block(BLOCK A2), and then, the carry data of the first addition block will be sent to the second storage block(STES4).

C. The carry data and result data obtained from the operation of the second addition block are stored independently in storage block (SOTES) of BLOCK λ2, and the storage block of the second addition block sends the result data first to the third storage block(STES 5) where "0" has been stored in the initial

programming. The third storage block (stes5) will release its initial value "0" and the result data for operation in the third addition block, and then, the carry data of the second addition block will be sent to the "STES5" block .

D. The carry data and result data obtained from the operation of the third addition block are stored independently in storage block(SOTES) of BLOCK A3, and the storage block of _. the third addition block sends the result data first to the fourth storage block STES 6 where "0" has been stored in the initial programming. The fourth condition pass block will release its initial value "0" and the result data for operation in the fourth addition block, and then, the carry data of the third addition block will be sent to the fourth storage block(stes6).

E. Performing the above operation the sixth addition block will give the result data as the output(ones place digit) while the carry data(O) will be deleted and not stored in SOTES. Also the carry data of previous addition blocks is released for storage in the subsequent storage blocks.

F. The software interface will send the higher bit (ten's digit) of the first data to the first condition pass block, and then sends the higher bit (ten's digit) of the second data to the first condition pass block. The first addition block will perform the operation; and this time the subsequent STES are having carry data from the previous operation stored in the place of zero.

G. Repeating the above steps B, C, D, E, F; at this time, the initial value of the second, third .fourth .fifth and sixth STES blocks is the carry number obtained from the addition of the former digit. With each cycle of B, C, D, E and F, the output of the sixth addition block will move a bit to a higher digit, until all the digits have been added.

H. Performing addition of "0"+"0", the initial value of each STES block and SOTES of all ADDITION BLOCKS is restored to "0". For example, if the numbers to be added are

23+ 56

Then the software will send "3" first to the "STES 3" and then it will

send "6" to the "STES 3". Once the operation is performed in "BLOCK A1", "BLOCK A1" will release "0" and "9" which will wait in the "SOTES". "SOTES" is a point at which the software performs the logic operation. It will let the bits pass through it only when 8 bits have been received and when both'O" and "9" have been received ,{the soft ware needs two valid signals i.e. If it receives one signal as OOOO(error) it will not let the other valid signal to pass through either). This digit "9" will go to "STES4" where initially "software" has stored "0"{done in initial programming}. Now "STES 4" will release "0" and "9" for addition operation in "BLOCK A2" as shown. The output will be ¹¹ O" and "9" again out of which the "BLOCK A 2" will not release "0" that is "0" signal is stored in SOTES of "BLOCK A2". By doing this operation continuously at different blocks, the final output that comes out of the BLOCK A6 will be 9. In BLOCK A6, the output on the left side will be deleted, because of which only 9 will be the output answer stored in the one's digit. Also during the above operation "0" will be released to be stored in the subsequent "STES" to be added to

the next digit. The "SOTES" of "BLOCK A1" will now release the second signal "0" which will be stored in the "STES 4". Now the software will release "2" and "5" for addition operation in "BLOCK A1 "."BLOCK A1" will release "0" and "7" as output. Again following the above procedure we will get "7" as the output which will be stored in the "tens" place. The software will keep performing this operation until all the digits of both the numbers have been added. When all the digits have been added then the software will perform an addition of "0" and "0" to bring the addition block to initial state. From "BLOCK A6" only the right signal will be released, the left signal will not be released it will be removed.

Figure No3: MULTIPLICATION BLOCK:

In an embodiment, the multiplication operation is:

A. Software interface firstly sends the ones digit to the first storage block or condition pass block STES 9, and then sends the ones digit of the second data to STES9. The condition block will release the two digits for operation in the BLOCK M1 , and the

carry data and result data obtained by the multiplication block will be temporarily stored in its storage block SOTES.

B. Then, the result data of the multiplication block will be sent first to the second condition pass block STES 10 where "0" has been stored in the initial programming. The second condition pass block will release the "0" and result data for operation in the first addition block, and the carry data of the multiplication block will be sent in the place of "0" to the second condition pass block for storage.

C. The first addition block will temporarily store the carry data in its storage block, while the result data will be sent to the third condition pass block STES11 where "0" has been stored in the initial programming. The ^α 0" and result data of the third condition pass block will be released to the second addition block.

D. Continuing the above operations ,the result of the sixth addition block will be the result data while the carry data will be removed from the sixth addition block. Also the sixth addition block will release its result data for storage in the ones place of

the output block. Also the carry data of previous multiplication and addition blocks will be released for storage in the subsequent STES to be stored in the place of zero.

E. And then, the ten's digit of the first number and the one's digit of the second number will be released respectively to the first condition pass block STES 9 which will release the two digits for operation in the multiplication block;

F. This operation of changing to the higher digit on the first number while taking the lower digit from the second number will continue as long as there are higher digits in the first number. When all the digits of the first number have been sent for the multiplication ,the software will perform a "0" multiply "0" operation before shifting so as to get the final output of the multiplication of first number and the ones digit of the second number and also to bring all the blocks to the initial condition.

G. Now the software will take the tens digit from the second number and ones digit of the first number to STES 9. Continuing the above steps A, B ₁ C, D, E ₁ F we will get the result of

multiplication of the first number and the tens digit of the second number. Since the software has shifted once from one digit to other of the second number, at the end of multiplication of first number and the ten's digit of the second number, it will add an additional zero at the end of output of multiplication of first number and ten's digit of second number. That means if the output is 261 it will store it as 2610. It has been explained in the example as well. It will be stored in the output block which will send all these numbers for addition in the addition block. The addition block will send the final output to the user interface. For example if the numbers to be multiplied are

29 *99

Then the software will send "9" first to the "STES 9" and then it will send "9" from the second number to the "STES 9". Once the operation is performed in "BLOCK M",- "BLOCK M" will release "8" and "1" which will wait in the "SOTES". Now "SOTES" will release "1" to "STES 10". StesiO will release "0" and "1" for addition in BLOCK A1. The output will be "0" and "1". Continuing the above

operations the output of BLOCK A6 will be "1" which will be stored in the ones place .BLOCK A6 will release only the right signal. Now all the zeros and other numbers stored in the "SOTES" will be released to be stored in the next "STES". Now "SOTES" of "BLOCK M" will release "8" which will be stored in "STES10" in the place of "0". Now "2" and "9" will be released for multiplication in BLOCK M. The output will be "1 " and ^H 8" out of which "8" will be released first to "STES10". Now "STES 10" will release 8 and 8 for addition in BLOCK Al The output will be "1" and 6". "6" will be released to "STES11" and by successive addition we will get 6 as output which will be stored in the "tens place". Now since all the digits in the first number and the one's digit in the second number have been given, we will perform a "0" multiply "0" operation. This operation will give" 2" to be stored in the hundredths place and will bring all the blocks to their initial state. This 261 will be stored in the "OUTPUT". Now multiplication of second 9 and 29 will be carried out. The output will be 261 again. Since the software has shifted from one's digit to ten's digit once therefore the software

will add zero at the end of the output of multiplication of ten's digit of second number and first number. That means the output will be 2610. Now the OUTPUT BLOCK will release 261 and 2610 for addition in the addition block. The addition block will send final output to the software user interface.

Figure No4: SUBTRACTION BLOCK:

In subtraction block if there are two numbers then the software must find out the bigger of these two numbers.

In an embodiment, the subtraction operation is

A. The software compares the two numbers and finds out the bigger one. This is done by using LOGIC BLOCK. If the number of digits of these two numbers are different from each other, the number with fewer digits will be added with several "0" as shown in the example until they have the same number of digits. After that, they will be compared with the application of logic block.

B. Logic block obtains the highest digits of the two numbers. If the highest digit of the former number is bigger, it will give an

output of "1" and judges the number before the minus is bigger and performs specific subtraction. If the highest digit of the first number is smaller, it will give an output of "2" and judges the number behind the minus is bigger. And then, the positions of the two numbers will be exchanged and specific subtraction will be performed. Besides, a minus will be added before the final result. If they have the same highest digits, it will give an output of "3". And then, the lower digits will be compared until the first different digit will be found out. If all the digits are the same, "0" will be the final output.

C. The software will take the one's digit from the first number and the ones digit from the second number and sends them to the condition pass block STES 16. STES 16 will release these numbers for subtraction in the first subtraction block.

D. The first subtraction block will release the result data obtained by it to the second condition pass block (STES17) and the carry data will be stored in the SOTES. In STES 17 "0" has been stored in the initial programming. The second condition

pass block will release the result data minus "0" for operation in the second subtraction block, and then, the first subtraction block will release the carry data to be stored in STES 17 to be subtracted from the next result data.

E. The second SUBTRACTION BLOCK will release the result data obtained by it to the third condition pass block STES 18 where "0" has been stored in the initial _. programming. The third condition pass block will release the result data minus "0" for operation in the third subtraction block, and then, the second subtraction block will release the carry data to the third condition pass block STES 18 to be subtracted from the next result data.

F. Continuing the above steps the sixth subtraction block will release result data to be stored in the one's place in the output. The sixth subtraction block will send the result data obtained by it to the ones place of the output, and the carry data will be blocked at its storage block;

G. Repeating C, D, E, F; at this time, the initial value of the STES blocks is the carry digit which will be subtracted from the

next result digit. With each cycle of C, D, E AND F, the output of the sixth subtraction block will move to a higher digit, that is first cycle will give one's digit, next cycle will give ten's digit and the third cycle will give hundredths digit and so on. Until all the digits have been subtracted;

H. When all the digits have been subtracted, we will perform a "0"-"0" operation to bring all the STES and .SOTES to the initial state. For example: let the numbers be

1000- 132

In the above operation the software will read the number of digits before and after the - sign .If the number of digits is different before and after the - sign, the software will equate the two numbers by adding a "0" in front of the smaller number. That means the software will represent

1000- 132 as

1000- 0132

Once the numbers of digits have been equated, we have to find out the bigger number out of these two. For this purpose the software will need to use "block L" as shown. After performing the equating operation the software will take the last digit of both the numbers. For example:

It will take "1" from '1000' and ¹¹ O" from "0132".

And send these digits to the "block I". If the "block I" gives "1" as output then the software will decide that first number is bigger one and will start performing the subtraction operation. If the output is 2 the software will decide that the second number is bigger and will reverse the order .If the output is 3 the software will decide that both the numbers are same. That is in the current example the software will take

1000 -0132 as such but if the number was

0132-1000

The software will convert it to

1000-0132 and will store - sign to be added at the end of the final answer.

Now if the initial digits of two numbers are same then the "block I" will give "3" as an output. In this case the software will take the next two digits and check them. This process will continue until the first digit and if all the digits are same , the software will return "0" as an answer. For example

996-998

The software will match the digits at the hundredths place (9, 9). It will get "3 ¹ from the block. Now it will match the digits at the tenths place (9, 9). It will again get "3". Now it will match the digits at the ones place, the output will be "2" meaning that 998 > 996. Now the software will reverse the sequence and store - sign to be put before the final answer. That is the software will perform

998-996 and put - sign before the final answer.

Working of the subtraction block: the subtraction block will always subtract low number from high number. The software will put -

sign before the final answer if the user input is to subtract higher value from low value. For example;

32-24

For this example the software will take 2 from the first number and 4 from the second. These values will be sent to "STES 16". "STES 16" will then release these.numbers to "BLOCK SI".. The "BLOCK S1 ^M will give an output of "1" and "8". "8" will be released to "STES 17"."STES 17" is having "0" stored in it from the initial programming. "STES 17" will release "8" and "0". That means "8"-"0" to the "BLOCK S2". "BLOCK S2" will give a solution as'O" and "8" out of which "8" will be released to "stes18" .Now again STES 18 will release "8-0" as the operation to "BLOCK S3". BLOCK S3 will release solution as'O" and "8" . Continuing the above operation, the final output of the BLOCK S6 will be "8" which will be stored in the "ones" place. Now all the zeros and other numbers stored in the blocks will be released to be stored in the next STES to be subtracted from the next digits. From "BLOCK S6" only the right signal will be released. The left signal

will be deleted.

Now "1" will be released from the "SOTES" of "BLOCK S1" and will be stored in "STES 17" in the place of "0" to be subtracted from the next "digit". Now the soft ware will release "3" and "2" to "STES 16" which will release them to "BLOCK St ¹ . "BLOCK S1" will give an output of "0" and "1". The "1" will be released to "STES17" which will then release" V -"1" to "BLOCK S2". The output of "BLOCK S2" will be "CTand "0". Continuing this operation the final output of BLOCK S6 will be "0" in the tens place. To bring subtraction block to initial state, we will perform an "0" - ¹ O" operation.

There are four different blocks used here they are:

1. BLOCK A

2. BLOCK M

3. BLOCK S

4. BLOCK L

All the above blocks are made with the following basic building blocks.

These blocks are number identifiers, sequencer, software tester (STES) and software output tester (SOTES).and initializes.

NUMBER IDENTIFIERS: These are specified by N (0-9). And for the. mathematical operations they are different. These are condition pass block circuits which identify the number that is given as input. If the number is the given number then and only then will they give the output, other wise their output will be "0000". There are a total of 14 number and mathematical operator identifier circuits.

NUMBER GENERATERS: These are signified by G (0-9) These condition pass block circuits generate a specified number. Their specialty is that they will generate only the specified number no matter which signal is given to them. Their are a total of 10 number generators.

SEQUENCER: These condition pass blocks let the signal pass

through them only if the numbers are given in a particular fashion other wise they will give one of the outputs as "0000" or the error signal. Their are a total of 100 number sequencers. The particular fashion is that the left number has to be given first then the right number will be given. If the numbers are not in the given sequence, it will give error signal for both inputs. In some cases it may give valid signal for the first input , but then the second input will not match and it will give second number as error signal . The STES will delete both the numbers if one of the numbers is error signal. Memory will be provided at "STES" and "SOTES" These sequencer circuits are initially put in a configuration such that if the digit at the left is given then the sequencer will let it pass and simultaneously it will shift to the next number identifier at the right. Now if the next digit is the same the sequencer will shift to the left number identifier again. If the next digit is not the same as the right digit it will generate an error signal. As a result the "STES" will have one error signal and the software will delete both the signals and will bring the sequencer to the initial configuration.

There are a total of 90 sequencers which obey the above description. These sequencers are given by "SE AB" where "A" is not equal to "B". The sequencer will not shift from one number identifier to the next immediately. The "NOT GATE" that performs this operation of shifting from one number identifier to other is having a propagation delay much more than other gates. This ensures that a proper signal is received at the "STES".

When we have sequencer "SE AB" where "A=B" then we have single number identifier which gives the signal to the STES. When the STES gets the first correct signal it sends a signal to the initializer with them. These initializer are designated by "I A" where "A" varies from 0-9. The job of this initializer is to bring the number identifier back to initial condition if the first input is valid. The initializer basically switches off the power supply of the three "AND GATES", "NOT GATES" following them and the four "OR GATES" at the end of number identifiers. The number identifiers associated with the initializers are separate.

The part drawings of all the number identifiers, sequencers and

number generators have been attached. The two number identifiers at the start of the sequencer circuits are not part of the sequencer circuit. Only those number identifiers which are connected in the feedback loop from output are part of the sequencer circuit.

The truth table of the circuits that have been given in the patent document can be proved by the use of simple AND, OR and NOT gates. What we need is that we should choose the logic gates such that the propagation delay through them is either same or a multiple of the propagation delay given in ANNEXURE A.