Title:
CHIP FUSE
Document Type and Number:
WIPO Patent Application WO/2011/111700
Kind Code:
A1
Abstract:
Provided is a chip fuse which includes a fuse element that can be fused at a low temperature without fail.
Surface electrodes are formed on a surface of an insulating substrate (1), and an Ni-P-Fe layer (15) is formed by plating so as to overlap the surface electrodes (3). An Sn layer (17) is formed by plating on the Ni-P-Fe layer (15). The Sn layer (17) is coated with an overcoat constituted of an insulating resin material.
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Inventors:
TAKEUCHI KATSUMI
KUROKAWA HIROYUKI
KUROKAWA HIROYUKI
Application Number:
PCT/JP2011/055370
Publication Date:
September 15, 2011
Filing Date:
March 08, 2011
Export Citation:
Assignee:
HOKURIKU ELECT IND (JP)
TAKEUCHI KATSUMI
KUROKAWA HIROYUKI
TAKEUCHI KATSUMI
KUROKAWA HIROYUKI
International Classes:
H01H85/11; C22C19/03; C23C28/00; C25D7/00; H01H85/046
Foreign References:
| JP2002279883A | 2002-09-27 | |||
| JPH07122406A | 1995-05-12 | |||
| JPS555847B2 | 1980-02-12 | |||
| JP2006164639A | 2006-06-22 | |||
| JP2006237008A | 2006-09-07 |
Attorney, Agent or Firm:
NISHIURA Tsuguharu (JP)
Tsugiharu Nishiura (JP)
Tsugiharu Nishiura (JP)
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