Title:
CHIP AND CHIP PACKAGE
Document Type and Number:
WIPO Patent Application WO/2022/041221
Kind Code:
A1
Abstract:
The present application relates to the technical field of chip interconnection and provides a chip and a chip package, capable of reducing the power consumption and an area of a chip interconnection interface. The chip comprises a chip interconnection interface comprising a buffer; the buffer is a standard unit; one of an output end and an input end of the buffer is connected to a connection part of an active surface of the chip and the other is connected to an internal digital circuit in the chip; and the connection part of the active surface of the chip is connected to an external chip.
Inventors:
JIA HAILIN (CN)
ZHANG GUANGYU (CN)
FENG JUN (CN)
WANG SHAOHUA (CN)
ZHANG GUANGYU (CN)
FENG JUN (CN)
WANG SHAOHUA (CN)
Application Number:
PCT/CN2020/112590
Publication Date:
March 03, 2022
Filing Date:
August 31, 2020
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
G06F13/40
Foreign References:
| CN103207849A | 2013-07-17 | |||
| US5880607A | 1999-03-09 | |||
| CN108352378A | 2018-07-31 | |||
| CN103999008A | 2014-08-20 |
Attorney, Agent or Firm:
BEIJING RUN ZEHENG INTELLECTUAL PROPERTY LAW FIRM (CN)
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