CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

WIPO Patent Application WO/2011/052207

A1

Disclosed is a circuit board in which a high precision electric circuit is formed in an insulating substrate. The circuit substrate is provided with: an insulating substrate (D1) formed by formation of a resin film (D2) on the surface thereof, formation of circuit grooves (D3) of a desired shape and depth by forming depressions of depth greater than the thickness of the aforementioned resin film (D2) measured from the outer surface of the aforementioned resin film (D2), deposition of a plating catalyst or precursor thereof (D5) on the surfaces of the aforementioned circuit grooves (D3) and of the aforementioned resin film (D2), and removal of the aforementioned resin film (D2); and with an electroless plating film (D6) formed in the aforementioned circuit grooves by applying electroless plating to the aforementioned insulating substrate (D1), wherein the thickness of the aforementioned electroless plating film (D6) is at most 0.5 times the depth of the aforementioned circuit grooves (D3).

YOSHIOKA SHINGO (JP)
FUJIWARA HIROAKI (JP)
TAKASHITA HIROMITSU (JP)
TAKEDA TSUYOSHI (JP)
KONNO YUKO (JP)

PCT/JP2010/006367

May 05, 2011

October 28, 2010

Click for automatic bibliography generation  

PANASONIC ELEC WORKS CO LTD (JP)
YOSHIOKA SHINGO (JP)
FUJIWARA HIROAKI (JP)
TAKASHITA HIROMITSU (JP)
TAKEDA TSUYOSHI (JP)
KONNO YUKO (JP)

H05K3/10; H05K3/02; H05K3/18

JP2007088288A	2007-04-05
JPS63183445A	1988-07-28
JP2004281427A	2004-10-07
JP2003309346A	2003-10-31
JP2003264359A	2003-09-19
JP2008058710A	2008-03-13
JP2008022002A	2008-01-31
JP2004048030A	2004-02-12
JPH1078654A	1998-03-24
JP2002252445A	2002-09-06
JPH07509322A	1995-10-12

KOTANI, Etsuji et al. (JP)
Etsuji Kotani (JP)

View/Download PDF      PDF Help

Previous Patent: TANK-TYPE VACUUM INTERRUPTER

Next Patent: WIRING BOARD UNIT