Title:
CIRCUIT FOR CONTROLLING OVERCHARGING AND OVERDISCHARGING OF BATTERY
Document Type and Number:
WIPO Patent Application WO/2014/200195
Kind Code:
A1
Abstract:
In a conventional charging and discharging control technique (figure 3), when entering into a discharging-inhibited or charging-inhibited state, a voltage of a voltage detection node (103) for detecting a state of a battery (104) by a controller (105) varies by a +VGS or -VGS value, and as described above, a value VGS of a MOS-FET (114) largely varies according to a current amount. Since VGS of the MOS-FET (114) also increases when the current amount relatively increases, an energy loss increases, and the large variation of the voltage of the node (103) causes a malfunction when the controller (105) monitors the state of the battery (104), and thus it is necessary to solve this. As a means for solving the problem described above, a first logic switch (113) is connected between a charger (load) first terminal node directly connected to a first battery terminal and a gate (122) of a current-pass FET (114), a control input of the first logic switch (113) is connected to a first control signal (117), a drain of the current-pass FET (114) is connected to a second battery terminal (101), a source of the current-pass FET (114) is connected to a charger (load) second terminal (103), a second logic switch (109) is connected between a gate (122) of the current-pass FET (114) and the drain of the current-pass FET (114), a control input of the second logic switch (109) is connected to a second control signal (118) of the controller (105), a third logic switch (110) is connected between the gate (122) of the current-pass FET (114) and the source of the current-pass FET (114), a control input of the third logic switch is connected to a third control signal (119) of the controller (105). In addition, a load detector (107) is connected to the second charger (load) terminal, an output (121) of the load detector (107) is connected to the controller (105), a charger detector (106) is connected to the second charger (load) terminal, and an output (120) of the charger detector (106) is connected to the controller (105).
Inventors:
JUNG DUCKYOUNG (KR)
Application Number:
PCT/KR2014/004441
Publication Date:
December 18, 2014
Filing Date:
May 19, 2014
Export Citation:
Assignee:
JUNG DUCKYOUNG (KR)
International Classes:
H02J7/04; H02J7/00; H02J7/02
Foreign References:
JP2000102182A | 2000-04-07 | |||
JP2007336698A | 2007-12-27 | |||
US20120056592A1 | 2012-03-08 | |||
JP2011254650A | 2011-12-15 | |||
JP2001352683A | 2001-12-21 |
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