CLOCK-GENERATING DEVICE AND CLOCK DATA RECOVERY DEVICE

Title:

CLOCK-GENERATING DEVICE AND CLOCK DATA RECOVERY DEVICE

Document Type and Number:

WIPO Patent Application WO/2014/041924

Kind Code:

A1

Abstract:

This clock data recovery device (1) generates a recovered clock and recovered data on the basis of a data in, and is provided with a signal selection unit (10), a phase delay unit (20), a time measurement unit (30), a phase selection unit (40), an edge detection unit (50), a polarity detection unit (60), a logic inversion unit (70), and a data output unit (80). The signal selection unit (10), the phase delay unit (20), the time measurement unit (30), and the phase selection unit (40) configure a clock-generating device (1A). The phase delay unit (20) includes a plurality of delay elements (211 to 21P) in a cascaded connection. The phase selection unit (40) selects the signal output from the delay element at a position corresponding to a unit interval time among the delay elements (211 to 21P), and outputs the result as a feedback clock.

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Inventors:

ASADA KUNIHIRO (JP)
IIZUKA TETSUYA (JP)
MIURA SATOSHI (JP)
ISHIZONE YOHEI (JP)
MURAKAMI YOSHIMICHI (JP)
KUBO SHUNICHI (JP)
YAMAMOTO SHUHEI (JP)

Application Number:

PCT/JP2013/071264

Publication Date:

March 20, 2014

Filing Date:

August 06, 2013

Export Citation:

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Assignee:

THINE ELECTRONICS INC (JP)

International Classes:

H04L7/02

Foreign References:

JP2011082954A	2011-04-21
JP2008245273A	2008-10-09