Title:
CNN-RNN ARCHITECTURE CONVERSION TYPE COMPUTATIONAL ACCELERATION DEVICE DESIGN METHOD
Document Type and Number:
WIPO Patent Application WO/2022/131397
Kind Code:
A1
Abstract:
Disclosed is a method for controlling a device equipped with an FPGA computational accelerator. According to an embodiment of the present specification, an FPGA board interface configuring a common interface and respective interfaces for operations of different deep learning algorithms may be configured. Respective hardware images for accelerating computation of different deep learning algorithms may be stored in a memory. When one of the respective hardware images is selected, a gate array of the FPGA computational accelerator may be reconfigured according to the selected hardware image. Accordingly, it is possible to perform different deep learning algorithm computations having faster and higher power efficiency by using limited resources of the FPGA.
Inventors:
JEON HAERYONG (KR)
Application Number:
PCT/KR2020/018462
Publication Date:
June 23, 2022
Filing Date:
December 16, 2020
Export Citation:
Assignee:
MOBILINT INC (KR)
International Classes:
G06N3/063; G06N3/04; G06N3/08
Foreign References:
| KR20200053886A | 2020-05-19 | |||
| KR20190133555A | 2019-12-03 | |||
| KR20200051199A | 2020-05-13 | |||
| KR20180075913A | 2018-07-05 | |||
| US10642630B1 | 2020-05-05 |
Attorney, Agent or Firm:
PANBRIDGE PATENT & LAW OFFICE (KR)
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