COMMUNICATION SYSTEM AND RECEIVING-SIDE DEVICE

Title:

COMMUNICATION SYSTEM AND RECEIVING-SIDE DEVICE

Document Type and Number:

WIPO Patent Application WO/2020/090920

Kind Code:

A1

Abstract:

Provided is a wireless communication technology which can achieve low latency, high reliability, and a low jitter characteristic. A transmission-side device is configured to duplicate a packet and transmit the duplicated packets. A receiving-side device is configured to receive the duplicated packets. The receiving-side device is configured to transfer a first packet (1401, 1403, 1405, 1408), which is the packet received earlier among the duplicated packets, to an upper layer within the receiving-side device. A transfer timing, which is a timing at which the first packet (1401, 1403, 1405, 1408) is transferred to the upper layer, comprises a receiving timing of a second packet (1402, 1404, 1406, 1407), which is the packet received after the first packet among the duplicated packets, and/or a cycle time which corresponds to a transmission cycle of the duplicated packets.

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Inventors:

SHIMODA TADAHIRO (JP)
MOCHIZUKI MITSURU (JP)
FUKUI NORIYUKI (JP)
UCHINO DAICHI (JP)

Application Number:

PCT/JP2019/042644

Publication Date:

May 07, 2020

Filing Date:

October 30, 2019

Export Citation:

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Assignee:

MITSUBISHI ELECTRIC CORP (JP)

International Classes:

H04W72/04; H04W16/28; H04W80/00

Foreign References:

US20120147805A1	2012-06-14
JP2014143608A	2014-08-07

Other References:

3GPP TS 36.300 VI
3GPP S1 -083461
3GPP TR 36.814
3GPP TR 36.912
"Scenarios, requirements and KPIs for 5G mobile and wireless system", ICT-317669-METIS/D 1.1
3GPP TR 23.799
3GPP TR 38.801
3GPP TR 38.802
3GPP TR 38.804
3GPP TR 38.912
3 GPP RP-172115
3GPP TS 37.340
3GPP TS 38.211
3GPP TS 38.213
3GPP TS 38.214
3GPP TS 38.300
3GPP TS 38.321
3GPP TS 38.212
3GPP RP-161266
3GPP RP-180974
3GPP RP-181469
3GPP RP-182111
3GPP TR22.804
3GPP TS36.321
3GPP RP-161788
3GPP TS38.331
3GPP TS36.213
TS36.321
See also references of EP 3876637A4

Attorney, Agent or Firm:

YOSHITAKE Hidetoshi et al. (JP)

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