Title:
COMPUTATION DEVICE AND COMPUTATION METHOD
Document Type and Number:
WIPO Patent Application WO/2014/103235
Kind Code:
A1
Abstract:
In order to provide a computation device such that declining computational efficiency, increasing circuit size, and increasing power consumption are resolved, a computation device according to the present invention comprises: first data storage means for storing data to be computed; computation processing means for executing a computation, using the data; data sort means for selecting data which is instructed from the data to be computed which is stored in the first data storage means and data which is computed with the computation processing means, appending a prescribed delay, on the basis of a parameter, to the data among the instructed data whereof a delay instruction is received, executing a sort of the instructed data on the basis of the parameter without delaying the data whereof the delay instruction is not received, and outputting the data which is computed in the computation processing means and the computation result data of the computation processing means; and second data storage means for storing the computation result data.
Inventors:
KOBORI TOMOYOSHI (JP)
Application Number:
PCT/JP2013/007383
Publication Date:
July 03, 2014
Filing Date:
December 16, 2013
Export Citation:
Assignee:
NEC CORP (JP)
International Classes:
G06F7/76; G06F15/167; G06F9/315; G06F9/34; G06F9/38; G06F12/00; G06F12/06; G06F15/173; G06F15/80
Domestic Patent References:
| WO2011036918A1 | 2011-03-31 |
Foreign References:
| JP2006031127A | 2006-02-02 | |||
| JP2009282781A | 2009-12-03 | |||
| JP2010117806A | 2010-05-27 | |||
| JP2010009247A | 2010-01-14 | |||
| JP2002215603A | 2002-08-02 | |||
| JPH04503720A | 1992-07-02 | |||
| JPS5818116A | 1983-02-02 |
Other References:
See also references of EP 2940594A4
Attorney, Agent or Firm:
SHIMOSAKA, NAOKI (JP)
Naoki Shimosaka (JP)
Naoki Shimosaka (JP)
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