TECHNICAL FIELD

[0001] The following relates generally to head mounted devices (HMDs) and more specifically to a configurable head mounted device.

BACKGROUND

[0002] Wearable technologies have experienced rapid development. From time to time, various components in wearable technologies, including HMDs, may require replacement due, for example, to modified user demands, obsolescence, failure and breakage.

[0003] HMDs may be implemented for various visualization applications. For example, the range of applications for augmented reality (AR) and virtual reality (VR) visualization has increased with the advent of wearable technologies and 3-dimensional (3D) rendering techniques. AR and VR exist on a continuum of mixed reality visualization.

SUMMARY

[0004] In one embodiment, a configurable head mounted device comprises: a visor configured to be disposed at least partially in a user's line of vision, a first circuit board coupled to the visor and comprising a first subset of components of the configurable head mounted device, an access port, and a mating connector coupled to the first circuit board and configured to enable removable connection of a second subset of components to the first circuit board via the access port.

[0005] The visor can comprise: a housing configured to retain a video display component, the housing defining at least one viewing aperture to provide a view into the housing, the access port can be an opening in the housing for receiving the video display component, and the mating connector can be located inside the housing and configured to mate with a corresponding connector coupled to the video display component when the video display component is placed in the housing via the opening. The opening can comprise a slot, and the mating connector can be mounted in the housing opposite the slot and configured to mate with and releasably retain the corresponding connector when the video display component is positioned inside the housing via the slot.

[0006] The configurable head mounted device can further comprise: a panel coupled to the video display component, the panel having the corresponding connector mounted thereon, the slot being dimensioned to receive the panel coupled to the video display. [0007] The opening can be an open face of the housing, and the configurable head mounted device can further comprise: a cover to which the video display component can be releasably secured and positioned inside the housing when the cover is releasably secured to the housing to enclose the open face.

[0008] The mating connector can comprise a display connector.

[0009] The mating connector can be configured to receive a second circuit board comprising the second subset of components of the configurable head mounted device. The second subset of components can comprise a processor for controlling the configurable head mounted device, a storage, and/or a USB port.

[0010] In some embodiments, the mating connector can be compatible with one of a Thunderbolt™ protocol, a PCI protocol, a CompactPCI protocol, a PCI-X protocol, and a PCI express protocol.

[0011] The mating connector can have pinout reservation groups for at least some of the components in the second subset to accommodate different technologies for the components. One of the pinout reservation groups can be reserved for a USB connection.

[0012] The processor can assign processing of video and sound signals to respective components on the first circuit board and the second circuit board.

[0013] The configurable head mounted device can further comprise: a third circuit board coupled to the second circuit board and having a third subset of components for separating audio signals from video signals, and for presenting video from the video signals on the video display device. The third subset of components can separate the video signals for display on two separate video display devices.

[0014] The access port can be an aperture positioned on an outer surface of the configurable head mounted device and the mating connector can be exposed to receive a connector link coupled to an external circuit board comprising a fourth subset of components of the configurable head mounted device. The first subset of components of the first circuit board can be configured to operate the configurable head mounted device, and can be configured to shift at least partial control to the fourth subset of components on the external circuit board when the external circuit board is connected to the first circuit board via the connector link. The first subset of components can be configured to shift at least partial control to the fourth subset of components using a PCI or PCIe protocol. The fourth subset of components can comprise at least two graphical processing units and a circuit for dividing a video signal between the at least two graphical processing units. The fourth subset of components can comprise at least two graphical processing units, the first subset of components can comprise a circuit for dividing a video signal between the at least two graphical processing units, and the connector link can carry the divided video signal from the first circuit board to the external circuit board.

[0015] These and other aspects are contemplated and described herein. It will be appreciated that the foregoing summary sets out representative aspects of systems and methods for configuring and updating components of HMDs, to assist skilled readers in understanding the following detailed description.

DESCRIPTION OF THE DRAWINGS

[0016] A greater understanding of the embodiments will be had with reference to the Figures, in which:

[0017] Fig. 1 illustrates a user wearing an HMD;

[0018] Fig 2 is an exploded schematic view of one embodiment of a system for a configurable HMD;

[0019] Fig. 3 is another exploded schematic view of two embodiments of a system for a configurable HMD;

[0020] Fig. 4 is a schematic view of printed circuit boards in a configurable HMD;

[0021] Fig. 5 is a schematic view of another configuration of printed circuit boards in a configurable HMD;

[0022] Fig. 6 is a schematic view of yet another configuration of printed circuit boards in a configurable HMD;

[0023] Fig. 7 is a schematic view of still another configuration of printed circuit boards in a configurable HMD;

[0024] Fig. 8 shows a view of a user equipped with an HMD connected to an external system for offloading various tasks remotely from the HMD;

[0025] Fig. 9 is a schematic view of still other configurations of an HMD connected to an external expansion system; and

[0026] Fig. 10 is a schematic view of still yet another configuration of an HMD connected to an external expansion system.

DETAILED DESCRIPTION [0027] For simplicity and clarity of illustration, where considered appropriate, reference numerals may be repeated among the Figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein may be practised without these specific details. In other instances, well-known methods, procedures and components have not been described in detail so as not to obscure the embodiments described herein. Also, the description is not to be considered as limiting the scope of the embodiments described herein.

[0028] Various terms used throughout the present description may be read and understood as follows, unless the context indicates otherwise: "or" as used throughout is inclusive, as though written "and/or"; singular articles and pronouns as used throughout include their plural forms, and vice versa; similarly, gendered pronouns include their counterpart pronouns so that pronouns should not be understood as limiting anything described herein to use, implementation, performance, etc. by a single gender; "exemplary" should be understood as "illustrative" or "exemplifying" and not necessarily as "preferred" over other embodiments. Further definitions for terms may be set out herein; these may apply to prior and subsequent instances of those terms, as will be understood from a reading of the present description.

[0029] Any module, unit, component, server, computer, terminal, engine or device exemplified herein that executes instructions may include or otherwise have access to computer readable media such as storage media, computer storage media, or data storage devices (removable and/or non-removable) such as, for example, magnetic discs, optical discs, or tape. Computer storage media may include volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information, such as computer readable instructions, data structures, program modules, or other data. Examples of computer storage media include RAM, ROM, EEPROM, flash memory or other memory technology, CD- ROM, digital versatile discs (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disc storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by an application, module, or both. Any such computer storage media may be part of the device or accessible or connectable thereto. Further, unless the context clearly indicates otherwise, any processor or controller set out herein may be implemented as a singular processor or as a plurality of processors. The plurality of processors may be arrayed or distributed, and any processing function referred to herein may be carried out by one or by a plurality of processors, even though a single processor may be exemplified. Any method, application or module herein described may be implemented using computer readable/executable instructions that may be stored or otherwise held by such computer readable media and executed by the one or more processors.

[0030] The present disclosure is directed to systems and methods which may be implemented for augmented reality (AR) applications. However, the term "AR" as used herein may encompass several meanings. In the present disclosure, AR includes: the interaction by a user with real physical objects and structures along with virtual objects and structures overlaid thereon; and the interaction by a user with a fully virtual set of objects and structures that are generated to include renderings of physical objects and structures and that may comply with scaled versions of physical environments to which virtual objects and structures are applied, which may alternatively be referred to as an "enhanced virtual reality". Further, the virtual objects and structures could be dispensed with altogether, and the AR system may display to the user a version of the physical environment which solely comprises an image stream of the physical environment. Finally, a skilled reader will also appreciate that by discarding aspects of the physical environment, the systems and methods presented herein are also applicable to virtual reality (VR) applications, which may be understood as "pure" VR. For the reader's convenience, the following may refer to "AR" but is understood to include all of the foregoing and other variations recognized by the skilled reader.

[0031] Referring now to Fig. 1 , an HMD 101 is shown. The HMD 101 comprises or communicates with a plurality of systems; these may vary depending on the application for which the HMD 101 is implemented. The HMD 101 shown in Fig. 1 comprises a display system having a visor 103 with a display 105 mounted therein for displaying a video stream to a user 100. The HMD 101 may further comprise an audio system having audio speakers 107 mounted to the HMD 101 within audible range of the user's 100 ears for playing an audio stream. In use, the display 105 of the visor 103 rests in front of the user's 100 line of vision so that the user 100 may view the video stream displayed on the display 105 of the visor 103. The HMD 101 may be implemented in one or more AR applications in which a processor which is electronically coupled to the display 105 performs various graphics processing tasks or is electronically coupled to still further external processors, such as, for example, one or more external graphics processing units (eGPUs) which assist the processor by externally performing some or all graphics processing tasks.

[0032] A configurable head mounted device may be provided comprising: a visor configured to be disposed at least partially in a user's line of vision, a first circuit board coupled to the visor and comprising a first subset of components of the configurable head mounted device, an access port, and a mating connector coupled to the first circuit board and configured to enable removable connection of a second subset of components to the first circuit board via the access port. The access port generally enables the addition, removal or replacement of additional subsets of components without necessarily requiring a complete or substantial disassembly of the configurable head mounted device. In various embodiments, the access port is defined by or comprises an opening in a visor of the head mounted device, an openable panel or hinge of the head mounted device, or a connector for a cabling permitting the coupling of an external circuit board to the head mounted device.

[0033] Referring now to Fig. 2, an embodiment of a system for removing and/or exchanging a display on the visor of an HMD is shown in exploded schematic form. The visor comprises: a housing 201 defining an access port comprising an open face 203 and an openable or removable cover 221 to substantially cover the open face 203 of the housing 201 ; a display 223 mounted to the face of the cover 221 facing the interior of the housing 201 when the cover 221 is retained to the housing 201 ; a retainer 225 to retain the cover 221 to the housing 201 ; and optics 205 retained in apertures in a face of the housing 201 opposite the open face 203 to suitably modify the image on the display 223 for a user. The access port enables a user to easily upgrade or otherwise modify the components of the housing 201. The visor may further comprise supporting electronics (not shown) disposed within the housing 201 for the display 223, or the supporting electronics may be located remotely from the housing 201. The supporting electronics and the display 201 communicate via a suitable and removable video communication connector, such as, for example, a MIPI, HDMI or LVDS connector. Supporting electronics may comprise, for example, the aforementioned processor or GPUs.

[0034] The housing 201 retains the components providing video display to a user or wearer of an HMD. The housing 201 further retains the display 223 at a distance from the optics 205 to ensure a suitable focal length for a user of the HMD. The housing 201 may be made of any solid (but not necessarily rigid) material, such as, for example, plastics, or it may be constructed as a frame configured to retain the components of the display system. The housing 201 defines at least one open face 203 with an opening sufficiently large to provide a substantially unobstructed view therethrough of the display area on the display 223. Alternatively, the housing does not need to define an open face 203 if the face of the housing adjacent the display 223 is suitably transparent to allow a user to view an image stream displayed on the display 223. The housing may further define one or more apertures or openings, or transparent regions, in which the optics 205 are retained opposite the display 223. In use, the housing 201 may entirely encase the display 223 and optics 205 to protect the components encased therein from, for example, external objects and forces, liquids, contaminants, or airborne dust that may degrade the image quality displayed to the user.

[0035] The cover 221 releasably retains the display 223 in position to the housing 201 opposite the optics 205. To releasably retain the display 223 to the cover 201 , the cover 221 comprises a display retainer 225, such as, for example, brackets, clips, sleeves and hook-and-loop fasteners, permitting removal of a given display from the cover 221 and retention thereto of a subsequently inserted display. The retainer is preferably adjustable for retaining differently shaped and sized displays.

[0036] The display 223 shown in Fig. 2 is representative of any type of display suitable for use in an HMD. For example, the display 223 may be an LED, LCD, plasma, OLED or other panel type display, and it may provide 720p, 1080p, 4K2K, or higher resolution. The cover 221 may be configured to releasably retain curved panel displays.

[0037] In embodiments, the retainer 225 permits a user to completely remove the cover 221 from the housing 201. Alternatively, the retainer 225 may releasably retain one region of the cover 221 to the housing 201 , while a hinge, living hinge or other connector (not shown) hingedly retains another region of the cover 221 to the housing 201 between a closed position in which the cover 221 is substantially adjacent to the open face 203, and an open position in which access to the interior of the housing 201 is provided through the open face 203. The retainer 225 may comprise, for example, a plurality of screws disposed at various locations through the cover 221 for threaded engagement with a corresponding plurality of holes in the housing 201 , as shown in Fig. 2. By screwing or unscrewing the screws, a user may respectively attach or remove the cover 221 to access the display 223. If the cover 221 is hingedly attached to the housing 201 , removal or release of the screws permits the cover 221 to open as a flap. Alternatively, the retainer may comprise, for example, a latch, a clip or hook-and- loop fastening.

[0038] The optics 205 may comprise magnification, demagnification or neutral lenses disposed and retained within apertures in the housing 201. The housing 201 may be configured to permit adjustment of the lenses, such as, for example side-to-side adjustment for various interpupillary distances (IPDs) depending on the user, or toward and away from the display 223 to permit adjustment of the focal length defined by the distance between the lenses and the display 223. For example, the housing 201 may define an aperture that is larger than the allowable displacement of the lenses within the aperture. For example, a chassis for movably retaining the lenses may be mounted to the housing 201.

[0039] In use, the system for removing and/or exchanging a display on the visor permits a user to remove or exchange the display 223. The user removes or releases the retainer 225, thereby releasing the cover 221 for removal or opening. Once the cover 221 is open or removed, the user may remove the display 223 from the cover 221. If the display 223 is connected through wired connection to a processor or other component on the HMD, the connection can be releasable so that the user can further disconnect the display 223. Once the user has removed the display 223, another may be substituted by connecting it, affixing it to the cover 221 , and reengaging the retainer 205 to retain the cover 221 to the housing 201.

[0040] In further embodiments, a system enabling removal and exchange of a display for an HMD may be provided by a visor comprising: (a) a housing for retaining components providing video display, the housing defining: (i) at least one viewing aperture to provide a view into the housing of a display mounted therein; and (ii) a slot for receiving into the housing a display opposite the at least one viewing aperture; and (b) a mating connector mounted to the housing opposite the slot and configured to mate to a connector on, and releasably retain, the display when the display is inserted into the slot.

[0041] Referring now to Fig. 3, further embodiments of a system for removing and/or exchanging a display on the visor of an HMD are shown in schematic form. It will be understood that many of the features of the embodiments illustrated in Fig. 3 are analogous to those in the embodiment shown and described with reference to Fig. 2. The visor comprises: a housing 301 defining an access port comprising a slot 303 to receive a display 323 into the housing 301 ; optics 305 retained in apertures in a face of the housing 301 opposite the region within the housing 301 where the display 323 is retained upon insertion into, and attachment to, the housing 301 ; and a mating connector 307 mounted to the housing 301 opposite the slot 303 and configured to mate to a connector 325 mounted to the display 323. The connector 325 mounted to the display 323 mates to the mating connector 307 to releasably retain one edge of the display 323 to the housing 301 , while the slot 303 slidably engages another edge of the display so that the display 323 may be releasably secured to the housing 301.

[0042] The display 323 may be mounted by a mount 321 to the connector 325, or the display 323 may be connected to the connector 325 without a mount. The mount 321 may be specifically shaped and sized for a given display. The mount 321 comprises a panel and is affixed to the display 323, for example by fasteners, glue or tape. The connector 325 is mounted to the panel and faces outwardly therefrom so that, when the display 323 is inserted into the slot 303 of the housing 301 and slid to the mating connector 307, the connector 325 references the mating connector 307. The connector 325 is communicatively coupled to the display 323 mounted to the same mount 321. For example, the connector 325 may be hardwired to the display 323. Alternatively, the connector 325 may be coupled to a display connector (not shown) configured to reference a port (not shown) in the display. In a preferred embodiment, the display connector is a suitable MIPI, HDMI, LVDS or suitably analogous connector, while the connector 325 is configured to reference a graphics card-type mating connector, such as, for example, a connector compatible with a PCI protocol to enable substantially lossless or low-loss, high- frequency and high-resolution communication of graphics signals between the display 323 and other components of the visor and/or HMD.

[0043] If the display 323 is mounted to the mount 321 , the slot 303 in the housing 301 is sized to permit insertion of the display 323 and the mount 321.

[0044] In use, the system for removing and/or exchanging a display on the visor permits a user to remove or exchange the display 323. A user wishing to remove the display 323 pulls the display 323 outwardly from the housing 301 through the slot 303. Pulling the display disengages the connector 325 from the mating connector 307. When the connector 325 references the mating connector 307, the referencing may provide friction fit engagement which the pulling must overcome. Once the user has removed the display 323 from the housing 301 , another display may be introduced, or the same display may be reintroduced (for example, after servicing). The user introduces the display 323 into the slot 303 of the housing 301 , and pushes the display 323 inwardly until the connector 325 references the mating connector 307.

[0045] In addition to the display system, an HMD may comprise electronic components for performing processing and communication as required by various applications for supporting the display and other systems. The electronic components may be mounted to one or more printed circuit boards (PCBs). By equipping an HMD with removable connectors between PCBs, a PCB may be removed and replaced without requiring destructive disassembly of the HMD. Further, by distributing electronic components across an array of two or more removable interconnected PCBs, electronic components of one PCB may be replaced without requiring replacement of the electronic components of the other PCB. One type of PCB for an HMD may be a processor PCB.

[0046] A system enabling removal and exchange of components for an HMD may be provided by PCBs comprising: (a) electronic components for an HMD mounted to the PCBs; and (b) paired connections between adjacent PCBs for releasably connecting components in circuit between adjacent PCBs.

[0047] The processor PCB may comprise, for example: a microprocessor, microcontroller, or field programmable gate array (FPGA); memory; power management components; storage; and integrated circuits (ICs) for an antenna for wireless communication, such as, for example, Bluetooth, WiFi and GPS. The processor PCB may interconnect with one or more other PCBs, each comprising one or more of the following: an audio codec; portable storage; internal speakers and microphones; communication ports, such as, for example, USB, I2C, SPI, LEDs; camera connectors; display connectors; and sensors and transducers, such as, for example, inertial measurement units and ultrasonic sensors.

[0048] Each PCB may be electronically coupled to another PCB by a suitable connector or link using a suitable protocol, such as, for example, a connector or link compatible with Thunderbolt™, PCI, CompactPCI, PCI-X, PCI Express (PCIe) protocols, or other suitable connector or link type, via ports on each PCB configured for releasable connection to the other PCB by the connector or link, thereby enabling replacement, addition or removal of various electronic components without requiring replacement, addition or removal of all the components in an existing array of PCBs. The connector for each PCB comprises designated ranges of pinouts for the components on the PCB so that, when a PCB is connected via the connector to a corresponding connector of an adjacent PCB, communication between appropriate components is enabled. Therefore, interchangeable PCBs are configured in view of the PCBs to which they are to be connected. Pinouts providing connectivity according to the configurations shown in Figs. 4-7 and described below may be implemented to enable removal and/or exchange of components on an array of PCBS.

[0049] Referring now to Fig. 4, an exemplary configuration of PCBs for an HMD is shown. It will be appreciated, however, that other configurations may be achieved by assigning pinouts on PCBs so that the components on each PCB are connected in communication with appropriate components on another PCB. PCB 1 comprises a processor A, storage, a memory, a USB 2.0 port, and a connector 401. PCB 2 comprises a processor B, storage, a memory, a USB 3.0 port and a connector 401. PCB 3 comprises a dual USB 3.0/2.0 port, an Ethernet port, an SD card, and a mating connector 41 1. PCBs 1 and 2 are configured to apply common pinouts along connectors 401.

[0050] Thus, the mating connector 411 is configured to releasably connect to the connectors 401 of PCB 1 and PCB 2, respectively, thereby making PCB 1 interchangeable with PCB 2. The mating connector 411 and connectors 401 each comprise sufficient pinouts to provide interconnection between electronic components on the PCBs. For example, the connector 401 of PCB 2 must devote at least nine pinouts to the USB 3.0 connection, while the connector 401 of PCB 1 must devote at least four pinouts to the USB 2.0 connection. However, the mating connector 41 1 of PCB 3 must devote at least nine pinouts for USB connection if PCB 3 is to communicate with PCB 2 using USB 3.0 protocol. Similarly, each connector comprises a reserve for the remaining components on its associated PCB. For example, as shown in Fig. 4, the mating connector comprises a processor reserve, storage reserve, memory reserve and USB reserve. Each reserve groups the pinouts required for communication with corresponding components on PCB 1 and PCB 2. If PCB 3 is a component of an HMD, a designer of PCB 1 or PCB 2 would apply pinouts along connector 401 that are compatible with PCB 3.

[0051] In use, if a user wishes to use a USB 3.0 device in conjunction with the HMD, and the HMD currently comprises PCB 1 , the user may remove PCB 1 and replace it with PCB 2 via an access port of the HMD.

[0052] The connectors 401 and 41 1 of PCB 1 , PCB 2 and PCB 3 may mechanically connect normal or parallel to each other. The connectors may be through-hole connectors, SMT connector, header pin connector, or other suitable disengageable connector having separate channels between the electronic components in an array of PCBs.

[0053] Referring now to Fig. 5, another exemplary configuration of PCBs for an HMD is shown. A processor PCB 501 comprises: a processor; an HDMI outlet; a power management module; storage; a dynamic random-access memory (DRAM); a wireless communication module; and a connector for engagement with a connector of an adjacent carrier PCB 531. The carrier PCB 531 comprises: a charging circuit or battery management module electrical coupled to a battery (which may be on- or off-board the carrier PCB) and the power management module on the processor PCB 501 ; a first HDMI switch connected to the HDMI outlet on the processor PCB 501 : an HDMI outlet connected to the HDMI switch; an audio codec connected to the processor on the processor PCB 501 ; an HDMI inlet; a second HDMI switch connected to the processor on the processor PCB 501 , the HDMI inlet and the first HDMI switch; an HDMI to MIPI/LVDS converter connected to the processor on the processor PCB and the first and second HDMI switches; a MIPI/LVDS outlet connected to the HDMI to MIPI/LVDS converter; and other ports for communication with various electronic components, such as, for example, sensors, buttons/LEDs, external storage and a camera. A MIPI/LVDS display of an HMD comprising the PCBs of Fig. 5 may be connected to the MIPI/LVDS outlet of the carrier PCB, and directly via USB, I2C or other suitable communication protocol to the processor on the processor PCB 501.

[0054] The processor controls the components on the processor PCB 501. Further, the processor controls the HDMI to MI PI/LVDS converter, the first and second HDMI switches, and the audio codec. The processor may further directly control attributes of the MIPI/LVDS display, such as, for example, backlight, frame rate and resolution.

[0055] The processor obtains an audio stream from the HDMI to MIPI/LVDS converter, which is configured to split the video and audio signals from the HDMI inlet, and routes the audio stream to the audio codec. The audio stream may be in I2S of other suitable audio format. The audio codec converts the audio stream for output to the audio system of the HMD. The configuration shown in Fig. 5 provides properly sequenced signal transmission amongst the components of the PCBs by assigning processing of sound and video signals from the input HDMI signal to the respective components configured to process those signal.

[0056] Referring now to Fig. 6, an alternate configuration to the configuration of Fig. 5 is shown. A carrier PCB 631 of Fig. 6, however, further comprises a processor, such as, for example, a microcontroller, to offload one or more of the following functions from the processor onboard the processor PCB 601 : control of the HDMI switches and HDMI to MIPI/LVDS converter; and direct control of the attributes of the display described above.

[0057] Referring now to Fig. 7, still another configuration for PCBs of an HMD is shown in which two MIPI/LVDS outputs are provided for output to multiple displays. The configuration consists of a processor PCB 701 , a carrier PCB 731 and an HDMI PCB 751. The processor PCB in this configuration is the same as described with respect to Figs. 5 and 6, except that the processor PCB of this configuration does not comprise an HDMI outlet. The principal HDMI functions are carried out on the HDMI PCB 751 , which comprises: a DRAM; a processor; storage; an HDMI switch for receiving an HDMI signal from an HDMI inlet on the carrier PCB; an HDMI to MIPI/LVDS converter connected to the HDMI switch; and two MIPI/LVDS outlets connected to the HDMI to MIPI/LVDS converter. The HDMI to MIPI/LVDS converter separates the audio and video signals and routes the audio signal to the processor on the processor PCB 701 for transmission to the audio codec on the carrier PCB 731.

[0058] Referring now to Fig. 8, an HMD 801 is electronically coupled to an external expansion system 821 to enable various storage and/or processing tasks to be offloaded to, or enhanced by, components within the external expansion system. The HMD 801 is worn by a user 803 situated within a physical environment. The HMD 801 is electronically coupled via a mating connector exposed by an access port via a link 81 1 to the external expansion system 821. The HMD 801 comprises an onboard processor (not shown) which, while capable of sufficient performance for certain users or applications, may not be sufficiently capable on its own for other users or applications. For example, applicant has found that an HMD which is fully untethered by any physical connection to systems which are remote from the user or the HMD is capable of sufficient processing to render AR for many applications while incorporating economically available processors onboard the HMD for performing the processing. However, as user needs or demands call for higher processing capabilities, particularly of graphics processing capabilities required by, for example, many AAA-class video games, the size, weight, cost and power consumption of the combined processing environment if provided onboard the HMD may become too great until, either, the HMD is too heavy to be comfortably worn, too expensive for more casual users or applications or too power hungry to permit a desirable operational duration. For the latter type of user, it may be preferable, therefore, to favour processing power over the type of freedom of movement that may be provided only when the HMD is completely untethered.

[0059] In order to provide a single HMD base configuration which can be used by users with various demands, the HMD therefore preferably enables wired or wireless connectivity to one or more external expansion system components configured to enhance the capabilities of the base configuration of the HMD. In one aspect, this may reduce the number of configuration levels for the HMD while permitting a suitable degree of customization across diverse user groups. While wireless connectivity between the HMD and the external expansion system components may permit greater freedom of movement by the user of the HMD, a wired connection may enable much greater data transfer rates between the HMD and the external expansion system components. For example, applicant has found that many high-performance applications may demand graphics processing which exceeds that which can be conventionally externalized through a wireless connection. Therefore, to enable implementation of the HMD for such applications, the connection is preferably a wired connection. More preferably still, the wired connection is a PCIe connection. A PCIe connection may enable sufficient data transfer rates between the HMD and one or more external GPUs (eGPUs) in an external expansion system to, for example, enable the eGPUs to perform rendering required for playing many AAA-type video games. The processor of the HMD may therefore be configured to provide a PCIe bus communicatively linked to a PCIe port of any size (but preferably comprising 8-lane or greater slots) in order to provide such a PCIe connection. Further, the HMD preferably comprises a connector disposed on or within the HMD so as to be externally accessible for connectably and preferably releasably receiving one end of the link. The connector is electronically coupled to the PCIe port. The processor may further comprise a driver or repeater disposed between the PCIe port and the connector in order to enable communication with the external expansion system over larger distances. The driver or emitter may be omitted if the link is optical as opposed to, for example, a copper or other non-optical link. If the link is not optical, however, it may comprise additional repeaters as may be required to provide signal integrity over a given distance for the link. Provided that the link is at least partially wired, the link may enable one- or two-way power transfer between the HMD and the external extension system. This may enable, for example, external charging of the HMD from a power source of the external extension system. Further, by performing certain processing tasks remotely from the HMD, the external expansion system, if equipped with its own power source, may ensure that the HMD's onboard power source does not overly limit the graphics capability to which the HMD has access. The external expansion system 821 comprises a power connection 823 to electrically couple the system to mains power. However, other external power sources may be used.

[0060] The external expansion system may comprise a driver to recover the signals from the HMD, and also to drive signals from the external expansion system over the same distance to the HMD. In the aforementioned embodiment, the external expansion system comprises a PCIe port coupled to the driver. The port may be further connected to a switch or a bridge operable to distribute the signal amongst one or more endpoint systems, such as, for example, eGPUs, storage drives, or other systems which a user of the HMD may wish to combine with the HMD. The transfer rate between the bridge and the endpoint systems is limited by the transfer rate of the link.

[0061] Referring now to Figs. 9(a) and (b), exemplary configurations for an HMD with a pair of external GPUs (eGPUs) electronically coupled to a processor of the HMD using a PCIe link is shown. The depicted embodiment is directed to enabling AR applications using eGPU configurations in which a pair of eGPUs working in parallel would be suitable. Although various eGPUs may be paired to perform parallel processing, the processor of the HMD may comprise an insufficient number of ports to provide parallel links to the pair of eGPUs. For example, certain available processors suitable for general HMD processing may comprise a single 8-lane PCIe Gen 3.0 port, as shown in Fig. 9. In one exemplary graphics processing task, a first eGPU may handle one half of the graphics processing task required by the AR application, while a second eGPU may perform the other half of the graphics processing task. In the embodiment depicted in Fig. 9(a), a processor 901 of the HMD comprises a PCIe Gen 3.0 8-lane port 903 with a PCIE Gen 3.0 riser adaptor 905 providing an outlet for wired coupling via a link with an external eGPU expansion system 911. The processor may be, for example, an AMD™ FX- 8800P processor. The eGPU expansion system 911 comprises a pair of EGPUs 917, 919, such as, for example, Nvidia™ eGPUs, the pair of eGPUs being configured to perform graphics processing in parallel, and each eGPU requiring an 8-lane PCIe link to the HMD to fully perform. While various available GPUs may enable bridging using a scalable link interface (SLI), it has been found that certain eGPUs, including Nvidia™ GPUs, require an 8-lane link to each eGPU in a pair in order to fully perform. Therefore, the eGPU expansion system 911 comprises a PCIe 3.0 8-lane to dual PCIe 2.0 8-lane bridge 913 in order to break out the single 8-lane link from the processor into two 8-lane links 915 to each be routed to each eGPU 917, 919. Alternatively, as shown in Fig. 9(b), the bridge 913 may be disposed onboard the processor 921 of the HMD. In order to enable separate linking to each of the eGPUs 917, 919, the processor 921 of the HMD comprises two PCIe Gen 2.0 8-lane riser adaptors 925, each adaptor 925 routing each of the links 915 to its respective subscribing eGPU 917, 919 from the bridge 913. The configuration depicted in Fig. 9(a) may require less complex wired linking, since only a single link between the HMD and the eGPU expansion system is necessary. Further, locating the bridge in the eGPU expansion system and offboard the HMD reduces complexity in the HMD while still providing flexibility to add eGPU capabilities to the processor of the HMD.

[0062] Fig. 10 illustrates still another configuration in which an HMD 1001 is electronically coupled through a mating connector via wired PCIe connection link 1010 to an external expansion system 1011. It will be appreciated that some of the components illustrated in Fig. 10 are analogous to the components in the embodiments illustrated and described with reference to Figs. 9(a) and (b). The HMD 1001 comprises a CPU 1002 and a memory 1003, both of which are electronically coupled to a PCIe root complex 1004 which hosts a PCIe port 1005. The CPU 1002 may be, for example, an APU, and may comprise an integrated GPU. The HMD 1001 further comprises a driver 1006 coupled to the PCIe port 1005 for providing a sufficiently defined signal over the length of the link 1010. The link 1010 is releasably attached to a port connector 1007 mounted to the HMD 1001 at a region externally accessible to receive the link 1010. The link 1010 connects the external expansion system 1011 via another connector 1012 mounted thereon which is configured to accept releasably or fixedly receive the other end of the link 1010. The connector 1012 is coupled to a driver 1013, as previously described, and thence to a PCIe port 1014, before being routed to the switch 1015. The depicted external expansion system 101 1 comprises 2 eGPUs 1016 which share graphics processing tasks, as well as an external storage device 1017. The CPU 1002, both eGPUs 1016, and the external storage 1017 are all electronically coupled to a shared memory onboard the HMD 1001 via the illustrated PCIe connection link 1010.

[0063] Applicant has found that many currently available eGPUs which are sufficiently powerful for a number of AAA-type games may be too heavy and/or demanding of power to mount on the HMD while being comfortable to wear and move about the physical environment. For example, while more basic acceptable graphics processing may be feasible onboard the HMD without impacting usability, higher calibre game play may require a degree of processing that is power- intensive and costly from point of view of price. By implementing the configurations in Figs. 8, 9(a), 9(b) or 10, the HMD may provide baseline graphics processing internally which most users of the HMD may find suitable for various applications, while enabling more demanding users to upgrade the processing by distributing processing amongst more than one processor. At the same time, by enabling distributed or paired processing using two 8-lane PCIe links between the pair of eGPUs, processing capacity may be significantly increased beyond the baseline graphics processing of the HMD. Further, the offloading onto a pair of eGPUs of major graphics processing tasks may enable the power source of the HMD to be kept to a minimum by permitting the use of graphics processing resources which are powered by sources which are remote from the HMD. The use of PCIe linking may further enable wired coupling of the HMD to eGPUs which is suitably long to permit a high degree of user mobility throughout the physical environment despite the tethering which is inherent in wired connections.

[0064] Although the foregoing has been described with reference to certain specific embodiments, various modifications thereto will be apparent to those skilled in the art without departing from the spirit and scope of the invention as outlined in the appended claims. The entire disclosures of all references recited above are incorporated herein by reference.