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Title:
CONTROLLER FOR A BRUSHLESS DC MOTOR
Document Type and Number:
WIPO Patent Application WO/2003/084047
Kind Code:
A1
Abstract:
A control circuit provides a three phase brushless DC motor with optimum electrical energy so it can maintain substantially constant speed with rapid changes in load, with little noise. The circuit includes a power factor corrector that provides DC voltage to the motor nearly independent of input voltage, with a nearly sinusoidal input current. A speed control loop provides a highly pulsed speed signal responsive to rapid changes in speed due to load changes. The speed control loop provides a set value to a current control loop that provides the motor with a constant current, regardless of changes in load.

Inventors:
VAN EERDEN GERHARD (NL)
Application Number:
PCT/US2003/009305
Publication Date:
October 09, 2003
Filing Date:
March 26, 2003
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MOL BELTING CO (US)
VAN EERDEN GERHARD (NL)
International Classes:
H02P6/06; H02P6/08; (IPC1-7): H02P6/08; H02P6/06
Domestic Patent References:
WO2000060724A12000-10-12
WO1995034946A11995-12-21
Foreign References:
US6137251A2000-10-24
US4847555A1989-07-11
DE4214782A11992-11-12
GB2268010A1993-12-22
US4893067A1990-01-09
Other References:
BELL J B ET AL: "Speed control of a brushless DC motor using pulse density modulation and MCTs", APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, 1994. APEC '94. CONFERENCE PROCEEDINGS 1994., NINTH ANNUAL ORLANDO, FL, USA 13-17 FEB. 1994, NEW YORK, NY, USA,IEEE, 13 February 1994 (1994-02-13), pages 356 - 362, XP010118549, ISBN: 0-7803-1456-5
Attorney, Agent or Firm:
Bair, Joel E. (N.W. Suite 600 Grand Rapids, MI, US)
Download PDF:
Claims:
CLAIMS I-claim :
1. A controller (100) for a brushless DC motor (28) characterized by a speed control loop (176) and current control loop (192), wherein the speed control loop includes means (160) for determining speed changes of the motor due to changing loads on the motor, and providing a set value indicative of those speed changes to the current control loop, and wherein the current control loop has means (190) responsive to charges in the set value to provide constant current to the motor, whereby the motor can maintain substantially constant speed with rapid changes in load.
2. A controller according to claim 1 wherein the set value is at high gain.
3. A controller according to claims 1 or 2 wherein the means for determining speed changes of the motor includes a commutation sensor for each phase of the brushless DC motor, wherein the commutation sensor sends a speed set signal (162,262) indicative of motor speed to the speed control loop.
4. A controller according to claim 3 wherein at least one commutation sensor is a Hall sensor.
5. A controller according to claims 3 or 4 wherein at least one commutation sensor is an optical sensor.
6. A controller according to claims 35 wherein the optical sensor is in addition to the sensor for each phase.
7. A controller according to claim 6 wherein the optical sensor is high resolution.
8. A controller according to claim 7 wherein the resolution is about 1000 pulses per revolution of the brushless DC motor.
9. A controller according to claims 37 wherein the speed set signal (162, 262) is sampled and held by the speed control loop (176) to provide high gain at the set value.
10. A controller according to claim 9 wherein sampling is provided by an error amplifier (178) and holding is provided by a capacitor (194).
11. A controller according to claim 10 wherein the speed set signal is sent to an integrator (300) before it is fed to the error amplifier (178).
12. A controller according to claim 11 wherein the output voltage from the integrator is sampled based on pulse duration before it is fed to the error amplifier.
13. A controller (100) for a brushless DC motor (28) driven by a multiphase bridge (126) having top (136) and bottom (138) switches, characterized by a circuit that sends pulse width modulated drive signals (A2, B2, C2) to the bottom switches and high frequency drive signals (Al, B l, C1) to the top switches, enabling the top switches to remain on during the modulation cycles, whereby the brushless DC motor can operate smoothly at low speeds and with little noise, regardless of changes in load on the motor.
14. A controller according to claim 13 wherein the pulse width modulated signal is generated from a current control loop (192) that compares current sampled from the multiphase bridge to a set value.
15. A controller according to claim 14 wherein the set value is determined by a speed control loop (176).
16. A controller according to claim 14 and 15 wherein the speed control loop includes means for determining speed changes of the motor due to changing loads on the motor.
17. A controller according to claim 1416 wherein the set value is at high gain.
18. A controller according to claims 16 or 17 wherein the means for determining speed changes of the motor includes a commutation sensor for each phase of the brushless DC motor, wherein the commutation sensor sends a speed set signal indicative of motor speed to the speed control loop.
19. A controller according to claim 18 wherein at least one commutation sensor is a Hall sensor.
20. A controller according to claims 18 or 19 wherein at least one commutation sensor is an optical sensor.
21. A controller according to claims 1820 wherein the optical sensor is in addition to the sensor for each phase.
22. A controller according to claim 20 or 21 wherein the optical sensor is high resolution.
23. A controller according to claim 22 wherein the resolution is about 1000 pulses per revolution of the brushless DC motor.
24. A controller according to claims 1823 wherein the speed set signal is sampled and held by the speed control circuit to provide high gain at the set value.
25. A controller according to claim 24 wherein sampling is provided by an error amplifier and holding is provided by a capacitor.
26. A controller according to claim 25 wherein the speed set signal is sent to an integrator before it is fed to the error amplifier.
27. A controller according to claim 26 wherein the output voltage from the integrator is sampled based on pulse duration before it is fed to the error amplifier.
28. A method of controlling the speed of a brushless DC motor characterized by the steps of: providing a speed control loop and a current control loop providing a commutation sensor for each phase of the brushless DC motor providing a bridge circuit for each phase of the brushiess DC motor obtaining a speed set signal for each commutation. sensor transition feeding the speed set signal to an error amplifier sampling and holding the output from the error amplifier to maximize gain feeding the output to the current control loop generating a pulse width modulated signal from the output of the current control loop and feeding it to the bottom switches in the bridge circuit feeding a high frequency signal to the top switches in the bridge circuit whereby substantially constant current can be supplied to the brushless DC motor at low speeds and little noise, regardless of changes in torque in the brushless DC motor.
Description:
CONTROLLER FOR A BRUSHLESS DC MOTOR CROSS-REFERENCE TO RELATED APPLICATION This application claims the benefit of U. S. Provisional Application Serial No.

60/319,155, filed March 27,2002.

BACKGROUND OF THE INVENTION Field of the Invention The invention relates to circuits for controlling motors, and more particularly to a control circuit for controlling the operation of a brushless DC motor.

Description of the Related Art It is known to use brushless DC motors in a variety of applications, including consumer appliances such as refrigerators and air-conditioners, electronic devices such as fans and VCRs, and electrical power steering systems. Generally, brushless DC motors are employed when constant high speed or high torque are required, largely because of their superior performance, reliability and endurance. However, in applications where speed is variable, particularly where low speed is desired, brush DC motors have conventionally been used because they are easily driven at variable speeds. This is because of the natural characteristics of the typical brush DC permanent magnet motor.

Nonetheless, many advances had been made in control circuits for controlling the speed of brushless DC motors. Linear regulators have been used to regulate rotational speed but these have been shown to pose significant efficiency problems.

Pulse width modulation (pwm) has also been used in the prior art to regulate motor speed. One method commonly used is to pulse width modulate all of the commutation transistors to the brushless DC motor. This employment of pwm reduces the dissipation of energy involved with changing motor speed.

In many applications, a full bridge driver is used to apply pwm to a brushless DC motor. This approach is especially employed for brushless DC motors used in industrial drive applications because of high torque and power density capabilities of the motor. A problem remains, however, when it is necessary to run the motor at low

speeds with sudden changes in torque. The nature of a brushless DC motor makes it very difficult to maintain constant speed. Noise is also a significant problem. These problems are particularly pronounced if a brushless DC motor were to be used in material handling applications or in a treadmill.

SUMMARY OF THE INVENTION A controller for a brushless DC motor according to the invention solves these and other problems by providing a control circuit that effectively provides a constant current to the motor at low speeds, regardless of torque changes in the motor by varying loads, and with little noise. In one aspect of the invention, a speed control loop includes means for determining speed changes of the motor due to changing loads on the motor, and for providing a set value indicative of those speed changes to a current control loop. The current control loop has means responsive to changes in the set value to provide constant current to the motor. In this way, the motor can maintain substantially constant speed with rapid changes in load.

Preferably, the set value is at high gain. Typically the means for determining speed changes of the motor includes a commutation sensor for each phase of the brushless DC motor. The commutation sensor sends a speed set signal indicative of motor speed to the speed control loop. At least one commutation sensor can be a Hall sensor or an optical sensor.

The optical sensor, if there is one, can be in addition to the sensor for each phase. Preferably, the optical sensor will high be revolution, on the order of about 1000 pulses per revolution of the brushless DC motor.

The speed set signal can be sampled and held by the speed control loop to provide high gain at the set value. Sampling is provided by an error amplifier and holding is provided by a capacitor. In one embodiment, the speed set signal is sent to an integrator (300) before it is fed to the error amplifier. The output voltage from the integrator can be sampled based on pulse duration before it is fed to the error amplifier.

In another aspect of the invention, a controller is provided for a brushless DC motor driven by a multiphase bridge having top and bottom switches. The controller sends pulse width modulated drive signals to the bottom switches and high frequency

drive signals to the top switches, enabling the top switches to remain on during the modulation cycles. As a result, the motor can operate at low speeds smoothly and with little noise even with sudden torque changes.

Preferably, the pulse width modulated signal is generated from a current control loop that compares current sampled from the multiphase bridge to a set value.

The set value is determined by a speed control loop.

In a further aspect of the invention, a method of controlling the speed of a brushless DC motor includes the steps of: providing a speed control loop and a current control loop providing a commutation sensor for each phase of the brushless DC motor providing a bridge circuit for each phase of the brushless DC motor obtaining a speed set signal for each commutation sensor transition feeding the speed set signal to an error amplifier sampling and holding the output from the error amplifier to maximize gain feeding the output to the current control loop generating a pulse width modulated signal from the output of the current control loop and feeding it to the bottom switches in the bridge circuit, and feeding a high frequency signal to the top switches in the bridge circuit.

In this way, substantially constant current can be supplied to the brushless DC motor at low speeds and little noise, regardless of changes in torque in the brushless DC motor.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view of a circuit for a brushless DC motor incorporating a controller according to the invention; FIG. 2 is a schematic representation of the driver portion of the controller of FIG. 1; FIG. 3 is schematic diagram of the control circuit of the driver portion in FIG.

.

FIG. 4 is a schematic representation of the driver portion of an alternative embodiment of the controller according to the invention; and

FIG 5. is schematic diagram of the control circuit of the driver portion in FIG.

4.

DETAILED DESCRIPTION OF THE DRAWINGS A circuit for a brushless DC motor incorporating a controller according to the invention is shown in the embodiment schematically illustrated in Figs. 1-3. The embodiment is designed for control of a three phase brushless DC motor in a heavy- duty application such as a material handling conveyor or a treadmill. In such an application, the power source will typically be an AC circuit 102 at 110-240 VAC and 50-60 Hz. Thus, a rectifier 104 is provided to convert the AC to DC. It will be understood that in applications where the source of power is DC, no rectifier is necessary, although adjustments in input voltage or current may be necessary depending upon the specific application.

Looking first at Fig. 1, it will be seen that a controller 100 comprises two principal portions enclosed by dashed lines: a power factor correction (PFC) portion 106 and a drive portion 108. The PFC portion 106 provides the drive portion 108 with DC voltage that is nearly independent of the input voltage, while providing an almost sinusoidal input current. This low distortion input current results in a high power factor and therefore in the lowest possible RMS input current at a given power.

Consequently, load on the main AC circuit 102 is minimized.

The PFC portion 106 includes a PFC boost converter 110 operating in border control (zero current switching). An acceptable integrated circuit for the PFC boost converter is a TDA 4862 from Infineon, specifically developed for PFC applications.

An auxiliary power supply 118 provides supply voltage to the control circuitry in the drive portion 108 through a supply input 120, typically about 15 V. The output of the PFC boost converter 110 is directed to input 122 of the drive portion 108.

For this application, circuitry has been added to further reduce input current distortion. The zero current detection circuit has been modified in order to prevent excessive distortion at high input voltages (approaching the output voltage). Thus, the PFC portion 106 also includes an input current limiter circuit 112 that measures the average input current from the AC power source 102. When the average input current exceeds a predetermined maximum value, the output power of the drive portion will

be reduced. Also, buffer capacitors 123 at the output c-fthe PFC portion 106 enable the drive portion 103 to deliver peak power in excess of the average input power and maintain satisfactory operation during dips and interruptions in the AC power source.

For safety, an overvoltage comparator 114 prevents a hazard when pin 1 of the TDA4862 is shorted to its ground pin. Also, a temperature protection circuit 116 prevents damage from overheating.

Looking now also at Figs. 2 and 3, it will be seen that the drive portion 108 comprises a control circuit 124 and a three-phase bridge 126, connected to a three- phase brushless DC motor (BLDC) 128. The input 122 to the three-phase bridge 126 comprises a positive input terminal 130 and a negative input terminal 132, with an input capacitor 134 coupled across the positive and negative input terminals 130,132.

The three-phase bridge 126 is a power amplifier having six electronic switches.

Acceptable switches might be IGBT's or MOSFETs, depending upon the application.

This embodiment includes 6 IGBTs (2 for each phase of the BLDC 128). The switches thus include top switches 136a, 136b, and 136c, and bottom switches 138a, 138b, and 138c. The two switches for each phase are connected in series, and the join point 140,142, and 144, respectively for each pair, is connected to a corresponding phase winding 146,148 and 150 in the BLDC 128.

The top switches 136a, 136b, and 136c are connected to the positive bus 152 and the bottom switches 138a, 138b, and 138c are connected to the negative bus 154.

A current sensor 156 in the positive bus and a current sensor 158 in the negative bus prevent damage due to shorts in motor windings and shorts to ground. As will be explained later, the current sensor 158 in the negative bus is also used in a control loop in the control circuit 124.

At least three commutation sensors 160 (one for each phase) associated with the BLDC 128 provide information for commutation of the motor winding voltages.

Although conventional Hall sensors will work, the preferred embodiment uses three optical sensors because of their superior accuracy in locating the position of the rotor relative to the stator winding. Either opto-interrupters or opto-reflectors are adequate. The sensors 160 send three sensor signals 160a, 160b, and 160c to the control circuit 124.

Looking now more particularly at the control circuit 124-n Fig. 3, two integrated circuits specifically for the BLDC motor control are employed. One, a Motorola MC33035 integrated circuit, provides 3 cutputs, A 1, B1, and Cl for driving the top IGBT switches 136a, 136b, and 136c, respectively, and 3 outputs A2, B2, and C2 for driving the bottom IGBT switches 138a, 138b, and 138c, respectively. The MC33035 also receives the sensor signals 160a, 160b, and 160c and decodes the rotor position of the BLDC. It then applies the appropriate control logic to generate the drive outputs Al, B1, and C1, and A2, B2, and C2 for the IGBT switches. The other integrated circuit, a Motorola MC33039 monoflop, provides, with the aid of an averaging filter, a speed signal from the three sensor signals 160a, 160b, and 160c.

Both speed and torque of the BLDC 128 are manually adjustable, although it will be understood that a communications device 161 such as a computer can do so (see FIG. 2). Looking again at FIG. 3, the speed set 162 preferably has a voltage range of 0-4V. The torque set 164 preferably has a range of 0-6 V. The input voltage 120 from the auxiliary supply 118 is coupled on the one side to transistor 166 through resistor 168, and on the other to transistor 170 through resistor 172. One side of transistor 170 is connected to the torque set 164 through resistor 174.

The control circuit 124 includes two control loops. A speed control (or outer) loop 176 includes an error amplifier 178 that receives the speed set signal 162 at the non-inverting input. The MC33039 generates pulses of constant amplitude and duration at each sensor transition. The resulting signal 180 on the one hand goes to another monoflop 181, and on the other hand through two resistors 182,184 to the inverting input of the error amplifier 178. One of the resistors 182 is made variable to be able to set optimum loop gain at different speeds. Ultimately, after being sampled at each sensor transition, the output 186 of the speed control loop 176 serves as the set value for a current control (or inner) loop 192.

A fast response to sudden torque changes requires a high loop gain. Due to the pulsating nature of the MC33039 output, a high gain would result in a large AC component on the output of the amplifier 178. Feeding a high gain output with a large AC component from the error amplifier 178 without sampling and hold as a set value to the current control loop 192 would result in a lot of noise and torque ripple.

Sampling at each transition results, at steady speed, in a DC set value for the current

control loop 192. A roll off circuit 188 comprising two capacitors and a resistor is coupled between the inverting input and the output 187 of the error amplifier 178.

These determine loop gain, together with the two resistors 182, 184 between the MC33039 and the amplifier 178. The transistor 170, coupled to the torque set 164, is also connected to the output 187 of the error amplifier 178 to clip the output of the speed control loop 176 and thus provide effective adjustable torque control. The output 187 of the error amplifier 178 and the output of the monoflop 181 are handled by the switch 189. A hold capacitor 194 is coupled between the output signal 186 and ground.

The current control loop 192 samples the current from the 3-phase bridge by way of the current sensor 158 and sends it, after filtering, amplification and addition of slope compensation, to the non-inverting input of a comparator 190. The output 187 of the speed control loop 176 is sent, after sampling at 186, to the inverting input of the comparator 190 as the set value. The output of the comparator 190 goes to the MC33035 controlling a PWM signal. Slope compensation is provided by the MC33035 sawtooth oscillator to prevent current mode instability at duty cycles above 50%. As a result, substantially constant current is supplied to the BLDC 128 resulting in low torque ripple and low noise. The sample and hold of the speed control loop 176 thus allows a high gain that contributes to low torque ripple and low noise.

At any given moment during operation, one of the top switches 136a, 136b, and 136c, and one of the bottom switches 138a, 138b, and 138c will be conducting (but never two in the same branch at the same time), according to the rotor position.

The PWM signal is directed to the bottom switches 138a, 138b, and 138c to provide effective speed and torque control to the BLDC 128. The drive outputs Al, Bl, and Cl for the top switches 136a, 136b, and 136c are transmitted at a high frequency (preferably above 100 KHz) compared to other outputs of the MC33035. For example, the top switches operate typically at a maximum of 85Hz and the PWM signal to the bottom switches is at 20KHz. The high frequency drive for the top switches is transferred through small transformers, rectified and fed to the gates of the upper switches. When the high frequency is disabled, the gate is discharged through a resistor or an active discharge circuit. This allows the top switches 136a, 136b, and 136c to be turned on indefinitely at zero or near zero motor speed and still provide

torque. It also allows the use of smaller and less expensive gate drive transformers, and prevents the need for auxiliary or bootstrapped supplies at each top switch.

An alternate embodiment of the control and driver circuits is shown in Figs. 4 and 5. In both diagrams, elements identical to those in the first embodiment carry like reference numerals. The principal advantage of the alternate embodiment is that AC ripple that may emanate from the error amplifier 178 is eliminated before any signal reaches the error amplifier. The permissible voltage swing on the error amplifier is no longer a limitation for the loop gain. Also, higher pulse sampling from a high speed sensor provides better accuracy in the control circuit 124. It is believed that over 1000 pulses per revolution will enable a smoothly running BLDC at any speed and torque change according to the invention. The aforementioned high resolution speed sensor of 1000 pulses per revolution would provide a compensation for the cogging torque of the BLDC 128, and therefore a further reduction in noise and torque ripple provided by the high gain and sampling.

Looking first at Fig. 4, it can be seen that an anti-parallel diode is placed across each of the top and bottom switches. Also, an additional speed sensor 160d is added. Preferably, the speed sensor 160d is an opto-interrupter or an opto-reflector operating in conjunction with a disc having multiple markings or discontinuities. In this case, more is better, so that a disc having over 1000 lines or slots, for example, will provide over 1000 pulses to the control circuit 124, enabling much higher resolution than the three commutation sensors 160a, 160b, and 160c.

In Fig. 5, it can be seen that a signal from the high-resolution sensor 160d is fed to the MC33039. Here, the speed control loop 176 differs from the earlier embodiment in that instead of feeding the speed set signal 162 directly to the non- inverting input of the error amplifier (see Fig. 3), a speed set signal 262 is fed to an integrator 300. The integrator 300 comprises a comparator 310, a resistor 330 coupled between the speed set 262 and the inverting side of the comparator 310, and a capacitor 320 placed between the resistor output and the output 334 of the comparator 310. The non-inverting side of the comparator 310 is connected to ground. The output voltage 330 from the integrator is sampled at switch 350 by each transition of the high-resolution sensor 160d by way of output signal 180 from the MC33039.

Immediately after the sampling interval, with a signal from the monoflop 181 to the

switch 322, the integrator capacitor 320 is discharged in a short interval, after which charging starts again. The charging current is determined by the speed set voltage 262 (typically 0 to minus 5 V) and the resistor 330.

The output voltage 360 after sampling is then sent to the non-inverting side of the error amplifier 178. A reference voltage 370 goes to the inverting side of the error amplifier 178. The reference voltage is a fixed voltage supplied by a separate source, typically about SV, and can be the same source of voltage for the controller. The reference voltage can also be obtained from the MC33035, which supplies a steady 6.25V. In a steady speed state, the sampled integrator output voltage 360 is equal to the reference voltage 370 at the error amplifier 178. However, any speed reduction (caused for example by changing load on the BLDC 128) results in longer integration duration, and therefore a higher sampled voltage output 360. The net result after comparing the signals at the error amplifier 178 is a higher voltage signal at 187 and a higher set value for the current loop.

While the invention has been illustrated and described with respect to specific embodiments, it will be understood by those skilled in the art that various changes, additions and omissions can readily be made without departing from the scope of the invention.