Title:
A/D CONVERSION CIRCUIT AND SOLID STATE IMAGING DEVICE
Document Type and Number:
WIPO Patent Application WO/2015/173987
Kind Code:
A1
Abstract:
This AD conversion circuit has a latch part having latch units and a latch control signal line connected to the latch units. A third voltage that is smaller than a first voltage and greater than a second voltage is applied as a power source voltage to the latch units. When a capacitor and the latch control signal line are electrically connected, the potential of the latch control signal line is equal to or greater than the third voltage. When the capacitor and the latch control signal line are electrically disconnected, the first voltage is applied to the capacitor and the second voltage is applied to the latch control signal line. In the latch units, a clock signal is latched when the potential of the latch control signal line is equal to or greater than the third voltage.
Inventors:
TANAKA TAKANORI (JP)
Application Number:
PCT/JP2014/083331
Publication Date:
November 19, 2015
Filing Date:
December 17, 2014
Export Citation:
Assignee:
OLYMPUS CORP (JP)
International Classes:
H04N5/378; H03M1/56
Foreign References:
| JP2007281540A | 2007-10-25 | |||
| JP2006081203A | 2006-03-23 | |||
| JP2013121119A | 2013-06-17 |
Attorney, Agent or Firm:
TANAI Sumio et al. (JP)
Sumio Tanai (JP)
Sumio Tanai (JP)
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