Title:
D/A CONVERTER CIRCUIT, ORGANIC EL DRIVE CIRCUIT, AND ORGANIC EL DISPLAY
Document Type and Number:
WIPO Patent Application WO/2005/093958
Kind Code:
A1
Abstract:
A D/A converter circuit drivable at low voltage with high accuracy and occupying a less area when fabricated into an IC circuit. The D/A converter circuit has a first current mirror circuit composed of output-side transistors so provided as to correspond to the digit positions of data to be converted and a second current mirror circuit cascade-connected to the upstream or downstream-side of at least one of the output-side transistors corresponding to the digit positions of lower orders of the data to be converted. The ratio of the operating current of the output-side transistor of the second current mirror circuit to that of the corresponding input-side transistor is n:1 (n is an integer of one or more). A current corresponding to the place weight of a place lower than the one’s place is generated in the output-side transistor of the second current mirror circuit thereby to generate an analog converted current.
Inventors:
ABE SHINICHI (JP)
MAEDE JUN (JP)
FUJISAWA MASANORI (JP)
FUJIKAWA AKIO (JP)
MAEDE JUN (JP)
FUJISAWA MASANORI (JP)
FUJIKAWA AKIO (JP)
Application Number:
PCT/JP2005/005673
Publication Date:
October 06, 2005
Filing Date:
March 28, 2005
Export Citation:
Assignee:
ROHM CO LTD (JP)
ABE SHINICHI (JP)
MAEDE JUN (JP)
FUJISAWA MASANORI (JP)
FUJIKAWA AKIO (JP)
ABE SHINICHI (JP)
MAEDE JUN (JP)
FUJISAWA MASANORI (JP)
FUJIKAWA AKIO (JP)
International Classes:
G09G3/20; G09G3/30; H03M1/68; H05B33/14; H03M1/74; (IPC1-7): H03M1/74; G09G3/20; G09G3/30; H05B33/14
Foreign References:
| JPS5534537A | 1980-03-11 |
Attorney, Agent or Firm:
Kajiyama, Tsuyoshi (Nishi-Shinjuku, Shinjuku-ku Tokyo 23, JP)
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