BACKGROUND

Field

[0001] The present disclosure relates to electronic circuits and, more particularly, to inductor-based resonators for voltage controlled oscillators.

Background

[0002] Voltage controlled oscillator (VCO) phase noise is often a major contributor to the overall phase noise in circuits utilizing an electronic oscillator such as phase locked loop (PLL) circuit. Conventional VCO designs may require significant power and area to meet typical specifications of wireless communication systems. The presence of higher harmonic components in an active transconductance (gm) device can cause a frequency drift of an inductor-capacitor (LC) tank resonance if the LC tank impedance at the higher harmonics is not high. This phenomenon, named the Groszkowski effect, is a contributor to noise in LC VCOs. Any technique that improves phase noise, while at the same time does not consume large area and power, is desirable.

SUMMARY

[0003] In one aspect, a two-walled coupled inductor is provided. The two-walled coupled inductor includes: a first electrically conductive wall having a first end, a second end and a first width and a second electrically conductive wall separated from the first wall by a slit, the second wall having a first end, a second end and a second width, where the second width is different from the first width. The two-walled coupled inductor further includes a first node where the first ends of the first and second electrically conductive walls are coupled; and a second node where the second ends of the first and second electrically conductive walls are coupled. One of the first and second walls is configured to be coupled to a power supply and the first and second nodes are configured to be coupled to voltage controlled oscillator (VCO) circuitry such that a common mode current flows through the one of the first and second walls coupled to the power supply and a differential mode current flows through both the first wall and the second wall. [0004] In one aspect, a method of designing a two-walled coupled inductor is provided. The method includes: simulating electromagnetic coupling of at least a differential mode and a common mode in the two-walled coupled inductor, the two- walled coupled inductor comprising: a first electrically conductive wall having a first end, a second end and a first width, a second electrically conductive wall separated from the first wall by a slit, the second wall having a first end, a second end and a second width, a first node where the first ends of the first and second electrically conductive walls are coupled, and a second node where the second ends of the first and second electrically conductive walls are coupled. One of the first and second walls is coupled to a power supply and the first and second nodes are coupled to voltage controlled oscillator (VCO) circuitry such that a common mode current flows through the one of the first and second walls coupled to the power supply and a differential mode current flows through both the first wall and the second wall. The method further includes: estimating, based on the simulated electromagnetic coupling, phase noises of the two- walled coupled inductor for a plurality of combinations of the first width and the second width; and sizing the first width and the second width based on the estimated phase noises to reduce the phase noise of the two-walled coupled inductor.

[0005] In one aspect, a method of reducing phase noise in a voltage controlled oscillator is provided. The method includes: flowing common mode current through a first wall of a two-walled coupled inductor, and flowing differential mode current through the first wall and a second wall of the two-walled inductor, the first and second wall being separated at least partially by a slit.

[0006] In one aspect, an apparatus is provided. The apparatus includes: a first means for conducting electrical current comprising a first end, a second end and a first width; a second means for conducting electrical current comprising a first end, a second end and a second width, where the first width is different from the second width, the second means for conducting electrical current and first means for conducting electrical current separated by a slit. The apparatus further includes first means for coupling the first ends of the first and second means for conducting electrical current; and second means for coupling the second ends of the first and second means for conducting electrical current. The apparatus further includes means for supplying electrical current coupled to one of the first and second means for conducting electrical current such that a common mode current flows through the one of the first and second means for conducting electrical current and a differential mode current flows through both the first and second means for conducting electrical current.

[0007] In one aspect, a voltage controlled oscillator (VCO) is provided. The VCO includes: a two-walled coupled inductor that includes: a first electrically conductive wall having a first end, a second end and a first width, a second electrically conductive wall separated from the first wall by a slit, the second wall having a first end, a second end and a second width, wherein the second width is different from the first width. The two-walled coupled inductor further includes: a first node where the first ends of the first and second electrically conductive walls are coupled, and a second node where the second ends of the first and second electrically conductive walls are coupled. The VCO further includes VCO circuitry coupled to the first node and the second node. One of the first and second walls is configured to be coupled to a power supply such that a common mode current flows through the one of the first and second walls coupled to the power supply and a differential mode current flows through both the first wall and the second wall.

[0008] Other features and advantages of the present disclosure should be apparent from the following description which illustrates, by way of example, aspects of the disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The details of the present disclosure, both as to its structure and operation, may be gleaned in part by study of the accompanying drawings, in which like reference numerals refer to like parts, and in which:

[0010] FIG. 1 is block diagram of a voltage controlled oscillator (VCO) that utilizes a two-walled coupled inductor;

[0011] FIG. 2 is a schematic diagram of an example of voltage controlled oscillator circuitry including the two-walled coupled inductor that can be used in the VCO of FIG. i;

[0012] FIG. 3 is a block diagram of the VCO of FIG. 1 showing flow paths of a differential mode current through the two-walled coupled inductor in the VCO of FIG. i;

[0013] FIG. 4 is a block diagram of the VCO of FIG. 1 showing flow paths of a common mode current through the two-walled coupled inductor in the VCO of FIG. 1; [0014] FIG 5 is a set of graphs showing phase noise estimates versus stub inductance determined in a process for designing the two-walled coupled inductor in the VCO of FIG 1;

[0015] FIG 6 is a set of graphs showing phase noise estimates versus a ratio of inner wall width to outer wall width determined in the process for designing the two-walled coupled inductor used in the VCO of FIG. 1 ; and

[0016] FIG 7 is a flowchart block diagram of the process for designing the two- walled coupled inductor in the VCO of FIG. 1.

DETAILED DESCRIPTION

[0017] The detailed description set forth below, in connection with the accompanying drawings, is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some instances, well-known structures and components are shown in simplified form in order to avoid obscuring such concepts.

[0018] An inductor-based resonator that provides for increased tank impedance at the second harmonic (common mode) is described. The inductor-based resonator has a configuration that allows this increase of impedance at the common mode frequency without requiring increased resonator area. The inductor-based resonator takes advantage of being able to fine tune inductances of both the common mode and a differential mode (first harmonic at the desired VCO frequency) independently.

[0019] In an exemplary LC VCO, the ratio of the common mode inductance and the differential mode inductance, LcM L _d iff, is ~ ¼. Since the common mode resonance frequency is twice the differential mode frequency, the ratio of VCO circuit capacitances at the common mode and the differential mode, Cavi/C _d i _ff , needs to be ~1. Since capacitance distribution is a function of VCO circuit parasitics and may be hard to control, a resonator configuration that enables a way to increase the Lc _M L _d i _ff ratio above ¼ is desired.

[0020] In various examples, the main harmonic to be suppressed is the second harmonic of the common mode current. The desired harmonic is the first harmonic of the differential mode current. In various examples, a two-walled coupled inductor that includes an outer wall and an inner wall separated by a slit is provided. The two-walled coupled inductor is configured such that the common mode current flows through the outer wall and the differential mode current flows through both the outer wall and the inner wall. In various examples, a stub is connected to the outer wall such that the common mode current also flows through the stub, but the differential mode does not. The dimensions of the stub and the outer wall determine the inductance of the common mode while the combined widths of the outer and inner walls determine the inductance of the differential mode. As long as the combined width of the outer and inner walls is the same, the inductance of the differential mode stays essentially the same.

[0021] Table 1 shows the effect on inductance of the differential and common modes by adding the slit to separate the outer and inner walls.

TABLE 1

[0022] As can be seen, the addition of the slit to form inner an outer walls increases the inductance of the common mode by about 23% while the inductance of the differential mode is only changed by about 1.3%. Thus, by positioning the slit to change the thicknesses of the outer and inner walls, while keeping the combined thickness of the inner and outer walls the same, the second harmonic of the common mode can be suppressed without, at least substantially, affecting the differential mode inductance and without increasing the power and area requirements.

[0023] FIG. 1 is a block diagram of a VCO 100 with a two-walled coupled inductor 102 having an electrically conductive outer wall 104 (referred to from hereon as the outer wall 104) and an electrically conductive inner wall 106 (referred to from hereon as the inner wall 106). The configuration of the outer wall 104 and the inner wall 106 define a slit 108 such that the inner wall 106 is separated from the outer wall 104 by the slit 108, and an electrically conductive stub 1 10 (referred to from hereon as the stub 110) extending from the outer wall 104. The outer wall 104 and the inner wall 106, in this example, are formed as two concentric rings or loops that each comprise respective first and second ends coupled at first and second nodes 122 and 124 respectively. The outer wall 104 and the inner wall 106 are electrically connected to VCO circuitry 115 via the first and second nodes 122 and 124. The outer wall 104, in this example, is coupled to a power supply 120.

[0024] Other configurations of the outer wall 104 and the inner wall 106 may also be used. For example, the stub 110 and the power supply 120 may be coupled to the inner wall 106. The VCO circuitry 115 may include all of the circuitry needed for controlling an oscillating electrical waveform produced by the two-walled coupled inductor 102. For example, the VCO circuitry 115 may include PMOS and NMOS transistors, an amplifier, capacitors (variable and/or fixed), a delay circuit, a buffer, a divider circuit, etc.

[0025] The stub 1 10 is electrically connected to the power supply 120 (e.g., a voltage source, a current source, etc.) that provides power to the components of the VCO 100. The outer wall 104, the inner wall 106 and the stub 110 may all be formed of a low-loss metal, a more lossy metal or some other conductive material. A width Wi of the outer wall 104, a width W ₂ of the inner wall 106, a width of the slit 108, a width W _stu b of the stub 110 and a length £ _stub of the stub 110 are sized to provide proper inductances for the common mode and the differential mode of the VCO 100. In various embodiments, the inductances are chosen to tune desired resonant frequencies of the differential mode and the common mode, and to increase an inductance of the common mode compared to an inductance of the differential mode. The combined width of the two-walled coupled inductor 102, W _re s, is the sum of the widths W _1; W2 and W _s ii _t as shown in the following formula:

[0026] FIG. 2 is a schematic diagram of an example of the VCO circuitry 115 and the two-walled coupled inductor 102 that can be used in the VCO 100 of FIG. 1. The two- walled coupled inductor 102 of FIG. 1 is represented in FIG. 2 by an inductor labeled L that is coupled to the VCO circuitry 1 15 at the nodes 122 and 124. The VCO circuitry 115, in this example, includes a pair of cross coupled NMOS transistors labeled Ml and M2 and a pair of cross coupled PMOS transistors labeled M3 and M4, and a varactor diode or A-MOS variable capacitance comprising two variable capacitors, labeled C _var , controlled by a control or tuning voltage V _tune . The VCO circuitry 115 also includes a fixed capacitor labeled C. The VCO circuitry 115 of FIG. 2 is exemplary and other VCO circuitry may be used. For example, a switched capacitor bank may be coupled to the VCO circuitry 1 15.

[0027] FIG. 3 is a block diagram of the VCO 100 showing a path that a differential mode current (the first harmonic of the two-walled coupled inductor 102) follows through the two-walled coupled inductor 102. The differential mode current flows along a first differential mode path 202 from the VCO circuitry 115, up a first side of the outer wall 104, around the entire outer wall 104 and down a second side of the outer wall 104 back to the VCO circuitry 115. A second differential mode current flows through the inner wall 106 along a second differential mode path 204 flowing from the VCO circuitry 115, up a first side of the inner wall 106, around the entire inner wall 106 and down a second side of the inner wall 106 back to the VCO circuitry 1 15.

[0028] As illustrated in FIG. 3 the first and second paths 202 and 204 that flow though the outer wall 104 and the inner wall 106, respectively, are parallel and therefore provide two parallel inductors. A parameter a is used to vary the combined inductance of the two parallel inductors of the outer and inner walls 104 and 106, where a is defined as follows:

[0029] where W ₂ is the width of the inner wall 106 and Wi is the width of the outer wall 104. For a fixed combined wall width W _res , when a is small, the inductance of the inner wall 106 is greater than the inductance of the outer wall 104, and when a is large, the inductance of the inner wall 106 is less than the inductance of the outer wall 104. The total combined inductance of the differential mode flowing through the outer and inner walls 104 and 106, respectively, can be minimized when a is very small or very large. The combined inductance of the differential mode is at a maximum when Wi and W ₂ are equal and a = 1.0. However, the variation of differential mode inductance from minimum to maximum is small (see, for example, Table 1 above). Due to this property, the inductance of the common mode can be increased by changing the a ratio without substantially affecting the differential mode inductance.

[0030] FIG. 4 is a block diagram of the VCO 100 showing a path that a common mode current (the second harmonic of the two-walled coupled inductor 102) follows through the two-walled coupled inductor 102 The common mode current flows through the outer wall along a common mode path 302 flowing from the power supply 120 down the electrically conductive stub 110 and down first and second sides of the outer wall 104 to the VCO circuitry 1 15. The electrically conductive stub 110 is coupled to the outer wall 104 such that the common mode current flows through the stub 110 and the outer wall 104 but the differential mode current does not flow through the stub 110 and the inductance of the common mode may be increased or decreased without changing the inductance of the differential mode significantly.

[0031] The inductance L _C M of the common mode may be selectively increased as the length f _stab of the stub 1 10 is increased, and/or as the width W _stub of the stub 1 10 is decreased, and vice-versa. The width W _stub and the length £ _stu b of the stub 1 10 can be changed without significantly affecting the inductance of the differential mode. In addition, the width Wi of the outer wall 104 can be increased to decrease the inductance of the common mode and decreased to increase the inductance of the common mode.

[0032] The dimensions of the outer wall 104, the inner wall 106 and the stub 110 can be chosen to provide inductances of the common mode and the differential mode, LCM and L _di ff, respectively, and these dimensions can be fine-tuned in order to minimize phase noise, e.g., of a phase locked loop system that employs the VCO 100. The electromagnetic coupling of the differential mode and the common mode can thus be fine-tuned by varying the values of the outer and inner wall widths Wi and W2 and by varying the inductance L _stUb of the stub 110. The ratio of common mode inductance LCM and the differential mode inductance L^ff can be approximated by the following equation: _ ( ^L stub + ^Ldiff)

(3) Ldiff ^L diff

[0033] As described above, in order to minimize phase noise of oscillator circuitry (e.g., the VCO circuitry 115) coupled to the two-walled coupled inductor 102, the ratio of LcM Ldiff s can be increased. The dimensions of the outer wall 104, the inner wall 106 and the stub 1 10 can be chosen to provide inductances of the common mode and the differential mode, L _C M and Ldiff, respectively, which can minimize phase noise of the oscillator circuitry (e.g., the VCO circuitry 1 15). Methods of estimating phase noise known to those skilled in the art can be employed to arrive at the proper ratio of LcM/L _d i _ff t at minimizes the phase noise.

[0034] As described below, methods can be employed to identify the stub inductance L _stab and the wall width ratio a that can minimize the phase noise in an oscillator circuit such as the VCO circuitry 115 of the VCO 100.

[0035] FIG. 5 is a set of graphs showing phase noise estimates determined in a process described below for designing the two-walled coupled inductor 102. The phase noise estimates illustrated in FIG. 5 are determined at various frequency offsets from a center VCO frequency for a typical 12 GHz VCO circuit for various values of stub inductance L _stab - first graph 510 shows phase noise estimates at a 10 kHz offset, a second graph 520 shows phase noise estimates at a 100 kHz offset, a third graph 530 shows phase noise estimates at a 1 MHz offset, a fourth graph 540 shows phase noise estimates at a 100 MHz offset and a fifth graph 550 shows estimates of swing of a perturbation projection vector (PPV). PPV is an established technique for oscillator phase noise analysis. As can be seen from the first graph 510, the phase noise at a 10 kHz offset from the center frequency of the VCO can be minimized at a stub inductance L _stu b of -161 pH. This phase noise is about 10 dB lower than the phase noise would be without the stub 110 (see the phase noise at L _stUb = 0).

[0036] FIG. 6 is a set of graphs showing phase noise estimates versus the ratio a determined in the process for designing the two-walled coupled inductor 102. The phase noise estimates are determined at various frequency offsets from the center VCO frequency for the 12 GHz VCO circuit for various inner and outer wall widths of the resonator circuit. FIG. 6 shows estimated phase noise at various frequency offsets from the center VCO frequency for the 12 GHz VCO circuit for various values of a given by equation (2) above where a determines the position of the slit 108 between between the outer wall 104 of width Wi and the inner wall 106 of width W ₂ . A first graph 610 shows phase noise estimates at a 10 kHz offset, a second graph 620 shows phase noise estimates at a 100 kHz offset, a third graph 630 shows phase noise estimates at a 1 MHz offset and a fourth graph 640 shows estimates of swing of a PPV. As can be seen, the phase noise at 10 kHz offset from the center frequency of the VCO can be minimized at an a = -0.14. This phase noise is about 10 dB lower than the phase noise would be without the slit 108 (see the phase noise at a = -1000).

[0037] In the analyses for which phase noise estimates are presented in FIGS. 5 and 6, the width of the slit was not considered. The slit width W _s ii _t was kept constant in the analyses. In various examples of the two-walled coupled inductor 102, the slit width may be about one-half to about one-third of the combined widths of the inner and outer walls. However, slit width W _s ii _t may be added as a variable for further fine tuning the electromagnetic coupling of the inner and outer walls.

[0038] FIG. 7 is a flowchart block diagram of a process 700 for designing a two- walled coupled inductor. For example, the process 700 may be used to size portions of the two-walled coupled inductor 102 illustrated in FIGS. 1, 3 and 4. The process 700 of FIG. 3 may be performed with any suitable inductor-based resonator circuit; however, to provide a specific example, the process 700 will be described with reference to VCO 100 and the two-walled coupled inductor 102 illustrated in FIGS. 1, 3 and 4.

[0039] In block 710, the process 700 simulates electromagnetic coupling of at least a differential mode and a common mode in a two-walled coupled inductor 102, such as, for example the two-walled coupled inductor 102 of FIGS. 1, 3 and 4. The simulation of block 710 models current flow through the electrically conductive outer wall 104 having a first width Wi and through the electrically conductive inner wall 106 separated from the outer wall by the slit 108 of width W _s ii _t , the inner wall having a second width W ₂ . The simulation of block 710 also couples the inner wall 106 and the outer wall 104 at the first and second nodes 122 and 124. The simulation at block 710 models the common mode current flowing through the outer wall 104 and the differential mode current flowing through both the outer wall 104 and the inner wall 106.

[0040] The simulation of block 710 can change the various dimensions of the outer wall 104, the inner wall 106 and the slit 108. At block 720, the process estimates, based on the simulated electromagnetic coupling of block 710, phase noises of the two-walled coupled inductor 102 for a plurality of combinations of the outer wall width Wi, the inner wall width W ₂ by varying the location of the slit 108 by varying, for example, the a ratio of equation (2). The combined widths of the outer wall 104 and the inner wall 106 may be held constant by varying the a ratio in order to vary the inductance of the common mode while keeping the differential mode inductance essentially constant.

[0041] At block 730, the process 700 sizes the width of the outer wall (Wi) and the width of the inner wall (W ₂ ) based on the phase noises estimated at block 720 to reduce the phase noise of the two-walled coupled inductor 102. In various examples, the sizing at block 730 includes choosing the combination of outer wall width Wi and inner wall width W ₂ that resulted in a minimum phase noise estimate for the plurality of combinations of outer wall width Wi and inner wall width W ₂ analyzed at block 720. [0042] In various examples, the simulation of block 710 models the electrically conductive stub 110 coupled to the outer wall 104. In these example simulations, the common mode current flows through the electrically conductive stub 110 and the outer wall 104 and the differential mode current does not flow through the electrically conductive stub 1 10. In these example simulations, the dimensions of the stub 1 10, stub length £ _stUb and stub width W _stUb , may also be varied. At block 740, the process 700 estimates phase noises of the inductor-based resonator, based on the simulated electromagnetic coupling of block 710, for a plurality of electrically conductive stubs of varying dimensions.

[0043] At block 750, the process 700 sizes the dimensions of the electrically conductive stub 1 10, based on the estimated phase noises, to reduce phase noise of the two-walled inductor 102. The sizing at block 750 may include choosing the dimensions of one of the plurality of electrically conductive stubs that resulted in a minimum estimated phase noise at block 740.

[0044] Upon sizing the dimensions of the various components of the two-walled coupled inductor 102 at block 730 and/or block 750, the outer wall 104, the inner wall 106 and, in some examples, the stub 110 may be formed on a substrate using known techniques, based on the sizing performed at blocks 730 and/or 750. The outer wall 104, the inner wall 106 and the stub 1 10 may, for example, be formed on a substrate to be coupled to the power supply 120 and the VCO circuitry 115 to form the VCO 100 of FIGS. 1-3.

[0045] The process 700 of FIG.7 may be modified, for example, by adding or altering blocks. Additionally, the blocks may be performed concurrently. For example, the simulation of the electromagnetic coupling of the two-walled coupled inductor 102 of block 710 may also simulate current flowing from the power supply 120 coupled to the electrically conductive stub 110. Further, the simulation of the electromagnetic coupling of the two-walled coupled inductor 102 of block 710 may also simulate current flowing from the first and second nodes 122 and 124 of the two-walled coupled inductor 102 through voltage controlled oscillator (VCO) circuitry 115 coupled to the first and second nodes 122 and 124. In another example, the electrically conductive stub 110 may be coupled to the inner wall 106 rather than the outer wall 104 such that the common mode current flows through the inner wall 106 and not the outer wall 104. In this example, the simulation of the electromagnetic coupling at block 710 would simulate this scenario. [0046] Although particular embodiments are described above, many variations of the disclosure are possible, including, for example, those with different transistor types, with different biasing arrangements, or with additional amplification stages. Additionally embodiments have been described for CMOS technology but similar circuits may be used with other technologies. Additionally, features of the various embodiments may be combined in combinations that differ from those described above.

[0047] The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles described herein can be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, it is to be understood that the description and drawings presented herein represent presently preferred embodiments of the disclosure and are therefore representative of the subject matter which is broadly contemplated by the present disclosure. It is further understood that the scope of the present disclosure fully encompasses other embodiments that may become obvious to those skilled in the art and that the scope of the present disclosure is accordingly limited by nothing other than the appended claims.