Technical Field

This invention relates to data communications systems of the kind including a plurality of terminals, a star coupler, and a plurality of bidirectional communication channels coupled between said star coupler and respective ones of said terminals for transferring data to and from said terminals, each of said communication channels including a first transmission line for carrying data from one of said terminals to said star coupler, and a second transmission line for carrying data signals from said star coupler to said one terminal, each of said transmission lines comprising a pair of signal wires connected for differential signal transmission between said star coupler and said one terminal.

Background Art

A data communications system of the kind specified is known from U.S. Patent No. 4,417,334. In the known system, when any terminal transmits or generates a signal or message, that message is received by the star coupler from the first transmission line associated with the subsystem and is directed or passed to every subsystem by way of each second transmission line, including the second transmission line returning to the subsystem that transmitted the message. This of course offers advantages in linking multiple subsystems, since a ^' subsystem transmitting a message receives back ^' the message at the same time each of the other subsystems receives the message. The transmitting system can therefore check for any transmission errors, without requiring a receiving subsystem to regenerate the message.

The function of the star coupler is essentially to take all the signals received on the input side of the coupler on the first transmission lines, to logically OR all these first transmission line signals, and to redrive the resulting signal to all terminals or subsystems over the second transmission line of each pair.

A potentially serious problem resides in the use of a star coupler in this mode to logically OR all the incoming signals on the first transmission line. If the incoming data from any transmission line suffers from a high bit error rate, these errors can be quickly propagated throughout the system. This is especially true where noise is picked up from one system and its associated transmission line.

It has been found that communication may be seriously impaired ^' when any terminal processor is powered down. Some noise may continue to be coupled via the low impedance output of the power supplies to the transmitting amplifiers at the terminal processor. Such noise can be transmitted through the cable to the star coupler, and retransmitted to the other stations until detected as errors, slowing the processing rate of the entire system.

Disclosure of the Invention

It is an object of the present invention to provide a data processing system of the kind specified having a reduced sensitivity to noise.

Therefore, according to the present invention, there is provided a data communications system of the kind specified, characterized in that each of said communication channels includes a shield connected to a system ground, and surrounding said transmission lines, in that each of said terminals includes differential amplifier means connected to said wires of said transmission line for transmitting

data on said first transmission line, in that bias voltage means are connected to a first side of said differential amplifier means for biasing said amplifier means, and in that virtual ground means are connected to a second side of said differential amplifier means, whereby noise rejection of said star coupler is maintained in the absence of signal transmission from said terminal by isolating said differential amplifier means from said system ground.

Brief Description of the Drawings

One embodiment of the present invention will now be described by way of example, with reference to the accompanying drawings, in which:

Fig. 1 is a simplified block diagram illustrating a data communications system having plural subsystems each incorporating an independent processor linked to a star coupler;

Fig. 2 is a detailed schematic diagram of the transmitting amplifier provided at each subsystem to transmit signals through a shielded twisted wire pair to the star coupler; and

Fig. 3 is a detailed schematic diagram of a receiver amplifier at the star coupler.

Best Mode for Carrying Out the Invention

Referring first to Fig. 1, there is shown in general form a data processing system 10 having a plurality of terminals or stations 12 linked by bi¬ directional communication channels 14 to a star coupler 16. The stations 12 are numbered from 1 to m; they communicate with the star coupler 16 over channels 14 comprising first and second serial transmission lines. Each transmission line comprises a twisted wire pair 18 adapted for differential signal transmission, and protected by a ground shield 20. The shield is connected to a ground 22 which comprises

the lowest potential point in the system. Each bi¬ directional channel 14 has a first transmission line to carry a serial signal or message generated by its processor at the station 12 to the star coupler 16, and a second transmission line to carry a serial signal or message from the star coupler 16 back to its associated subsystem.

It will be appreciated that any message transmitted and carried along one of the first transmission lines from a station processor transmitter 24 to a receiver 26 of a star coupler 16 is passed to every second transmission line through the transmitters 28 at star coupler 16 to all the stations 1 to m in the system 10 including the station or subsystem transmitting the message. As will be seen in Figs. 2 and 3, the transmitters 24, 28 and receivers 26, 30 are formed by respective differential amplifiers for providing the necessary differential signal transmission and reception.

The function of the star coupler 16 is to connect all processors of stations 1 to m together for interprocessor communication. This is accomplished by taking the signals transmitted from the transmitters 24 of each station, and received at the receivers 26 of the coupler, and logically ORing all the signals received at the star coupler 16 in a common linking means (not shown). The resulting output signal is redriven over separate transmitters 28 over the second transmission line wire pair to station processors via receivers 30.

One problem presented by this star coupled- transmission mode is the potential for high bit error communication rates when any station processor is powered down.

It is to be noted that the shield 14 of the cable, any power supply, the transmitter 24 and receiver 30 at each station and all transmitters 28

and ^' receivers 26 at the star coupler are coupled to a common ground 22. When a given station processor is powered down, extraneous noise may be picked up from the power supply or the like, and presented to the outgoing transmission line wire. In the absence of suitable preventive measures, this noise may be picked up at the receiver 26 of the star coupler 16 which remains active and connected to the communication channel 14, applied to the linking OR means and broadcast throughout the system.

Referring to Fig. 2, to eliminate this problem, a circuit 40 comprising especially a voltage source VCC 3 and a pair of diodes, Dl, D2 has been provided to define a virtual ground coupled to one side of the transmitter differential amplifier 24. The other side of the transmitter differential amplifier- 24 is connected to a bias voltage sμpply VNEG-to provide the necessary bias voltages to the transmitter. By providing this virtual ground circuit 40, the transmitter 24 is isolated from the common ground of the remainder of the system, cutting off the most common source of noise in this system that exists when the station terminal processor is powered down.

The transmitter differential amplifier 24 includes a pair of output transistors Q6, Q7, coupled to the units Wj, 2 of the twisted wire pair 18 for transmitting differential signals A and A to the star coupler 16. The output data received on data lines INI, IN2 is coupled through a differential pair of switches Q3, Q4 to the base of the transistors Q6, Q7. The transistor Q6, -Q7 base- current is defined by the resistors R6, R7 coupled between the differential switch pair Q3, Q4 and the virtual ground point 50 defined by network 40, so that the transistors Q6, Ql are always conducting. Transistor Q5 comprises a constant current source which provides the reference point for .the differential transistor pair Q3, Q4; the

transistors Q.1, Q2 comprise a circuit for defining a reference voltage bias for the switching transistor pair Q3, Q4. These transistors switch depending on which one is more positive than the other, with the threshold point being set by the transistors Ql, Q2; the threshold point may be modified by selection and adjustment of resistors R2, R3, R4. The diode D3 is included to provide for temperature compensation of the reference bias circuit. Resistors R5 and R8 are standard biasing resistors.

The circuit 40 for defining a virtual ground at one side of the differential amplifier comprises a voltage source VCC3 which is typically +5 volts coupled through a voltage dropping resistor Rl to a pair of matched diodes Dl, D2. In this preferred embodiment, the resistor Rl is se ^' =cted so that the voltage at the node 60 is about .7 to .8 volts. Thus, the voltage drop across Dl to ground is about .8 volts. This voltage drop is matched by selecting a matched diode D2; as a result, the node 50 is now held at a reference level equal to the ground level of the system as a whole, without a direct feed-through connection of the node 50 to the system ground 22. As a result, the output transistor pair Q6, Ql which drives the differential signal on the twisted pair 18 is effectively isolated from spurious noise signals which may be coupled through the system ground.

Capacitors Cl and C2 in the virtual ground network 40, and capacitors C4, C5 of the transistor differential amplifier serve the purpose of filtering high and low frequency noise.

Another source of noise in the terminals when they are powered down arises from noise being fed back through the power supply to the twisted pair 18. To reduce this noise, balanced differential networks 70, 72 are provided coupled between the emitter outputs of transistors Q6, Q7 and bias voltage supply line VNEG.

Resistors R9, RIO are provided because the switched output transistor pair Q6, Q7 is always turned on slightly, drawing a slight current through R6, R7. Because of this conductive state, and the high capacitance of the transmission channel 14, the resistors R9 and RIO are provided, connected from the output emitters of the two transistors Q6, Q7 to bias voltage supply line VNEG, to pull down this capacitance. To prevent noise being fed back through the power supplies through these resistors into the twisted pair, diodes D5 , D6 have been provided in series with the pull-down resistors R9 , RIO. The diodes have a small forward impedance of about 50 ohms so that they offer small impedance in normal operation, and do not effect normal transmission. They are also selected so that the total dynamic impedance presented by each of the balanced impedance networks 70, 72 are equal. That is, the total dynamic impedance presented by -the series combination of resistor R9 and diode D5 is equal to the total dynamic impedance presented by the series combination of resistor RIO and the diode D6. As a result, no feedback path for the noise at the bias voltage supply line VNEG into the twisted pair 18 is available when the remote station is powered down. However, during normal transmission, no offset in the differential output signal is created.

Referring to Fig. 3, a further noise source is evident when any station processor 12 is disconnected from its cable. This may occur if the station processor is being repaired or the like. In this case, noise may be picked up by the free end of the cable, particularly since the cable shield is no longer grounded at the station processor end, and passed through receiver differential amplifier 26. Specifically the noise signals would be picked up by the differential amplifier switch pair Q8, Q9, and

coupled to the differential output stage comprising transistors Qll and Q12. The presence of decoupling capacitors C6, C7 is not sufficient to screen out this noise. Therefore, a series resistance network is added comprising a series of resistors Rll, R12, R13, R14, R15 connected between system ground 22 and the bias voltage supply line VNEG. The use of the virtual ground circuit 40 at the transmitter cabinet allows this resistive network to be added at the star coupler cabinet running from system ground 22 to an independent bias voltage supply line V EG2. Without the use of the virtual ground circuit 40 at the station terminal, this series resistance network work would effectively appear in parallel across the output transistor connection of R7-Q6 (Fig. 2) and R6-Q7.

Preferred values of these resistors are as follows:

R13-100 ohms

R12-100 ohms

R14-100 ohms

Rll-3.9k ohms

R15-8.2k ohms These resistors are selected and connected to provide a noise rejection offset circuit which will maintain the minimum signal-to-noise ratio which is necessary for this system. Such noise offset circuit is especially important in a star-coupled configuration where if one terminal 12 is pulled out of the system, noise generated at the free cable end can be picked up, and retransmitted through the amplifier in the receiver 26 at the star coupler to all the other stations in the system.

The resistor R13 has a value of 100 ohms which is selected to match the characteristic impedance of the cable (about 96-100 ohms). Due to this matching, the quality of the differential signal applied to the differential amplifier comprising

transistors Q8, Q9 is not affected by this resistive network. Resistors R12 and R14 are provided connected in series between the ends of the wires and the inputs to transistors Q8 and Q9, to cooperate with resistor R13 to provide a sufficiently high offset voltage across the input terminals of the receiver differential amplifier. By providing these resistors R12, R14, offset appears in the differential signal which, is being applied to the input transistor pair Q8, Q9 ^' - o:f the differential amplifier of the receiver. The noise offset level voltage is established to be greater than typical signal noise received on the wires W_, 2 of the transmission line pair 18, consistent with a desired signal-to-noise ratio. However, selecting the resistors to have relatively low matched resistance values prevents the creation of voltages which could modify the differential input signals carried from the "lines Wl, W2 to the transistors Q8, Q9 during normal signal transmission operation. Resistors Rll and R15 are of higher value, providing the necessary connections between a bias voltage source and ground without attenuating the input signal from the transmission wire pair 18. The remainder of the circuit of Fig. 3 is of similar design to that of Fig. 2, comprising a differential amplifier switched transistor pair Q8, Q9 which receives the signals from the wires 18. The state of the transistors Q8 and Q9 depend on which transistor has a signal applied to its base more positive than a current reference signal received on its emitter from the current reference transistor Q10. Transistor Q10 in turn is ^' driven by a reference voltage which is provided by the circuit comprising transistors Q13 and Q14 and resistors R19, R20, R21 and R22 which cooperate with diode D7 to provide a low impedance emitter follower reference voltage signal which .can be fed to the base of Q10. Temperature compensation is

provided by the diode D7. The resistor R18 is a standard biasing resistor. Resistors R16 and R17 are provided connected between the bases of the output stage transistors Qll and Q12 and system ground to draw a small amount of base current to prevent these transistors from shutting off completely at any point during the switching cycle.

In view of the foregoing, it will be understood that the preferred embodiment provides a star coupler configured communication network capable of screening out sources of noise, and eliminating or minimizing the higher bit error rates which typically occur when any station processor 12 is powered down.