Title:
DATA PROCESSING DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/093352
Kind Code:
A1
Abstract:
In order to continuously perform data transfer and arithmetic processing, and to improve the operating rate of an arithmetic unit, this data processing device comprises: a first annular bus; a transfer element group that includes a plurality of transfer elements connected in series by the first annular bus; a transfer control means that is connect to at least two of the transfer elements via the first annular bus, and is connected to an external memory; a second annular bus that is independent from the first annular bus; a processing element group that includes a plurality of processing elements connected in series by the second annular bus; an overall control means that is connected to at least two of the processing elements via the second annular bus; and an internal memory group that includes a plurality of internal memories connected to corresponding transfer elements and processing elements.
Inventors:
KOBAYASHI YUKI (JP)
Application Number:
PCT/JP2018/041281
Publication Date:
May 16, 2019
Filing Date:
November 07, 2018
Export Citation:
Assignee:
NEC CORP (JP)
International Classes:
G06F15/80; G06F9/30; G06F13/36; G06F15/173
Foreign References:
| JPH09185592A | 1997-07-15 | |||
| JP2003036248A | 2003-02-07 | |||
| JP2010079921A | 2010-04-08 |
Attorney, Agent or Firm:
SHIMOSAKA Naoki (JP)
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