Title:
DATA STRUCTURE FOR TILING AND PACKETIZING A SPARSE MATRIX
Document Type and Number:
WIPO Patent Application WO/2012/076379
Kind Code:
A3
Abstract:
A computer system retrieves a slice of sparse matrix data, which includes multiple rows that each includes multiple elements. The computer system identifies one or more non-zero values stored in one or more of the rows. Each identified non-zero value corresponds to a different row, and also corresponds to an element location within the corresponding row. In turn, the computer system stores each of the identified non-zero values and corresponding element locations within a packet at predefined fields corresponding to the different rows.
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Inventors:
FOSSUM GORDON CLYDE (US)
Application Number:
PCT/EP2011/071366
Publication Date:
January 10, 2013
Filing Date:
November 30, 2011
Export Citation:
Assignee:
IBM (US)
IBM UK (GB)
FOSSUM GORDON CLYDE (US)
IBM UK (GB)
FOSSUM GORDON CLYDE (US)
International Classes:
G06F17/16; G06F9/38
Domestic Patent References:
| WO2009037684A2 | 2009-03-26 |
Other References:
ALEXANDER MONAKOV ET AL: "Automatically Tuning Sparse Matrix-Vector Multiplication for GPU Architectures", 25 January 2010, HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS, SPRINGER BERLIN HEIDELBERG, BERLIN, HEIDELBERG, PAGE(S) 111 - 125, ISBN: 978-3-642-11514-1, XP019138152
RUIPENG LI ET AL: "GPU-Accelerated Preconditioned Iterative Linear Solvers", RESEARCH REPORT UMSI 2010/112 COMPUTER SCIENCE AND ENGINEERING, 1 October 2010 (2010-10-01), pages 1 - 24, XP055042615, Retrieved from the Internet [retrieved on 20121030]
SUN J ET AL: "Mapping sparse matrix-vector multiplication on FPGAs", 17 July 2007 (2007-07-17), pages 1 - 10, XP002571763, Retrieved from the Internet [retrieved on 20070717]
NATHAN BELL ET AL: "Efficient Sparse Matrix-Vector Multiplication on CUDA", NVIDIA TECHNICAL REPORT NVR-2008-004, 11 December 2008 (2008-12-11), pages 1 - 32, XP055042787, Retrieved from the Internet [retrieved on 20121031]
"OpenCL Programming Guide", 23 July 2011, EDDISON-WESLEY PROFESSIONAL, ISBN: 978-0-32-174964-2, article GORDON FOSSUM: "Sparse Matrix-Vector Multiplication", pages: 515 - 539, XP055041960
RUIPENG LI ET AL: "GPU-Accelerated Preconditioned Iterative Linear Solvers", RESEARCH REPORT UMSI 2010/112 COMPUTER SCIENCE AND ENGINEERING, 1 October 2010 (2010-10-01), pages 1 - 24, XP055042615, Retrieved from the Internet
SUN J ET AL: "Mapping sparse matrix-vector multiplication on FPGAs", 17 July 2007 (2007-07-17), pages 1 - 10, XP002571763, Retrieved from the Internet
NATHAN BELL ET AL: "Efficient Sparse Matrix-Vector Multiplication on CUDA", NVIDIA TECHNICAL REPORT NVR-2008-004, 11 December 2008 (2008-12-11), pages 1 - 32, XP055042787, Retrieved from the Internet
"OpenCL Programming Guide", 23 July 2011, EDDISON-WESLEY PROFESSIONAL, ISBN: 978-0-32-174964-2, article GORDON FOSSUM: "Sparse Matrix-Vector Multiplication", pages: 515 - 539, XP055041960
Attorney, Agent or Firm:
STRETTON, Peter, John (Intellectual Property LawHursley Park, Winchester Hampshire SO21 2JN, GB)
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