BACKGROUND OF THE INVENTION In the field of digital communications, digital information is typically prepared for transmission through a channel by encoding it. The encoded data is then used to modulate a transmission to the channel. A transmission received from the channel is then typically demodulated and decoded to recover the original information.

The encoding of the digital data serves to improve communication performance so that the transmitted signals are less corrupted by noise, fading, or other interference associated with the channel. The term"channel"can include media such as transmission lines, wireless communication and information storage devices such as magnetic disc drives. In the case of information storage devices, the signal is stored in the channel for a period of time before it is accessed or received. Encoding can reduce the probability of noise being introduced into a recovered digital signal when the encoding is adapted to the known characteristics of the data and its interaction with known noise characteristics of a communication channel.

In typical encoding arrangements, data words of m data bits are encoded into larger code words of n code bits, and the ratio m/n is known as the code rate of the encoding arrangement. Decreasing the code rate reduces the complexity of the encoder/decoder and can also improve error correction capability, however, a decreased code rate also increases energy consumption and slows communication.

Further, it is often desirable for encoded channel sequences to have a spectral null at zero frequency. Such sequences are said to be DC-free and particularly found to enhance the performance in perpendicular magnetic recording. Given a sequence of binary digits, if each binary digit"1"is translated into a plus one (+1) and each binary digit"0"is translated into a minus one (-1), the sequence will be DC-free if a running digital sum of the bipolar sequence is bounded. The running digital sum is the sum of all values (+1 and-1) in a bipolar sequence. When the variation of the running digital sum is kept to a small value, the sequence is known to have a tight bound. A tighter bound can improve the performance of the channel.

There is a need to provide improved-DC free coding techniques that reduce the probability of noise being introduced to the system and have optimal code rates. Various embodiments of the present invention address these problems, and offer other advantages over the prior art.

SUMMARY OF THE INVENTION One embodiment of the present invention is directed to a method of encoding digital information. According to the method, a sequence of successive data words are encoded into a sequence of successive code words according to a code, such that a running digital sum (RDS) of the sequence of successive code words is bounded and is constrained to predetermined, non-adjacent values at boundaries between the code words.

Another embodiment of the present invention is directed to an encoder for encoding digital information. The encoder encodes a sequence of successive data words into a sequence of successive code words according to a code, such that a running digital sum (RDS) of the sequence of successive code words is bounded and is constrained to predetermined, non-adjacent values at boundaries between the code words.

Another embodiment of the present invention is directed to a method of encoding digital information, wherein a sequence of successive data words are

encoded into a sequence of successive code words such that a running digital sum (RDS) of the sequence of successive code words is bounded and is constrained at boundaries between the code words. At least some bits in each code word are interleaved with at least some bits in another, adjacent one of the code words in the sequence of successive code words.

Another embodiment of the present invention is directed to a method of decoding digital information, wherein a sequence of successive code words are decoded into a sequence of successive data words according to a code in which a running digital sum (RDS) of the sequence of successive code words is bounded and is constrained to predetermined, non-adjacent values at boundaries between the code words.

Other features and benefits that characterize embodiments of the present invention will be apparent upon reading the following detailed description and review of the associated drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an isometric view of a disc drive in which one embodiment of the present invention is useful.

FIG. 2 is a flow diagram of a method of encoding information according to one embodiment of the present invention.

FIG. 3 is a block diagram of an encoder for encoding information according to the method shown in FIG. 2.

FIG. 4 is a block diagram of an encoder input circuit of the encoder shown in FIG. 3.

FIG. 5 is a block diagram of a data fragment encoder circuit in the encoder shown in FIG. 3.

FIG. 6 is a block diagram of a"g"group encoder of the encoder shown in FIG. 3.

FIG. 7 is a block diagram of a"j"group encoder of the encoder shown in FIG. 3.

FIG. 8 is a block diagram of an encoder output circuit of the encoder shown in FIG. 3.

FIG. 9 is a block diagram of a decoder according to one embodiment of the present invention.

FIG. 10 is a block diagram of a decoder input circuit of the decoder shown in FIG. 9.

FIG. 10A is a waveform diagram illustrating an example operation of an input multiplexer in the decoder input circuit shown in FIG. 10.

FIG. 11 is a block diagram of a"g"group decoder in the decoder shown in FIG. 9.

FIG. 12 is a block diagram of a"gb"subgroup decoder in the"g"group decoder shown in FIG. 11.

FIG. 13 is a block diagram of a"gc"subgroup decoder in the"g"group decoder shown in FIG. 11.

FIG. 14 is a block diagram of a"gd"subgroup decoder in the"g"group decoder shown in FIG. 11.

FIG. 15 is a block diagram of a"ge"subgroup decoder in the"g"group decoder shown in FIG. 11.

FIG. 16 is a block diagram of a"gf"subgroup decoder in the"g"group decoder shown in FIG. 11.

FIG. 17 is a block diagram of a"j"group decoder in the decoder shown in FIG. 9.

FIG. 18 is a block diagram of a"j"group input circuit in the"j"group decoder shown in FIG. 17.

FIG. 19 is a block diagram of a decoder output circuit in the decoder shown in FIG. 9.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS Embodiments of the present invention relate to a DC-free code for use in encoding and decoding digital data for transmission through communication

channels. In one embodiment of the present invention, a method of encoding is provided, which encodes an unconstrained user data sequence into a DC-free code sequence in which the running digital sum of the code sequence is bounded.

In addition to the DC-free property, the encoder constrains the code words in the code sequence such that the cumulative running digital sum in the sequence is restricted to predetermined, non-adjacent values at boundaries between the code words. This kind of restriction increases the minimum. Euclidean distance between the code words. In addition, bit streams of such codes words are interleaved with one another to further increase the distances between the code words, thereby allowing many error events that can occur in the channel to be detected.

FIG. 1 is a perspective view of a magnetic disc drive 100, which forms a communications channel in which one embodiment of the present invention is useful. Disc drive 100 communicates with a host system 101 and includes a housing with a base 102 and a top cover (not shown). Disc drive 100 further includes a disc pack 106, which is mounted on a spindle motor (not shown), by a disc clamp 108.

Disc pack 106 includes a plurality of individual discs, which are mounted for co- rotation about central axis 109. Each disc surface has an associated head, which is mounted to disc drive 100 for communication with the disc surface. In the example shown in FIG. 1, heads 110 are supported by suspensions 112 which are in turn attached to hack accessing arms 114 of an actuator 116. The actuator shown in FIG. 1 is of the type known as a rotary moving coil actuator and includes a voice coil motor (VCM), shown generally at 118. Voice coil motor 118 rotates actuator 116 with its attached heads 110 about a pivot shaft 120 to position heads 110 over a desired data track along an arcuate patch 122 between a disc inner diameter 124 and a disc outer diameter 126. Voice coil motor 118 operates under control of internal circuitry 128.

The heads 110 and rotating disc pack 106 define a communications channel that can receive digital data and reproduce the digital data at a later time. Write circuitry within internal circuitry 128 receives unconstrained user data, typically

from a digital computer, and then encodes the data into successive code words according to a selected code. The encoded data is then used to modulate a write current provided to a write transducer in the head 110. The write transducer causes the modulated code words to be encoded on a magnetic layer in disc pack 106. At a later time, a read transducer in the head 110 recovers the successive modulated code words from the magnetic layer as a serial modulated read signal. Read circuitry within internal circuitry 128 demodulates the read signal into successive parallel code words. The demodulated code words are then decoded by decoder circuitry within circuitry 128, which recovers the original user data for use by host system 101.

According to one embodiment of the present invention, each 18-bit word of the unconstrained user data is encoded into a 20-bit code word. This results in a code rate of 18/20. Other code rates can also be used in alternative embodiments of the present invention. In order to generate each 20-bit code word, the corresponding 18-bit user data word is broken down into smaller fragments. The fragments are rearranged and mapped into two 10-bit code word segments according to a lookup table and a mapping table. In one embodiment, the code selects the 10-bit code words such that the cumulative running digital sum of the resulting sequence of 20-bit code words is constrained to the values of 0 or 6 at the boundary of each 20-bit code word. The resulting 20-bit code words are then interleaved to various degrees to further increase the distance between the code words. As the modulated code words are read from the channel, the decoder applies the same coding rules as were used by the encoder, but in reverse order to render the original sequence of user data bits.

FIG. 2 illustrates a flow diagram of a method 200 of encoding information according to one embodiment of the present invention. According to method 200, an 18-bit data word is received at step 202. At step 204, method 200 accesses a current state value that has been calculated after each preceding code word is generated. In one example, the current state corresponds to the current,

cumulative running digital sum of the sequence of code words as calculated at the end of the preceding code word in the sequence. For the first code word, the initial state is reset to zero. Depending on the current state, the 18-bit data word is broken up into three fragments according to a lookup table at step 206, which is discussed in more detail below. Next, at step 208, a'g'group and a'j'group are selected based on the first fragment determined in step 206. These groups are chosen in order to maintain the running digital sum at the end of the current code word at either 0 or 6. Once the respective groups are obtained, the second fragment is mapped into a'g'group 10-bit segment at step 210. The mapping is performed according to a mapping table as discussed below. In step 212, the third fragment is mapped into a'j'group 10-bit segment according to a mapping table.

The'g'group and'j'group segments are then combined, at step 214, to form a 20- bit code word that constrains the running digital sum at the boundaries of the code words in the sequence at 0 or 6. At step 216, at least some of the bits in each 20-bit code word are interleaved with at least some of the bits in one or more adjacent 20-bit code words in the sequence. The code word is output, for example to a disc, at step 218.

The following description is divided into two sections. Section I is a general description of the design of a 18/20-rate DC-free code with RDS = 0 or 6 at the code word boundaries. The description includes a process of how to simplify the coding procedure and choose the code word mapping that are used in steps 210 and 212 in FIG. 2. An example of encoding a data word into a code word is illustrated at the end of this section. Section II provides a description of an implementation of an encoder and decoder. Block diagrams are included to illustrate the data flow in a hardware setting. The function of each block is described by logical equations. The block descriptions are similar to a VHDL format with input and output signals listed. However, the logical equations describing the signals are similar to a C language program. Hence, they should be applied in sequence as they are listed.

1. Procedure of Code Construction For user data words having 18 bits, there are 218 possible data patterns to be encoded. Since 218 is a large number exceeding a quarter of a million, it is very difficult to design an encoder by direct mapping. To simplify the design of a rate 18/20 DC-free code, the first step is to break the 20-bit code words into two segments of 10 bits each. A 10-bit pattern may have an RDS of-10, -8,-6,-4,-2, 0, 2,4, 6,8 or 10. Since the negative and positive RDS patterns are just the inverse of each other, the following description will focus on the positive RDS patterns, which can be selectively inverted as needed to obtain the negative RDS patterns.

The 10-bit positive RDS patterns can be grouped together according to their respective running digital sums. Table 1 shows a plurality of"g"groups, labeled "gb"to"gg", wherein the patterns in each group have the same RDS. The patterns in each group are expressed in hexadecimal form, with the most significant hexadecimal symbol representing only two binary bits.

Table 1 Group gb: There are 252 10-bit patterns with RDS= 0 O1F 02F 037 03B 03D 03E 04F 057 05B 05D 05E 067 06B 06D 06E 073 075 076 079 07A 07C 08F 097 09B 09D 09E OA7 OAB OAD OAE OB3 OB5 OB6 OB9 OBA OBC OC7 OCB OCD OCE OD3 OD5 OD6 OD9 ODA ODC OE3 OE5 OE6 OE9 OEA OEC OFF OF2 OF4 OF8 lOF 117 11B 11D 11E 127 12B 12D 12E 133 135 136 139 13A 13C 147 14B 14D 14E 153 155 156 159 15A 15C 163 165 166 169 16A 16C 171 172 174 178 187 18B 18D 18E 193 195 196 199 19A 19C 1A3 1A5 1A6 lA9 1AA 1AC 1B1 1B2 1B4 1B8 1C3 1C5 1C6 1C9 1CA 1CC 1D1 1D2 1D4 1D8 lEl 1E2 1E4 1E8 1FO 20F 217 21B 21D 21E 227 22B 22D 22E 233 235 236 239 23A 23C 247 24B 24D 24E 253 255 256 259 25A 25C 263 265 266 269 26A 26C 271 272 274 278 287 28B 28D 28E 293 295 296 299 29A 29C 2A3 2A5 2A6 2A9 2AA 2AC 2B1 2B2 2B4 2B8 2C3 2C5 2C6 2C9 2CA 2CC 2D1 2D2 2D4 2D8 2E1 2E2 2E4 2E8 2F0 307 30B 30D 30E 313 315 316 319 31A 31C 323 325 326 329 32A 32C 331 332 334 338 343 345 346 349 34A 34C 351 352 354 358 361 362 364 368 370 383 385 386 389 38At 38C 391 392 394 398 3A1 3A2 3A4 3A8 3B0 3C1 3C2 3C4 3C8 3D0 3EO Group gc: There are 210 10-bit patterns with RDS= +2 03F 05F 06F 077 07B 07D 07E 09F OAF OB7 OBB OBD OBE OCF OD7 ODB ODD ODE OE7 OEB OED OEE OF3 OF5 OF6 OF9 OFA OFC 11F 12F 137 13B 13D 13E 14F 157 15B 15D 15E 167 16B 16D 16E 173 175 176 179 17A 17C 18F 197 19B 19D 19E 1A7 1AB 1AD 1AE 1B3 1B5 1B6 1B9 1BA 1BC 1C7 1CB 1CD ICE 1D3 1D5 1D6 1D9 1DA 1DC 1E3 1E5 1E6 lE9 1EA 1EC 1F1 1F2 1F4 1F8 21F 22F 237 23B 23D 23E 24F 257 25B 25D 25E 267 26B 26D 26E 273 275 276 279 27A 27C 28F 297 29B 29D 29E 2A7 2AB 2AD 2AE 2B3 2B5 2B6 2B9 2BA 2BC 2C7 2CB 2CD 2CE 2D3 2D5 2D6 2D9 2DA 2DC 2E3 2E5 2E6 2E9 2EA 2EC 2Fl 2F2 2F4 2F8 30F 317 31B 3] D 31E 327 32B 32D 32E 333 335 336 339 33A 33C 347 34B 34D 34E 353 355 356 359 35A 35C 363 365 366 369 36A 36C 371 372 374 378 387 38B 38D 38E 393 395 396 399 39A 39C 3A3 3A5 3A6 3A9 3AA 3AC 3B1 3B2 3B4 3B8 3C3 3C5 3C6 3C9 3CA 3CC 3D1 3D2 3D4 3D8 3E1 3E2 3E4 3E8 3FO Group gd: There are 120 10-bit patterns with RDS= +4 07F OBF ODF OEF OF7 OFB OFD OFE 13F 15F 16F 177 17B 17D 17E 19F 1AF 1B7 1BB 1BD 1BE 1CF 1D7 1DB 1DD 1DE 1E7 1EB 1ED 1EE 1F3 1F5 1F6 1F9 1FA 1FC 23F 25F 26F 277 27B 27D 27E 29F 2AF 2B7 2BB 2BD 2BE 2CF 2D7 2DB 2DD 2DE 2E7 2EB 2ED 2EE 2F3 2F5 2F6 2F9 2FA 2FC 31F 32F 337 33B 33D 33E 34F 357 35B 35D 35E 367 36B 36D 36E 373 375 376 379 37A 37C 38F 397 39B 39D 39E 3A7 3AB 3AD 3AE 3B3 3B5 3B6 3B9 3BA 3BC 3C7 3CB 3CD 3CE 3D3 3D5 3D6 3D9 3DA 3DC 3E3 3E5 3E6 3E9 3EA 3EC 3F1 3F2 3F4 3F8 Group ge: There are 45 10-bit patterns with RDS= +6 OFF 17F 1BF 1DF 1EF 1F7 1FB 1FD 1FE 27F 2BF 2DF 2EF 2F7 2FB 2FD 2FE 33F 35F 36F 377 37B 37D 37E 39F 3AF 3B7 3BB 3BD 3BE 3CF 3D7 3DB 3DD 3DE 3E7 3EB 3ED 3EE 3F3 3F5 3F6 3F9 3FA 3FC Group gf: There are 10 10-bit patterns with RDS= +8 1FF 2FF 37F 3BF 3DF 3EF 3F7 3FB 3FD 3FE Group gg: There is only 1 10-bit pattern with RDS= +10 3FF

Each of the groups in Table 1 is further divided into subgroups, where the number of patterns in each subgroup (i. e., the subgroup size) is a power of two.

This allows groups of m-bit fragments of user data words to be mapped into code words from a subgroup of size 2m. The sizes of the second and third fragments of the user data words are determined by the first user data word fragment in step 206 according to loop-up Table 4, which is discussed in more detail below.

Group gb is divided into subgroups gb7, gb6, gb5 gb4 gb3 and gb2 with sizes of 128=27, 64=26, 32=25, 16=24, 8=23 and 4=22, respectively.

Group gc is divided into subgroups gc7, gc6, gc4 and gcl with sizes of 128=27, 64=26,16=24 and 2=21, respectively.

Group gd is divided into subgroups gd6, gd5, gd4 and gd3 with sizes of 64=26, 32=25, 16=24 and 8=23, respectively.

Group ge is divided into subgroups ge5, ge3, ge2 and geO with sizes of 32=25, 8=23, 4=22 and 1=2°, respectively.

Group gf is divided into subgroups gf3 and gfl with sizes of 8-23 and 2= ?-', respectively.

Group gg has only one subgroup gg0 with a size of 1=20, Table 2 lists the mapping of each subgroup. The format of the list is "xxx : yyy", which means that data word fragment"xxx"is to be mapped into 10- bit code word"yyy". Both"xxx"and"yyy"are expressed in hexadecimal form.

Table two is used to map the second fragment of the user data word into a corresponding 10-bit code word segment.

Table 2 Subgroup gb7: (mapping of 7-bit data word into 10-bit code word) 000 : 21B 001 : 233 0 02 : 235 003 :236 004 : 22B 005 :239 006:23A 007:23C 008 : 24B 009 :253 00A:255 00B:256 00C:28B 00D:259 00E:25A OOF : 25C 010 : 21D 011 : 263 012:265 013 : 266 014 : 22D 015 : 269 016 : 26A 017 : 26C 018 : 24D 019 293 01A295 01B 296 01C:28D 01D:299 01E:29A 01F: 29C 020 : 21E 021 : 2A3 022 : 2A5 023 : 2A6 024 : 22E 025 : 2A9 026 : 2AA 027 : 2AC 028 : 24E 029 : 2C3 02A : 2C5 02B : 2C6 02C : 28E 02D : 2C9 02E : 2CA 02F : 2CC 030:271 031 : 2B1 032 : 2D1 033 :2E1 034 : 272 035 :2B2 036:2D2 037:2E2 038 : 274 039 :2B4 03A:2D4 03B:2E4 03C:278 03D:2B8 03E:2D8 03F :2E8 040 :11B 041:133 042:135 043:136 044 : 12B 045 : 139 0 46 : 13A 047 : C 048 : 14B 049 : 153 04A : 155 04B : 156 04C : 18B 04D : 159 04E 15A 04F 15C 050 :11D 051 :163 052:165 053 : 166 054 :12D 055:169 056:16A 057:16C 058 : 14D 059 : 193 05A : 195 05B :196 05C:18D 05D:199 05E:19A 05F: 19C 060 :11E 061:1A3 062:1A5 063: 1A6 064 : 12E 065 1A9 066 1AA 067 1AC 068 : 14E 069 :1C3 06A:1C5 06B :1C6 06C:18E 06D:1C9 06E : 1CA 06F : 1CC 070:171 071:1B1 072:1D1 073: 1E1 074 : 172 075 : 1B2 0 76 : 1D2 077 : 1E2 078 : 174 079 :1B4 07A:1D4 07B :1E4 07C:178 07D:1B8 07E:1D8 07F: 1E8 Subgroup gb6: (mapping of 6-bit data word into 10-bit code word) 000 : 331 001 : 313 002 : 315 003 : 316 004 : 332 005 : 319 006 : 31A 007 : 31C 008 : 334 009 : 323 OOA : 325 OOB : 326 OOC : 338 OOD : 329 OOE : 32A OOF : 32C 010 :3C1 011:343 012:345 013 : 346 014 :3C2 015:349 016: 34A 017 ; 34C 018 : 3C4 019 : 383 O1A : 385 O1B : 386 01C:3C8 01D:389 01E:38A 01F: 38C 020 : OCE 021 : OEC 022 : OEA 023 : OE9 024 :0CD 025:0E6 026:0E5 027: 0E3 028 :0CB 029 :0CD 02A:0DA 02B : OD9 02C : OC7 02D :0D6 02E:0D5 02F : OD3 030 : 03E 031. ODC 032 :0BA 033 : OB9 034 : 03D 035 :0B6 036 : OB5 037 : OB3 038 : 03B 039 : 07C 03A : 07A 03B : 079 03C : 037 03D : 076 03E : 075 03F : 073 Subgroup gb5 : (mapping of 5-bit data word into 10-bit code word) 000:351 001:352 002:354 003 : 358 004 : 361 005 : 362 006 : 364 007 : 368 008 : 391 009 : 392 OOA : 394 OOB :398 00C:3A1 00D:3A2 00E:3A4 OOF : 3A8 010:0AE 011: OAD 012:0AB 013 : OA7 014 : 09E 015 : 09D 016 : 09B 017 : 097 018 : 06E 019 :06D 01A:06B 01B: 067 01C:05E 01D:05D 01E:05B 01F: 057 Subgroup gb4: (mapping of 4-bit data word into 10-bit code word) 000:307 001 :30B 002:30D 003 :30E 004:370 005 :3B0 006 3DO 007 3EO 008 : OF8 009 :0F4 00A:0F2 OOB : 0F1 00C:08F 00D:04F 00E:02F OOF : O1F Subgroup gb3: (mapping of 3-bit data word into 10-bit code word) 000:117 001 :127 002:147 003:187 004 : 217 005 :227 006:247 007:287 Subgroup gb2 : (mapping of 2-bit data word into 10-bit code word) 000:10F 001 :20F 002:1F0 003 :2F0 Subgroup gc7: (mapping of 7-bit data word into 10-bit code word) 000 : 257 001 25B 002 25D 003 25E 004 267 005 :26B 006:26D 007: 26E 008 : 297 009 : 29B OOA : 29D OOB : 29E OOC : 2A7 OOD : 2AB OOE : 2AD OOF : 2AE 010 237 Oil 23B 012 : 23D 013 : 23E 014 : 2C7 015 : 2CB 016 : 2CD 017 : 2CE 018 : 273 019 :2B3 01A:2D3 01B: 2E3 01C:27C 01D:2BC 01E:2DC 01F: 2EC 020 : 275 021 : 2B5 022 : 2D5 023 :2E5 024 : 276 025 :2B6 026:2D6 027: 2E6 028 :279 029:2B9 02A:2D9 02B : 2E9 02C : 27A 02D : 2BA 02E : 2DA 02F : 2EA 030 : 21F 031 : 22F 032 : 24F 033 : 28F 034 :2F1 035 :2F2 036:2F4 037 : 2F8 038 : 077 039 : OB7 03A : OD7 03B : OE7 03C : 07B 03D : OBB 03E : ODB 03F : OEB 040 : 157 041 :15B 042:15D 043 :15E 044 :167 045 :16B 046:16D 047:16E 048 : 197 049 : 19B 04A : 19D 04B : l9E 04C : 1A7 04D : 1AB 04E :1AD 04F:1AE 050 : 137 051 : 13B 052 : 13D 053 : 13E 054 :1C7 055 :1CB 056:1CD 057:1CE 058 : 173 059 : 1B3 05A : 1D3 05B :1E3 05C:17C 05D:1BC 05E:1DC 05F: 1EC 060:175 061:1B5 062:1D5 063 1E5 064 : 176 065 :1B6 066:1D6 067: 1E6 068 : 179 069 : lB9 06A : lD9 06B : lE9 06C : 17A 06D : 1BA 06E : 1DA 06F : 1EA 070 : 11F 071 : 12F 072 : 14F 073 : 18F 074 :1F1 075:1F2 076:1F4 077 :1F8 078 : 07D 079 : OBD 07A : ODD 07B : 0ED 07C:07E 07D:0BE 07E : ODE 07F : OEE Subgroup gc6: (mapping of 6-bit data word into 10-bit code word) 000 : 31B 001 : 333 002 : 335 003 : 336 004 : 32B 005 : 339 006 : 33A 007 : 33C 008 : 34B 009 :353 00A:355 OOB :356 00C:38B 00D:359 00E:35A OOF : 35C 010 :31D 011:363 012:365 013 : 366 014 :32D 015:369 016:36A 017 : 36C 018 : 34D 019 : 393 O1A : 395 O1B : 396 01C:38D 01D:399 01E:39A 01F: 39C 020 : 31E 021 : 3A3 022 : 3A5 023 : 3A6 024 : 32E 025 : 3A9 026 :3AA 027: 3AC 028 : 34E 029 : 3C3 02A : 3C5 02B : 3C6 02C : 38E 02D : 3C9 02E : 3CA 02F : 3CC 030 : 371 031 : 3B1 032 : 3D1 033 : 3E1 034 : 372 035 : 3B2 036 : 3D2 037 : 3E2 038 : 374 039 : 3B4 03A : 3D4 03B :3E4 03C:378 03D:3B8 03E:3D8 03F : 3E8 Subgroup gc4: (mapping of 4-bit data word into 10-bit code word) 000 : 317 001 :03F 002:05F 003:06F 004:327 005 : 09F 006 : OAF 007 : OCF 008:347 009:0F3 00A:0F5 00B: 0F6 00C:387 00D:0F9 00E:0FA 00F: OFC Subgroup gcl : (mapping of 1-bit data word into 10-bit code word) 000 : 30F 001 3FO Subgroup gd6: (mapping of 6-bit data word into 10-bit code word) 000 : 357 001 : 35B 002 : 35D 003 : 35E 004 :367 005 :36B 006:36D 007:36E 008 : 397 009 : 39B OOA : 39D OOB : 39E OOC : 3A7 OOD : 3AB OOE : 3AD OOF : 3AE 010 :337 011:33B 012:33D 013 : 33E 014 : 3C7 015 3CB 016 3CD 017 3CE 018 : 373 019 :3B3 01A:3D3 01B: 3E3 01C:37C 01D:3BC 01E:3DC 01F: 3EC 020 : 375 021 : 3B5 022 :3D5 023: 3E5 024 : 376 025 :3B6 026 :3D6 027: 3E6 028 : 379 029 : 3B9 02A : 3D9 02B : 3E9 02C : 37A 02D : 3BA 02E : 3DA 02F : 3EA 030 : 31F 031 : 32F 032 : 34F 033 : 38F 034 : 3F1 035 : 3F2 036 : 3F4 037 : 3F8 038 : 07F 039 :0BF 03A:0DF 03B : 0EF 03C:0F7 03D:0FB 03E : OFD 03F : OFE Subgroup gd5 : (mapping of 5-bit data word into 10-bit code word) 000 : 277 001 : 2B7 002 : 2D7 003 : 2E7 004 : 27B 005 2BB 006 2DB 007 2EB 008 : 27D 009 2BD OOA2DD OOB 2ED OOC27E OOD2BE OOE2DE OOF : 2EE 010:177 011:1B7 012:1D7 013:1E7 014:17B 015 :1BB 016:1DB 017: 1EB 018 :17D 019:1BD 01A:1DD 01B: 1ED 01C:17E 01D:1BE 01E:1DE 01F: 1EE Subgroup gd4: (mapping of 4-bit data word into 10-bit code word) 000 : 15F 001 :16F 002:19F 003: 1AF 004 : 25F 005 : 26F 006 : 29F 007 : 2AF 008 1F5 009 1F6 OOA1F9 OOB : 1FA 00C:2F5 00D:2F6 00E:2F9 OOF : 2FA Subgroup gd3: (mapping of 3-bit data word into 10-bit code word) 000 :13F 001:1CF 002:23F 003 : 2CF 004 :1F3 005 : 1FC 006 : 2F3 007 : 2FC Subgroup ge5: (mapping of 5-bit data word into 10-bit code word) 000: 377 001 : 37B 002 : 37D 003 : 37E 004 : 3B7 005: 3BB 006 : 3BD 007 : 3BE 008: 3D7 009: 3DB OOA: 3DD OOB : 3DE OOC: 3E7 OOD: 3EB OOE: 3ED OOF: 3EE 010: 17F 011: 1BF 012:1DF 013: 1EF 014 : 27F 015: 2BF 016 : 2DF 01'7 : 2EF 018: 1F7 019 : 1FB 01A : 1FD O1B : 1FE 01C : 2F7 01D : 2FB 01E: 2FD 01F : 2FE Subgroup ge3: (mapping of 3-bit data word into 10-bit code word) 000: 35F 001: 36F 002 : 39F 003: 3AF 00. 4 : 3F5 005 : 3F6 006 : 3F9 007: 3FA Subgroup ge2 : (mapping of 2-bit data word into 10-bit code word) 000 : 33F 001: 3CF 002 : 3F3 003: 3FC Subgroup geO : (mapping of 0-bit data word into 10-bit code word) 000 : OFF Subgroup gf3 : (mapping of 3-bit data word into 10-bit code word) 000: 37F 001: 3BF 002 : 3DF 003: 3EF 004: 3F7 005: 3FB 006: 3FD 007: 3FE Subgroup gfl: (mapping of 1-bit data word into 10-bit code word) 000: 1FF 001: 2FF Subgroup ggO : (mapping of 0-bit data word into 10-bit code word) 000: 3FF

The third data fragment is then mapped into a"j"group code word segment to maintain the running digital sum at the boundaries of the 20-bit code words at 0 or 6. This mapping takes into account the current running digital sum of the 20bit code word sequence and the running digital sum of the current'g' group 10-bit code word segment.

Since the goal is to limit the total or cumulative RDS to 0 or 6 at the end of every 20-bit code word, the encoder keeps hack of the total digital sum value of the sequence at the end of each 20-bit code word. In order to ensure that the RDS satisfies the desired constraints, the encoder operates in a plurality of states, wherein the current state corresponds to the cumulative RDS at the end of the previous code word. Depending on the current state, the encoder encodes the next user data word accordingly so that the cumulative RDS stays at 0 or 6.

The coding strategy can be described in two parts, Part 1 for the mapping of data word fragments into code word segments and Part 2 for determining the 20-bit code word output and the next state.

1. Part 1 The following possible combinations of two 10-bit segments exist such that the cumulative RDS at the end of a 20-bit code word stays at 0 or 6. i) If RDS of the first 10-bit segment is 0, the RDS of the second 10-bit must be either 0 or 6 in order to make the RDS at the end of the 20-bit code word to be 0, or 6.

ii) If RDS of the first segment is +2, RDS of the second segment must be-2 or+4. iii) If RDS of the first segment is +4, RDS of the second segment must be-4 or +2. iv) If RDS of the first segment is +6, RDS of the second segment must be-6 or 0. v) If RDS of the first segment is +8, RDS of the second segment must be-8 or-2. vi) If RDS of the first segment is-2, RDS of the second segment must be +2 or +8. vii) If RDS of the first segment is-4, RDS of the second segment must be +4 or +10. viii) If RDS of the first segment is-6, RDS of the second segment must be +6. ix) If RDS of the first segment is-8, RDS of the second segment must be +8.

According to the observations in (i) to (ix), the following"j"groups can be defined for mapping the second segment such that the cumulative RDS of the 20- bit code word stays at of 0 or 6.

Table 3 Let Group"jb"be the second segment for case (i) and constitute of the following subgroups: Subgroup jb8 includes 256 patterns and they are from gb7, gb6, gb5, gb4, gb3, and gb2, which have RDS=0, and ge5, ge3, ge2 and geO, which have RDS=6. Since 28 = 256, these code word segments are exactly enough for the encoding of 8-bit data words. Mappings of 8-bit data word to these 10-bit code words are: Data 00 to 7F : gb7 (128 patterns, RDS= 0) Data 80 to BF : gb6 (64 patterns, RDS= 0) Data CO to DF : gb5 (32 patterns, RDS= 0) Data EO to EF : gb4 (16 patterns, RDS= 0) Data FO to F7 gb3 (8 patterns, RDS= 0) Data F8 to FF ge3 (8 patterns, RDS=+6) Subgroup jb5 includes 32 patterns and they are the same as ge5. Mappings of 5-bit data word to these 10-bit code words are: Data 00 to 3F : ge5 (32 patterns, RDS=+6) Subgroup jb3 includes 32 patterns and they are from gb2 and ge2.

Mappings of 3-bit data word to these 10-bit code words are : Data 00 to 03 : gb2 (4 patterns, RDS= 0) Data 04 to 07 : ge2 (4 patterns, RDS=+6) Subgroup jbO includes 1 pattern and the mapping of 0-bit data word to the 10-bit code word is: Data 00 : geO (l pattern, RDS=+6) All"jb"patterns have RDS of 0 or +6 satisfying the requirement of case (i) above.

* * * * * Group"jc"is the second segment for case (ii) and constitute of the following subgroups: Subgroup jc8 includes 256 patterns and they are from-gc7, -gc6 and gd6.

Mappings of 8-bit data word to these 10-bit code words are : Data 00 to 7F :-gc7 (128 patterns, RDS=-2) Data 80 to BF :-gc6 (64 patterns, RDS=-2) Data CO to FF : gd6 (64 patterns, RDS= +4) Subgroup jc6 includes 64 patterns and they are from gd5,-gc4 and gd4.

Mappings of 6-bit data word to these 10-bit code words are : Data 00 to lF : gd5 (32 patterns, RDS= +4) Data 20 to 2F :-gc4 (16 patterns, RDS=-2) Data 30 to 3F : gd4 (16 patterns, RDS= +4) Subgroup jc3 includes 8 patterns and they are from gd3. Mappings of 3- bit data word to these 10-bit code words are: Data 00 to 07 : gd3 (8 patterns, RDS= +4) Subgroup jcl includes 2 patterns and they are from-gcl. Mappings of 1- bit data word to these 10-bit code words are: Data 00 to 01 .-gcl (2 patterns, RDS=-2) All"jc"patterns have RDS of-2 or +4 satisfying the requirement of case (ii) above. Note that"-gcx"represents the group with patterns equivalent to the inverse of the patterns in group"gcx".

* * * * * Group"jd"is the second segment for case (iii) and constitute of the following subgroups: Subgroup jd8 includes 256 patterns and they are equivalent to the inverse of jc8. Mappings of 8-bit data word to these 10-bit code words are: Data 00 to FF :-jc8 (256 patterns, RDS= +2,-4) Subgroup jd6 includes 64 patterns and they are equivalent to the inverse of jc6. Mappings of 6-bit data word to these 10-bit code words are : Data 00 to 3F :-jc6 (64 patterns, RDS= +2,-4) Subgroup jd3 includes 8 patterns and they are equivalent to the inverse of jc3. Mappings of 3-bit data word to these 10-bit code words are: Data 00 to 07 :-jc3 (8 patterns, RDS=-4) Subgroup jdl includes 2 patterns and they are equivalent to the inverse of jcl. Mappings of 1-bit data word to these 10-bit code words are: Data 00 to 01 : -jc1 (2 patterns, RDS= +2) All"jd"patterns have RDS of-4 or +2 satisfying the requirement of case (iii) above.

* * * * * Group"je"is the second segment for case (iv) and constitute of the following subgroups: Subgroup je8 includes 256 patterns and they are equivalent to the inverse of jb8. Mappings of 8-bit data word to these 10-bit code words are : Data 00 to FF :-jb8 (256 patterns, RDS=-6,0) Subgroup je5 includes 32 patterns and they are equivalent to the inverse of jb5. Mappings of 5-bit data word to these 10-bit code words are : Data 00 to 1F :-jb5 (32 patterns, RDS=-6) Subgroup je3 includes 8 patterns and they are equivalent to the inverse of jb3. Mappings of 3-bit data word to these 10-bit code words are: Data 00 to 07 b3 (8 patterns, RDS=-6,0) Subgroup jeO includes 1 pattern and it is equivalent to the inverse of jbO. Mappings of 0-bit data word to the 10-bit code word is: Data 00 :-jb0 (1 pattern, RDS=-6) All"je"patterns have RDS of-6, or 0 satisfying the requirement of case (iv) above.

* * * * * Group"jf"is the second segment for case (v) and constitute of the following subgroups: Subgroup jf7 includes 128 patterns and they are equivalent to the inverse of gc7. Mappings of 7-bit data word to these 10-bit code words are: Data 00 to 7F :-gc7 (128 patterns, RDS=-2) Subgroup jf6 includes 64 patterns and they are equivalent to the inverse of gc6. Mappings of 6-bit data word to these 10-bit code words are: Data 00 to 3F :-gc6 (64 patterns, RDS=-2) Subgroup jf4 includes 16 patterns and they are equivalent to the inverse of gc4. Mappings of 4-bit data word to these 10-bit code words are: Data 00 to OF :-gc4 (16 patterns, RDS=-2) Subgroup jf3 includes 8 patterns and they are equivalent to the inverse of gf3. Mappings of 3-bit data word to these 10-bit code words are: Data 00 to 07 :-gf3 (8 patterns, RDS=-8) Subgroup jf2 includes 4 pattern and they are from-gcl and-gfl.

Mappings of 2-bit data word to these 10-bit code words are : Data 00 to 01 :-gcl (2 patterns, RDS=-2) Data 02 to 03 :-gfl (2 patterns, RDS=-8) All"jf"patterns have RDS of-8, or-2 satisfying the requirement : of case (v) above.

* * * * * Group"jj"is the second segment for case (vi) and constitute of the following subgroups: Subgroup jj7 includes 128 patterns and they are equivalent to the inverse of jf7. Mappings of 7-bit data word to these 10-bit code words are: Data 00 to 7F :-jf7 (128 patterns, RDS= +2) Subgroup jj6 includes 64 patterns and they are equivalent to the inverse of jf6. Mappings of 6-bit data word to these 10-bit code words are: Data 00 to 3F :-jf6 (64 patterns, RDS= +2) Subgroup jj4 includes 16 patterns and they are equivalent to the inverse of jf4. Mappings of 4-bit data word to these 10-bit code words are: Data 00 to OF :-jf4 (16 patterns, RDS= +2) Subgroup jj3 includes 8 patterns and they are equivalent to the inverse of jf3. Mappings of 3-bit data word to these 10-bit code words are : Data 00 to 07 :-jf3 (8 patterns, RDS= +8) Subgroup jj2 includes 4 patterns and they are equivalent to the inverse of jf2. Mappings of 2-bit data word to these 10-bit code words are: Data 00 to 03 :-jf2 (4 patterns, RDS= +2, +8) All"jj"patterns have RDS of +8, or +2 satisfying the requirement of case (vi) above.

* * * * * Group"jk"is the second segment for case (vii) and constitute of the following subgroups: Subgroup jk6 includes 64 patterns and they are equivalent to gd6.

Mappings of 6-bit data word to these 10-bit code words are : Data 00 to 3F : gd6 (64 patterns, RDS= +4) Subgroup jk5 includes 32 patterns and they are equivalent to gdS.

Mappings of 5-bit data word to these 10-bit code words are : Data 00 to IF : gd5 (32 patterns, RDS= +4) Subgroup jk4 includes 16 patterns and they are equivalent to gd4.

Mappings of 4-bit data word to these 10-bit code words are : Data 00 to OF : gd4 (16 patterns, RDS= +4) Subgroup jk3 includes 8 patterns and they are equivalent to gd3.

Mappings of 3-bit data word to these 10-bit code words are : Data 00 to 07 : gd3 (8 patterns, RDS= +4) Subgroup jkO includes 1 pattern and it is equivalent to ggO. Mappings of 0-bit data word to the 10-bit code word is : Data 00 : gg0 (1 pattern, RDS= +10) All"jk"patterns have RDS of +4, or +10 satisfying the requirement of case (vii) above.

* * * * * Group"jl"is the second segment for case (viii) and constitute of the following subgroups : Subgroup jl5 includes 32 patterns and they are equivalent to ge5.

Mappings of 5-bit data word to these 10-bit code words are : Data 00 to IF : geS (32 patterns, RDS= +6) Subgroup jl3 includes 8 patterns and they are equivalent to ge3.

Mappings of 3-bit data word to these 10-bit code words are : Data 00 to 07 : ge3 (8 patterns, RDS= +6) Subgroup j12 includes 4 patterns and they are equivalent to ge2.

Mappings of 2-bit data word to these 10-bit code words are : Data 00 to 03 : ge2 (4 patterns, RDS= +6) Subgroup j10 includes 1 pattern and it is equivalent to geO. Mappings of 0-bit data word to the 10-bit code word is : Data 00 : ge 0 (1 pattern, RDS= +6) All"jl"patterns have RDS of +6 satisfying the requirement of case (viii) above.

* * * * * Group"jm"is the second segment for case (ix) and constitute of the following subgroups: Subgroup jm3 includes 8 patterns and they are equivalent to gf3.

Mappings of 3-bit data word to these 10-bit code words are : Data 00 to 07 : gf3 (8 patterns, RDS= +8) Subgroup jml includes 2 patterns and they are equivalent to gfl.

Mappings of 2-bit data word to these 10-bit code words are : Data 00 to 01 : gfl (2 patterns, RDS= +8) All"jm"patterns have RDS of +8 satisfying the requirement of case (ix) above.

2. Part 2 Determining 20-bit Code Word Output and Next State From Part I, all the 20-bit code words have RDS of 0 or 6. Depending on the current state of the encoder (cumulative RDS), the code word may have to be inverted so that the cumulative RDS stays at 0 or 6. The 20-bit code word output and the next state of the encoder can be determined according to the following rules: i) If current state is 0 and RDS of code word is 0, next state stays at 0.

ii) If current state is 0 and RDS of code word is 6, next state will be 6. iii) If current state is 6 and RDS of code word is 0, next state stays at 6. ix) If current state is 6 and RDS of code word is 6, invert code word and let next state be 0.

For cases (i) to (iii), next state is just equal to current state plus the RDS of the current 20-bit code word. For case (iv), the code word must be inverted so that its RDS becomes-6. The next state is therefore equal to current state plus RDS of the modified code word, or Next State=-6 + 6 = 0.

Table 4 indicates how the 18-bit user data words are divided into three fragments and mapped into two 10-bit code word segments, with one segment selected from the"g"group and one segment selected from the"j"group.

Concatenating the two segments accordingly forms the 20-bit code word. The columns in Table 4 that are labeled"17: 0" represent the 18 bit positions in the user data word that is to be mapped. The first fragment is a bit pattern formed by the most significant bits of the data word. The first fragment can have various numbers of bits. The second and third fragments are mapped into the'g'and'j' segments, respectively. Those group names that are underlined in Table 4 represent patterns that are to be inverted. In the lookup table, "Pn"stands for the particular pattern number of the mapping performed. The values"G type"and"J type"correspond to which"g"and"j"subgroup is in the particular pattern.

Table 4 Code word mapping for 18/20 DC free code 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Pn G Type J Type 0 0 0 gb7 jb8 07 08 001gc7 jc8 2 17. 18 0 1 0 0 gb6 jb8 3 06 08 0 1 0 1 gc6 jc8 4 16 18 0 1 1 0 gd6 jd8 5 26 28 0 1 1 1 gc7 jj7 6 97 57 1 0 0 0 0 gb5 jb8 7 05 08 1 0 0 0 1 gc7 7c6 8 17 16 jd8 9 25 28 1 0 0 1 1 ge5 je8 10 35 38 1 0 1 0 0 gc7 jj6 11 97 96 1 0 1 0 1 gc6 jj7 12 96 97 1 0 1 1 0 0 gb7 jb5 13 07 05 1 0 1 1 0 1 gb4 jb8 14 04 08 1 0 1 1 1 0 gc6 jc6 15 16 16 1 0 1 1 1 1 gc4 jc8 16 14 18 1 1 0 0 0 0 gd6 jd6 17 26 26 Code word mapping for 18/20 DC free code 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Pn G Type J Type 1 1 0 0 0 1 gd4 jd8 18 24 28 1 1 0 1 1 0 gc6 jj6 1 1 0 0 1 1 gd6 jk6 20 A6 A6 1 1 0 1 0 0 0 gb6 job5 21 06 05 1 1 0 1 0 0 1 gb3 jb8 22 03 08 1 1 0 1 0 1 0 gd5 jd6 23 25 26 1 1 0 1 0 1 1 gd3 jd8 24 23 28 1 1 0 1 1 0 0 ge3 je8 25 33 38 1 1 0 1 1 0 1 gc7 jj4 26 97 94 1 1 0 1 1 1 0 gc4 jj7 27 94 97 1 1 0 1 1 1 1 ad6 jk5 28 A6 A5 1 1 1 0 0 0 0 gd5 jk6 29 A5 A6 1 1 1 0 0 0 1 0 gb7 jb3 30 07 03 1 1 1 0 0 0 1 1 gb5 jb5 31 05 05 1 1 1 0 0 1 0 0 gb2 jb8 32 02 08 1 1 1 0 0 1 0 1 gc7 jc3 33 17 13 1 1 1 0 0 1 1 0 gc4 jc6 34 14 16 1 1 1 0 0 1 1 1 gd4 jd6 35 24 26 1 1 1 0 1 0 0 0 ge5 je5 36 35 35 1 1 1 0 1 0 0 1 g32 je8 37 32 38 1 1 1 0 1 0 1 0 gf3 jf7 38 43 47 1 1 1 0 1 0 1 1 gc7 jj3 39 97 93 1 1 1 0 1 1 0 0 gc6 jj4 40 96 94 1 1 1 0 1 1 0 1 gc4 jj6 41 94 96 1 1 1 0 1 1 1 0 gd6 jk4 42 A6 A4 1 1 1 0 1 1 1 1 gd5 jk5 43 A5 A5 1 1 1 1 0 0 0 0 gd4 jk6 44 A4 A6 1 1 1 1 0 0 0 1 ge5 jl5 45 B5 B5 1 1 1 1 0 0 1 0 0 gb6 jb3 46 06 03 1 1 1 1 0 0 1 0 1 gb4 jb5 47 04 05 1 1 1 1 0 0 1 1 0 gc6 | jc3 48 16 13 1 1 1 1 0 0 1 1 1 gc1 jc8 49 11 18 1 1 1 1 0 1 0 0 0 gd6 jd3 50 26 23 1 1 1 1 0 1 0 0 1 gd3 jd6 51 23 26 111101010 gf3 jf6 52 43 46 1 1 1 1 0 1 0 1 1 gc7 jj2 53 97 92 1 1 1 1 0 1 1 0 0 gc6 jj3 54 96 93 1 1 1 1 0 1 1 0 1 ad6 jk3 55 A6 A3 1 1 1 1 0 1 1 1 0 gd5 jk4 56 A5 A4 1 1 1 1 0 1 1 1 1 d4 jk5 57 A4 A5 Code word mapping for 18/20 DC free code 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Ph G Type J Type 1 1 1 1 1 0 0 0 0 gd3 jk6 58 A3 A6 1 1 1 1 1 0 0 0 1 0 gb5 jb3 59 05 03 1 1 1 1 1 0 0 0 1 1 gb3 jb5 60 03 05 1 1 1 1 1 0 0 1 0 0 gc7 jc1 61 17 11 1 1 1 1 1 0 0 1 0 1 gd5 j3 62 25 23 1 1 1 1 1 0 0 1 1 0 ge5 je3 63 35 33 1 1 1 1 1 0 0 1 1 1 ge3 je5 64 33 35 1 1 1 1 1 0 1 0 0 0 je8 65 30 38 1 1 1 1 1 0 1 0 0 1 gf1 jf7 66 41 47 1 1 1 1 1 0 1 0 1 0 gc6 jj2 67 96 92 1 1 1 1 1 0 1 0 1 1 gc4 jj4 68 94 94 1 1 1 1 1 0 1 1 0 0 gc1 jj7 69 91 97 1 1 1 1 1 0 1 1 0 1 ad5 jk3 70 A5 A3 1 1 1 1 1 0 1 1 1 0 gd4 jk4 71 A4 A4 1 1 1 1 1 0 1 1 1 1 gd3 jk5 72 A3 A5 1 1 1 1 1 1 0 0 0 0 ge5 jl3 73 B5 Buzz 1 1 1 1 1 1 0 0 0 1 ge3 jl5 74 B3 B5 1 1 1 1 1 1 0 0 1 0 0 gb7 75 07 00 1 1 1 1 1 1 0 0 1 0 1 gb4 jb3 76 04 03 1 1 1 1 1 1 0 0 1 1 0 gb2 jb5 77 02 05 1 1 1 1 1 1 0 0 1 1 1 gc6 jc1 78 16 11 1 1 1 1 1 1 0 1 0 0 0 gc4 jc3 79 14 13 1 1 1 1 1 1 0 1 0 0 1 gc1 jc6 80 11 16 1 1 1 1 1 1 0 1 0 1 0 gd6 jds 81 26 21 1 1 1 1 1 1 0 1 0 1 1 gd4 jd3 82 24 23 1 1 1 1 1 1 0 1 1 0 0 ge2 j5 83 32 35 1 1 1 1 1 1 0 1 1 0 1 gf3 jf4 84 43 44 1 1 1 1 1 1 0 1 1 1 0 gf1 jf6 85 41 46 1 1 1 1 1 1 0 1 1 1 1 gc4 jj3 86 94 93 1 1 1 1 1 1 1 0 0 0 0 gc1 jj6 87 91 96 1 1 1 1 1 1 1 0 0 0 1 gd4 jk3 88 A4 A3 1 1 1 1 1 1 1 0 0 1 0 gd3 jk4 89 A3 A4 1 1 1 1 1 1 1 0 0 1 1 ge5 jl2 90 B5 B2 1 1 1 1 1 1 1 0 1 0 0 ge2 jl5 91 B2 B5 1 1 1 1 1 1 1 0 1 0 1 0 gb6 92 06 00 1 1 1 1 1 1 1 0 1 0 1 1 gb3 jb3 93 03 03 1 1 1 1 1 1 1 0 1 1 0 0 gd5 jd1 94 25 21 1 1 1 1 1 1 1 0 1 1 0 1 gd3 jd3 95 23 23 1 1 1 1 1 1 1 0 1 1 1 0 ge3 je3 96 33 33 1 1 1 1 1 1 1 0 1 1 1 1 f3 jf3 97 43 43 Code word mapping for 18/20 DC free code 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Pn G Type J Type 1 1 1 1 1 1 1 1 0 0 0 0 gc4 jj2 98 94 92 1 1 1 1 1 1 1 1 0 0 0 1 gd6 99 A6 A0 1 1 1 1 1 1 1 1 0 0 1 0 gd3 jk3 100 A3 A3 1 1 1 1 1 1 1 1 0 0 1 1 ge3 jl3 101 B3 B3 1 1 1 1 1 1 1 1 0 1 0 0 gf3 jm3 102 C3 C3 1 1 1 1 1 1 1 1 0 1 0 1 0 gb5 ion 05 00 1 1 1 1 1 1 1 1 0 1 0 1 1 gb2 jb3 104 02 03 1 1 1 1 1 1 1 1 0 1 1 0 0 gc4 jc1 105 14 11 1 1 1 1 1 1 1 1 0 1 1 0 1 gd4 jd1 106 24 21 1 1 1 1 1 1 1 1 0 1 1 1 0 ge5 107 35 30 1 1 1 1 1 1 1 1 0 1 1 1 1 ge2 je3 108 32 33 1 1 1 1 1 1 1 1 1 0 0 0 0 je5 log 30 35 1 1 1 1 1 1 1 1 1 0 0 0 1 gf3 jf2 110 43 42 1 1 1 1 1 1 1 1 1 0 0 1 0 fg1 jf4 111 41 44 1 1 1 1 1 1 1 1 1 0 0 1 1 gc1 jj4 112 91 94 1 1 1 1 1 1 1 1 1 0 1 0 0 gd5 113 A5 AO 1 1 1 1 1 1 1 1 1 0 1 0 1 ge5 114 B5 BO 1 1 1 1 1 1 1 1 1 0 1 1 0 ge3 jl2 115 B3 B2 1 1 1 1 1 1 1 1 1 0 1 1 1 ge2 jl3 116 B2 B3 1 1 1 1 1 1 1 1 1 1 0 0 0 jl5 117 B0 B5 1 1 1 1 1 1 1 1 1 1 0 0 1 0 gb4 118 04 00 1 1 1 1 1 1 1 1 1 1 0 0 1 1 gc1 jc3 lis 11 13 1 1 1 1 1 1 1 1 1 1 0 1 0 0 gd3 jd1 120 23 21 1 1 1 1 1 1 1 1 1 1 0 1 0 1 gf1 jf3 121 41 43 1 1 1 1 1 1 1 1 1 1 0 1 1 0 gc1 jj3 122 91 93 1 1 1 1 1 1 1 1 1 1 0 1 1 1 gd4 123 A4 A0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 ge2 jl2 124 B2 B2 1 1 1 1 1 1 1 1 1 1 1 0 0 1 gf3 jm1 125 C3 C1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 gfl jm3 126 C1 C3 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 gb3 127 03 00 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 ge3 128 33 30 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 je3 129 30 33 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 gf1 jf2 130 41 42 1 1 1 1 1 1 1 1 1 1 1 1 0 1 gc1 jj2 131 91 92 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 d3 132 A3 AO 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 ge3 133 B3 BO 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 jl3 134 B0 B3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 gb2 135 02 00 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 gc1 jc1 136 11 11 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 ge2 137 32 30 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ge2 138 B2 BO

3. Example As an example, assume the 18-bit user data word is Ox2A3EC = 10 1010 0011 1110 1100, where"Ox"indicates a hexadecimal value. Assuming the leading

bit is dl7, then the bit values from most significant to least significant are: dl7=1, dl6=0, dl5=1, dl4=0, dl3=1, dl2=0, dll=0, dol0=0, d9=1, d8=1, d7=1, d6=1, d5=1, d4=0, d3=1, d2=1, dl=0, and dO=0.

According to Table 4, when the first fragment d (17 : 13) = 10101 (pattern number Pn = 12) the second fragment d (12 : 7) is mapped according to subgroup "gc6"to obtain the first 10-bit code segment and the third fragment d (6: 0) is mapped according to subgroup"jj7"to obtain the second 10-bit code segment of the 20-bit code word. The bits of the second fragment d (12 : 7) are 000111=0x07 and, according to mapping for subgroup"gc6", shown in Table 2, the 10-bit segment should be mapped to Ox33C =1100111100. The underline"gc6"means the segment needs to be inverted. The first 10-bit code segment is therefore equal to OxOC3 = 0011000011.

The bits of the third fragment d (6: 0) = 1101100 = Ox6C. According to the mapping for subgroup"jj7", shown in Table 3, the patterns from"gc7"should be used. According to mapping for subgroup"gc7"in Table 2, Ox6C maps into Oxl7A = 0101111010. The first 10-bit code segment is therefore equal to Oxl7A = 0101111010.

Now, combining the first and second 10-bit code segments to obtain the 20- bit code word results in, 0011000011 0101111010 = Ox30D7A. Notice that the running digital sum of this code word is 0, the next state is therefore unchanged.

In order to avoid the unrestrained sequence of 101010..., code words that can cause this error can be eliminated. Therefore, code words OxAAAAA and 0x55555 are replaced by OxC03F3 and OxC03FC, respectively. These two substitutions are not used for any other mappings and have the same RDS as the replaced patterns.

4. Interleaving To detect more error event types, the code words can be interleaved to higher degrees. Usually, the higher the degree, the more types of event can be detected. However, higher degrees increase the complexity of the

encoder/decoder and can have other undesirable effects such as long run of a single polarity without transition. Therefore, an interleave of degree two to four can be applied, for example. There are many different ways to interleave the code words but a bit-wise interleave is the simples choice and can be implemented easily. Any method of interleaving can be used with embodiments of the present invention that use interleaving.

In a bit-wise interleave of degree two, two adjacent 20-bit code words in a code word sequence can be interleaved into a single code word of 40 bits, as shown below: Code Word 1 = A19A18A17A16A15A14A13A12A11 A10AsA8A7A6A5A4A3A2A1 Ao Code Word 2 = Bqg B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 BO The interleaved 40-bit word is therefore: <BR> <BR> <BR> <BR> A19B19A18B18A17B17A16B16A15B15A14B14A13B13A12B12A11 B11A10B10A9B9A8<BR> <BR> <BR> <BR> Ba A7 B7 A6 B6 A5 B5 A4 B4 A3 B3 A2 B2 A, B, Ao Bo.

In other words, the code rate will be 36/40 when the code words are interleaved to degree two. Likewise, the code rate will be 54/60 and 72/80 when interleaved to degree three and four respectively. Notice that the code rate stays unchanged at 0.9 while the code word length increases accordingly when the degree of interleave is increased.

II. Descriptions of Encoder and Decoder The following section provides example of an encoder and a decoder that can be used to implement the code discussed above. The details of the circuits and operations described below are examples only and can be performed in hardware, software, firmware and/or combinations thereof. Table 5 provides definitions for the symbols and logic operations used below to describe the functions of the encoder and decoder.

Table 7 Symbol definition: "|"bit-wise OR "&"Bitwise AND bit-wise XOR " ! x" Inverse of bit x " ! C (n : 0)" Inverse of all bits of word C

1. Encoder FIG. 3 is a block diagram of an encoder 250 for encoding an 18-bit user data word into a 20-bit code word for transmission through a communication channel 252, according to the method shown in FIG. 2. Encoder 250 has an initialization input INIT, an 18-bit user data input I17 : o, a word clock input WORD CLOCK, and a 20-bit code word output Wls : o. Encoder 250 further includes encoder input circuit 254, data fragment encoder 256,"g"group encoder 258, "j"group encoder 260, and encoder output circuit 262.

Encoder input circuit 254 receives each successive 18-bit user data word on input I17 o and latches each data word on data output D17 0 on the rising edge of Word Clock. Encoder input circuit 254 also latches a next state value NEXT STATE received from encoder output circuit 262 as a current state on state output STATE with each received user data word. With the first user data word in a sequence, or on power up, initialization input INIT resets the current state value to zero. As mentioned in the above-example, the current state value can have one of two values, representing a zero or six cumulative running digital sum on code word output Wlo : o, at the boundary of each code word.

Data fragment circuit 256 performs the function of the look-up table shown in Table 4 above. For each latched 18-bit user data word received from encoder input circuit 254, data fragment circuit 256 looks at the pattern formed by the most significant bits of the word (such as the"first fragment"discussed above) to determine which"g-"subgroup and"j-"subgroup should be used for encoding the data word and generates a corresponding g-group select signal gsl9 : o and j- group select signal js36 : o. Circuit 256 also routes the bits of the user data word to be encoded into a g-group code word to g-group data output gd6 : o and routes the

bits to be encoded into a j-group code word to j-group data output jd7 : o. Circuit 256 also generates a g-group invert signal ginv, which is used to selectively invert the g-group code word according to Table 4.

G-group encoder 258 encodes the g-group data bits into a corresponding 10-bit code word segment gws : o as a function of the select signal gsig : o, the invert signal ginv, and the current state STATE. Similarly, j-group encoder 260 encodes the j-group data bits jd70 into a 10-bit code word segment jw9 : o based on select signal js36 : o and the current state STATE. Encoder output circuit 262 receives the two 10-bit code word segments and forms the 20-bit code word on code word output Wl9 : o. Encoder output circuit 262 also generates the next state value based on the current state STATE and the running digital sum of the current 20-bit code word.

FIGS. 4-8 illustrates circuits 254,256, 258,260 and 262 in greater detail.

FIG. 4 shows the details of encoder input circuit 254. Encoder input circuit 254 includes 18-bit data word latch 300 and state latch 302. Data word latch 300 latches each data word received on input Ii7 : oto data output Dlso on the rising edge of WORD CLOCK. Similarly, state latch 302 latches the next state received on the next state input as the current state on state output STATE on the rising edge of WORD CLOCK. Initialization input INIT is coupled to the reset input of state latch 302 for resetting state output STATE upon initialization. Before the first user data word is clocked into latch 300, the INIT signal initializes STATE to zero. In one embodiment, STATE is a one-bit value representing the current state ("0"for state zero and"1"for state six).

FIG. 5 is a block diagram illustrating data fragment circuit 256 in greater detail. Circuit 256 includes a pattern select circuit 310 and a fragment multiplexer 312. Pattern select circuit 310 receives the latched 18-bit data word Dl7 o and, based on the first fragment of the data word (the most significant bits shown in Table 4), identifies which of the 138 g-group and j-group pattern combinations in Table 4 shall be used. Pattern select circuit 310 generates a logic high value on a

one of the 138 select outputs S138 : 1, which corresponds to that pattern combination.

Using the example discussed above, if D [17: 13] equals"10101", then the pattern combination of gc6 and jj7 (Pn=12) is selected. Therefore S [12] would be active at the output of pattern select circuit 310 and the remaining bits would be inactive.

Based on the pattern formed by Suss 1, fragment multiplexer 312 routes the appropriate user data bits to g-group data output gd6 : o and j-group data output jdZ:0 and generates the appropriate g-group select pattern gsl9 : o and j-group select pattern js36:0. One of the g-group select bits gsl9 : o will be active, and all other bits will be inactive. Similarly, one of the j-group select bits js360 will be active and all other bits will be inactive. Multiplexer 312 also generates the appropriate value on g-group invert output ginv.

In one embodiment, data fragment encoder circuit 256 operates according to the logic definitions shown in Table 8. The logic operators used in Table 8 are defined in Table 7.

Table 8 enc rds Input : dl7, dl6, dl5, dl4, dl3, dl2, dll, dlO, d9, d8, d7, d6, d5, d4, d3, d2, dl, dO (18-bit Dataword) Output : gd (6 : 0), jd (7 : 0) gs (19 : 0), js (36 : 0) Pattern S elect of enc rds TAO= Idl7& ! dl6 TA1= ! dl7& dl6 TA2= dl7& ! dl6 TA3= dl7& dl6 TB07= ! dl5 TB8f= dl5 TB03= TB07& ! dl4 TB47= TB07& dl4 TB8b= TB8f& ! dl4 TBcf= TB8f& dl4 TBO1= TB03& ! dl3 TB23= TB03& dl3 TB45= TB47& ! dl3 TB67= TB47& dl3 TB89= TB8b& ! dl3 TBab= TB8b& dl3 TBcd= TBcf& ! dl3 TBef= TBcf& dl3 TBO = TB01& ! dl2 TB1 = TBO1& dl2 TB2 = TB23& ! dl2 TB3 = TB23& dl2 TB4 = TB45& ! dl2 TB5 = TB45& dl2 TB6 = TB67& ! dl2 TB7 = TB67& dl2 TB8 = TB89& ! dl2 TB9 = TB89& dl2 TBa = TBab& ! dl2 TBb = TBab& dl2 TBc = TBcd& ! dl2 TBd = TBcd& dl2 TBe = TBef& ! dl2 TBf = TBef& dl2 TC07= ! dll TC8f= dll TC03= TC07& ! dlO TC47= TC07& d10 TC8b= TC8f& ! dlO TCcf= TC8f& d10 TC01= TC03& ! d9 TC23= TC03& d9 TC45= TC47& ! d9 TC67= TC47& d9 TC89= TC8b& ! d9 TCab= TC8b& d9 TCcd= TCcf& ! d9 TCef= TCcf& d9 TCO = TCO1& ! d8 TC1 = TCO1& d8 TC2 = TC23& ! d8 TC3 = TC23& d8 TC4 = TC45& ! d8 TC5 = TC45& d8 TC6 = TC67& ! d8 TC7 = TC67& d8 TC8 = TC89& ! d8 TC9 = TC89& d8 TCa = TCab& ! d8 TCb = TCab& d8 TCc = TCc d& ! d8 TCd = TCcd& d8 TCe = TCef& ! d8 TCf = TCef& d8 TD07= ! d7 TD8f= d7 TD03= TD07& ! d6 TD47= TD07& d6 TD8b= TD8f& ! d6 TDcf= TD8f& d6 TD01= TD03& ! d5 TD23= TD03& d5 TD45= TD47& ! d5 TD67= TD47& d5 TD89= TD8b& ! d5 TDab= TD8b& d5 TDcd= TDcf& ! d5 TDef= TDcf& d5 TD2 = TD23& ! d4 TD3 = TD23& d4 TD4 = TD45& ! d4 TD5 = TD45& d4 TD6 = TD67& ! d4 TD7 = TD67& d4 TD8 = TD89& ! d4 TD9 = TD89& d4 TDa = TDab& ! d4 TDb = TDab& d4 TDc = TDcd& ! d4 TDd = TDcd& d4 TDe = TDef& ! d4 TDf = TDef& d4 TE07= ! d3 TE8f= d3 TE03= TE07& ! d2 TE47= TE07& d2 TE8b= TE8f& ! d2 TEcf= TE8f& d2 T30= TA3&TBO T31= TA3&TB1 T32= TA3&TB2 T33= TA3&TB3 T34= TA3&TB4 T35= TA3&TB5 T36= TA3&TB6 T37= TA3&TB7 T38= TA3&TB8 T39= TA3&TB9 T3a= TA3&TBa T3b= TA3&TBb T3c= TA3&TBc T3d= TA3&TBd T3e= TA3&TBe T3f= TA3&TBf T3fc= T3f&TCc T3fd= T3f&TCd T3fe= T3f&TCe T3ff= T3f&TCf S1=TAO&TB07 S2=TAO&TB8f S3=TA1&TB03 S4=TA1&TB47 S5=TAl&TB8b S6=TAl&TBcf S7=TA2&TB01 S8=TA2&TB23 S9=TA2&TB45 S10=TA2&TB67 S11=TA2&TB89 S12=TA2&TBab S13=TA2&TBc S14=TA2&TBd S15=TA2&Tbe S16=TA2&TBf S17=T30 S18=T31 S19=T32 S20=T33 S21=T34&TC07 S22=T34&TC8f S23=T35&TC07 S24=T35&TC8f S25=T36&TC07 S26=T36&TC8f S27=T37&TC07 S28=T37&TC8f S29=T38&TC07 S30=T38&TC8b S31=T38&TCcf S32=T39&TC03 S33=T39&TC47 S34=T39&TC8b S35=T39&TCcf S36=T3a&TC03 S37=T3a&TC47 S38=T3a&TC8b S39=T3a&TCcf S40=T3b&TC03 S41=T3b&TC47 S42=T3b&TC8b S43=T3b&TCcf S44=T3c&TC03 S45=T3c&TC47 S46=T3c&TC89 S47=T3c&TCab S48=T3c&TCcd S49=T3c&TCef S50=T3d&TC01 S51=T3d&TC23 S52=T3d&TC45 S53=T3d&TC67 S54=T3d&TC89 S55=T3d&TCab S56=T3d&TCcd S57=T3d&TCef S58=T3e&TC01 S59=T3e&TC2 S60=T3e&TC3 S61=T3e&TC4 S62=T3e&TC5 S63=T3e&TC6 S64=T3e&TC7 S65=T3e&TC8 S66=T3e&TC9 S67=T3e&TCa S68=T3e&TCb S69=T3e&TCc S70=T3e&TCd S71=T3e&TCe S72=T3e&TCf S73=T3f&TCO S74=T3f&TCl S75=T3f&TC2&TD07 S76=T3f&TC2&TD8f S77=T3f&TC3&TD07 S78=T3f&TC3&TD8f S79=T3f&TC4&TD07 S80=T3f&TC4&TD8f S81=T3f&TC5&TD07 S82=T3f&TC5&TD8f S83=T3f&TC6&TD07 S84=T3f&TC6&TD8f S85=T3f&TC7&TD07 S86=T3f&TC7&TD8f S87=T3f&TC8&TD07 S88=T3f&TC8&TD8f S89=T3f&TC9&TD07 S90=T3f&TC9&TD8f S91=T3f&TCa&TD07 S92=T3f&TCa&TD8b S93=T3f&TCa&TDcf S94=T3f&TCb&TD03 S95=T3f&TCb&TD47 S96=T3f&TCb&TD8b S97=T3f&TCb&TDcf S98=T3fc&TD03 S99=T3fc&TD47 S100=T3fc&TD8b S101=T3fc&TDcf S102=T3fd&TD03 S103=T3fd&TD45 S104=T3fd&TD67 S105=T3fd&TD89 S106=T3fd&TDab S107=T3fd&TDcd S108=T3fd&TDef S109=T3fe&TD01 S110=T3fe&TD23 Slll=T3fe&TD45 S112=T3fe&TD67 S113=T3fe&TD89 S114=T3fe&TDab S115=T3fe&TDcd S116=T3fe&TDef S117=T3ff&TDO1 S118=T3ff&TD2 S119=T3ff&TD3 S120=T3ff&TD4 S121=T3ff&TD5 S122=T3ff&TD6 S123=T3ff&TD7 S124=T3ff&TD8 S125=T3ff&TD9 S126=T3ff&TDa S127=T3ff&TDb&TE07 S128=T3ff&TDb&TE8f S129=T3ff&TDc&TE07 S130=T3ff&TDc&TE8f S131=T3ff&TDd&TE07 S132=T3ff&TDd&TE8f S133=T3ff&TDe&TE07 S134=T3ff&TDe&TE8f S135=T3ff&TDf&TE03 S136=T3ff&TDf&TE47 S137=T3ff&TDf&TE8b S138=T3ff&TDf&Tecf MUX for GX and JX Encoder of enc rds For GX : if (SlS2IS3IS4IS5IS7IS9Sl0S14IS 16IS18S22S 24IS25IS32S37S49) {gd (6 : 0) = (d (14 : 8)} if (S6lSl2lS27lS38lS66lS69) {gd (6 : 0) = (d (13 : 7)} if (S8S11S15IS17S19IS20S23S29S34IS35S41IS44IS51IS52IS58IS80I S85IS87) {gd (6 : 0) = (d (12 : 6)} if (S13S2 1IS28IS31IS36IS43IS45IS4 7S57IS60IS6 4S72IS74S77IS83IS91) {gd (6 : 0) = (d (11 : 5)} if (S26lS40lS42lS56lS68lS71lS84lS89lSllllSl12) {gd (6 : 0) = (d (10 : 4)} if (S30IS33IS39IS46IS48S50IS54IS5 5S59S62IS6 3IS70S7357 6IS79S82IS86I S88IS933IS95 S96S97 S100IS101IS 102S104IS108IS116IS119IS121IS122IS126) {gd (6 : 0) = (d (9 : 3)} if (S53S67S90) S98 S110 S115S124S130JS131) {gd (6 : 0) = (d (8 : 2)} if (S61IS78IS81IS94S105S106IS120IS125IS136) {gd (6 : 0) = (d (7 : 1)} if (S75IS92S99S103S107IS113IS114S118IS123IS127IS128IS132IS133S1 35 S1371S138) {gd (6 : 0) = (d (6 : 0)} if (Sl|S13|S30|S75) {gsO =l, all other gs=0} if (S3|S21|S46|S92) {gsl =1, all other gs=o} if (S7|S31|S59|S103) {gs2 =l, all other gs=0} if (S14|S47|S76|S118) {gs3 =l, all other gs=0} if (S22|S60|S93|S127) {gs4 =l, all other gs=0} if (S32|S77|S104|S135) {gs5 =l, all other gs=0} if (S2|S6|S8|Sll|S26|S33|S39|S53|S61) {gs6 =l, all other gs=o} if (S4JS12) S ! 5 S19JS40 S48S54JS67S78) {gs7 =l, all other gs=0} if (S16|S27|S34|S41|S68|S79|S86|S98|S105) {gs8 =l, all other gs=0} if (S49|S69|S80|S87|S112|Sll9|S122|S131|S136) {gs9 =l, all other gs=0} if (S5|S17|S20|S28|S42|S50|S55|S81|S99) {gslO=l, all other gs=0} if (S9|S23|S29|S43|S56|S62|S70|S94|S113) {gsll=l, all other gs=O} if (S18|S35|S44|S57|S71|S82|S88|S106|S123) {gsl2=l, all other gs=0} if (S24 S51 S58) S72S89S95) S100 S120S132) {gsl3=l, all other gs=0} if (SlO|S36|S45|S63|S73|S90|S107|S114) {gsl4=l, all other gs=0} if (S25|S64|S74|S96|SlOl|S115|S128|S133) {gsl5=l, all other gs=O} if-(S37|S83|S91|S108|S116|S124|S137|S138) {gsl6=l, all other gs=O} if (S65IS109IS117IS129IS134) (gsl7=1, all other gs=0} if (S38 S52 S84S97S102 S110 S125) {gsl8=l, all other gs=0} if (S66|S85|Slll|S121|S126|S130) {gsl9=l, all other gs=O} ci= S61SlllS26lS39lS53lsl2lSl9lS40lS54lS67lS27lS41lS68lS86lS98lS 69IS87 IS112IS122IS131 di= S20S28IS42IS55IS999S29IS43 S 56S70S113I544IS57IS71IS88S123 IS58lS72lS89lS100lS132 ei= S45S73S90IS114IS74S101S115IS133S91S 116IS124IS138IS117S134 fi= S1021S12SIS126 if (cì|di|ei|fi) g_inv = 1 else g_inv = 0 For JX : jd (8 : 0) = d (8 : 0) if (Sl|S3|S7|S14|S22|S32) {jsO =l, all other js=0} if (S13|S21|S31|S47|S60|S77) {jsl =l, all other jus=0} if (S30|S46|S59|S76|S93|S104) {js2 =l, all other js=o} if (S75|S92|S103|S118|S127|S135) {js3 =l, all other js=0} if (S2|S4|S16|S49) {js4 =l, all other js=0} if (S8|S15|S34|S80) {js5 =l, all other js=0} if (S33|S48|S79|Sll9) {js6 =l, all other js=O} if (S61|S78|S105|S136) {js7 =l, all other js=0} if (S5|S9|S18|S24) {js8 =l, all other js=0} if (S17IS23S35S51) {js9 =l, all other js=O} if (S50|S62|S82|S95) {jslO=l, all other js=O} if (S81 S94 S106S120) {jsll=l, all other js=O} if (SlO|S25|S37|S65) {jsl2=l, all other js=O} if (S36IS64S83S109) {jsl3=l, all other js=O} if (S63IS96S108S129) {jsl4=l, all other js=0} if (S107S128) S137) {jsl5=l, all other js=0} if (S38S66) {jsl6=l, all other js=0} if (S52|S85) {jsl7=l, all other js=0} if (S84|Slll) {jsl8=l, all other js=0} if (S97IS121) {jsl9=l, all other js=0} if (SllO|S130) {js20=l, all other js=0} if (S6|S12|S27|S69) {js21=l, all other js=0} if (Sll|Sl9|S41lS87) {js22=l, all other js=0} if (S26|S40|S68|S112) {js23=l, all other js=0} if (S39IS54S86S122) {js24=l, all other js=0} if (S53 S67 S98 S131) {js25=l, all other js=0} if (S20|S29|S44|S58) {js26=l, all other js=0} if (S28IS43IS57IS72) {js27=1, all other js=0} if (S42 S56 S71 S89) {js28=l, all other js=0} if (S55|S70|S88|S100) {js29=l, all other js=0} if (S99|S113|S123|S132) {js30=l, all other js=O} if (S45|S74|S91|S117) {js31=l, all other js=0} if (S73|SlOl|S116|S134) {js32=l, all other j s= 0 if (S90|S115|S124) {js33=l, all other js=0} if (S114|S133|S138) {js34=l, all other js=0} if (S102|S126) {js35=l, all other js=0} if (S125) {js36=l, all other js=0}

FIG. 6 is a block diagram illustrating g-group encoder 258 in greater detail.

The g-group data bits gd6 : o are coupled to the inputs of g-subgroup encoders 320.

There is one g-subgroup encoder group 320 for each of the g-subgroups defined in Table 2 above. Each g-subgroup encoder 320 receives the corresponding bits from gd6 : o and encodes the bits into a respective 10-bit code word segment according to the mapping in Table 2. The respective g-subgroup code word segments are applied to the inputs of a g-subgroup encoder output multiplexer 322. Output multiplexer 322 has a select input, which is coupled to subgroup select pattern gsl9 : o. Based on which g-subgroup is selected by pattern gsls : o, multiplexer 322 passes the corresponding g-subgroup code word segment to output gws : o as the g-group 10-bit group code word segment. This code word segment is selectively inverted as a function of ginv.

In one embodiment, g-group encoder 258 operates according to the logic operations shown in Table 9.

Table 9 enc gb7 Input : A6, A5, A4, A3, A2, Al, AO Output : C9, C8, C7, C6, C5, C4, C3, C2, Cl, CO gb7a = (! A5| ! A4) & (Al|AO) ; gb7a9= gb7a& ! A6 ; gb7a8= gb7a& A6 ; gb7a7= gb7a& (A5 l (A4 & A3)) ; gb7a6= gb7a & (A4 A A3) ; gb7a5= gb7a & ! A3 ; gb7a4= gb7a& ( ! A5 & (A3 ! A4) gb7a3= gb7a & A2 ; gb7a2= gb7a& (Al & (AO lA2) gb7al= gb7a & (A2 ^ AO) ; gb7aO= gb7a& ( ! | (SA2 & ! AO)) ; gb7b = ( A5| ! A4) & (! Al& ! AO) ; gb7b9= gb7b & ! A6 ; gb7b8= gb7b & A6 ; gb7b7= gb7b & (A3 & A2) ; gb7b6= gb7b & (A3 & ! A2) ; gb7b5= gb7b & (A2 & ! A3) ; gb7b4= gb7b & ( ! A3 & ! A2) ; gb7b3= gb7b ; gb7b2= gb7b & (A5 I A4) ; gb7bl= gb7b & ! A4 ; gb7bO= gb7b & ! A5 ; gb7c = A5&A4 ; gb7c9= gb7c & ! A6 ; gb7c8= gb7c & A6 ; gb7c7= gb7c & (A1 | AO) gb7c6= gb7c & (Al ! AO gb7c5= gb7c & (AO | tA1) gb7c4= gb7c & (tA1 | tAO) gb7c3= gb7c & (A3 & A2) ; gb7c2= gb7c & (A3 & ! A2) ; gb7cl= gb7c & (A2 & ! A3) ; gb7cO= gb7c & (lA3 & lA2) C9 = gb7a9 Igb7b9 |gb7c9 ; C8 = gb7a8 |gb7b8 Igb7c8 ; C7 = gb7a7 |gb7b7 |gb7c7 ; C6 = gb7a6 |gb7b6 |gb7c6 ; C5 = gb7a5 |gb7b5 |gb7c5 ; C4 = gb7a4 |gb7b4 |gb7c4 ; C3 = gb7a3 |gb7b3 gb7c3 C2 = gb7a2 |gb7b2 |gb7c2 ; Cl =-gb7al |gb7bl |gb7cl ; CO = gb7aO |gb7bO |gb7cO ; ----------------------------------------------------- enc gb6 Input : A5, A4, A3, A2, Al, AO Output : C9, C8, C7, C6, C5, C4, C3, C2, C 1, CO gb6a = ( ! A1& ! AO) ; gb6a9= gb6a ; gb6a8= gb6a ; gb6a7= gb6a & A4 ; gb6a6= gb6a & A4 ; gb6a5= gb6a & ! A4 ; gb6a4= gb6a & ! A4 ; gb6a3= gb6a& (A3& A2) ; gb6a2= gb6a & (A3 & lA2) gb6al= gb6a & (A2 & ! A3 gb6aO= gb6a & ( ! A3 & ! A2) ; gb6b = (AlIAO) ; gb6b9= gb6b ; gb6b8= gb6b ; gb6b7= gb6b& (A4& A3) ; gb6b6= gb6b & (A4 & lA3) gb6b5= gb6b & (A3 & ! A4) ; gb6b4= gb6b & ( ! A4 & ! A3) ; gb6b3= gb6b & A2 ; gb6b2= gb6b& (Al & (AO I ! A2)) ; gb6bl= gb6b & (A2 AO) ; gb6bO= gb6b& ( ! | (lA2 & ! AO)) ; C9 = gb6a9 |gb6b9 ; C8 = gb6a8 Igb6b8 ; C7 = gb6a7 Igb6b7 ; C6 = gb6a6 |gb6b6 ; C5 = gb6a5 |gb6b5 ; C4 = gb6a4 |gb6b4 ; C3 = gb6a3 |gb6b3 ; C2 = gb6a2 Igb6b2 ; Cl = gb6al |gb6bl ; CO = gb6a0 Igb6b0 ; if (A5) {C9= ! C9 ; C8= ! C8 ; C7= ! C7 ; C6= ! C6 ; C5= ! C5 ; C4= ! C4 C3= ! C3 ; C2= ! C2 ; Cl= ! Cl ; CO= ! CO ;} enc gb5 enc gb5 Input : A4, A3, A2, Al, AO Output : C9, C8, C7, C6, C 5, C4, C3, C2, C 1, CO C9= 1 ; C8= 1 ; C7= A3 ; C6= ZA3 ; C5= A2 ; C4= ! A2 ; C3= Al & AO) ; C2= Al & ! AO Cl= (AO & ! A1) ; CO= ( ! A1 & ! AO) ; if (A4) {C9= ! C9 ; C8= ! C8 ; C7= ! C7 ; C6= ! C6 ; C5= ! C5 ; C4= ! C4 ; C3= ! C3 ; C2= ! C2 ; Cl-cl ; CO= ! CO ;} enc gb4 Input : A3, A2, Al, AO Output : C 9, C8, C7, C6, C 5, C4, C3, C2, C 1, CO C9= 1 ; C8= 1 ; C7= (A2 & (Al AO) C6= (A2& (Al ! AO)) ; C5= (A2 & (AO ! Al) C4= (A2 & ( ! A1 I ! AO)) ; C3= (SA2 & (Al | AO)) C2= ( ! A2 & (Al ! AO) Cl= ( ! A2 & (AO ! Al) CO= ( ! A2 & ( ! A1 ! AO)) ; if (A3) {C9= ! C9 ; C8= ! C8 ; C7= ! C7 ; C6= ! C6 ; C5= ! C5 ; C4= ! C4 ; C3= ! C3 ; C2= IC2 ; Cl= ! Cl ; CO= ! CO ;} enc gb3 enc gb3 Input : A2, Al, AO Output : C9, C8, C7, C6, C5, C4, C3, C2, Cl, CO C9= A2 ; C8= ! A2 ; C7= (Al & AO) ; C6= (Al & ! AO) ; C5= (AO & ! Al C4= ( ! A1 & ! AO) ; C3= 0 ; C2= 1 ; Cl= 1 ; CO= 1 ; enc gb2 Input : Al, AO Output : C9, C8, C7, C6, C 5, C4, C3, C2, Cl, CO C9= AO C8= ! AO C7= Al C6= Al C5= Al C4= Al C3= ! Al ; C2= ! Al ; Cl= ! Al CO= ! A1 ; enc gc7 Input : A6, A5, A4, A3, A2, Al, AO Output : C9, C8, C7, C6, C5, C4, C3, C2, Cl, CO gc7a = ( ! A5) & ( (! A4) | (A4& ! A3)) gc7a9= gc7a& ! A6 ; gc7a8= gc7a& A6 ; gc7a7= gc7a& (A3 | (A4 & A2)) ; gc7a6= gc7a& (tA3 & (A2 | MA4)) gc7a5= gc7a & (A4 ^ A2) ; gc7a4= gc7a & ! A2 ; gc7a3= gc7a & (A1 | AO) gc7a2= gc7a & (Al ! AO gc7al= gc7a & (AO ! Al gc7aO= gc7a & (MAl | SAO) gc7b = ( ! A5&A4&A3) I (A5& ! A4) ; gc7b9= gc7b& ! A6 ; gc7b8= gc7b& A6 ; gc7b7= gc7b & (Al | AO) gc7b6= gc7b & (Al ! AO gc7b5= gc7b & (AO ! Al gc7b4= gc7b & (MAl | SAO) gc7b3= gc7b& (A3 & AS A2) gc7b2= gc7b& ( ! A3 I (A4 & A2)) ; gc7bl= gc7b & (A5 A lA2) gc7bO= gc7b & ! A2 ; gc7cd = A5&A4& ! A3 ; gc7cd9= gc7cd& ! A6 ; gc7cd8= gc7cd& A6 ; gc7cd7= gc7cd& (A2 Al & AO)) gc7cd6= gc7cd& (A2 Al & ! AO)) gc7cd5 = gc7cd& (A2 AO & Al) gc7cd4= gc7cd& (A2 ( ! A1 & ! AO)) gc7cd3= gc7cd& ( ! A2 (Al & AO)) gc7cd2= gc7cd& ( ! A2 Al & ! AO)) gc7cdl= gc7cd& ( ! A2 AO & Al) gc7cdO= gc7cd& ( ! A2 ! Al & ! AO)) gc7e = A5&A4&A3 ; gc7e9= 0 ; gc7e8= 0 ; gc7e7= gc7e & (Al AO gc7e6= gc7e & (Al ! AO gc7e5= gc7e & (AO ! Al gc7e4= gc7e & ( ! Al ! AO gc7e3= gc7e & (A6 A2 gc7e2= gc7e & (A6 ! A2 gc7el= gc7e & (A2 | lA6) gc7eO= gc7e & ( ! A6 ! A2 C9 = gc7a9 |gc7b9 |gc7cd9 |gc7e9 ; C8 = g c7a8 gc7b8 gc7cd8 gc7 e8 ; C7 = gc7a7 |gc7b7 |gc7cd7 |gc7e7 ; C6 = gc7a6 lgc7b6 lgc7cd6 lgc7e6 ; C5 = g c7a5 gc7b5 gc7cd5 Igc7 e5 ; C4 = g c7a4 gc7b4 gc7cd4 Igc7 e4 ; C3 = gc7a3 lgc7b3 lgc7cd3 lgc7e3 ; C2 = g c7a2 gc7b2 Igc7cd2 Igc7 e2 ; Cl = gc7al |gc7bl |gc7cdl |gc7el ; CO = gc7a0 gc7b0 jgc7cd0 gc7e0 enc gc6 enc gc6 Input : A5, A4, A3, A2, Al, AO Output : C9, C8, C7, C6, C 5, C4, C3, C2, Cl, CO gc6a = ( ! A51 ! A4) & (Al) AO) ; gc6a9= gc6a ; gc6a8= gc6a ; gc6a7= gc6a& (A5 | (A4 & A3)) ; gc6a6= gc6a & (A4 A A3 gc6a5= gc6a & ! A3 ; gc6a4= gc6a& ( ! A5 & (A3 ! A4)) ; gc6a3= gc6a & A2 ; gc6a2= gc6a& (Al & (AO | tA2)) gc6al= gc6a & (A2 AO) ; gc6aO= gc6a& ( | (MA2 & ! AO)) ; gc6b = (! A5| SA4) & ( ! A1& ! AO) ; gc6b9= gc6b ; gc6b8= gc6b ; gc6b7= gc6b & (A3 & A2) ; gc6b6= gc6b & (A3 & ! A2) ; gc6b5= gc6b & (A2 & ! A3) ; gc6b4= gc6b & ( ! A3 & ! A2) ; gc6b3= gc6b ; gc6b2= gc6b & (A5 | A4) gc6bl= gc6b & ! A4 ; gc6bO= gc6b & ! A5 ; gc6c = (A5&A4) ; gc6c9= gc6c ; gc6c8= gc6c ; gc6c7= gc6c & (Al AO gc6c6= gc6c & (A1 | tAO) gc6c5= gc6c& (AO ! A1) gc6c4= gc6c & ( ! Al ! AO gc6c3= gc6c & (A3 & A2) gc6c2= gc6c & (A3 & ! A2 gc6cl= gc6c & (A2 &lA3 gc6cO= gc6c & ( ! A3 & lA2) C9 = gc6a9 gc6b9 gc6c9 ; C8 = g c6a8 gc6b8 gc6c8 ; C7 = g c6a7 gc6b7 gc6c7 ; C6 = g c6a6 | gc6b6 | gc6c6 C5 = gc6a5 gc6b5 gc6c5 ; C4 = gc6a4 gc6b4 |gc6c4 ; C3 = gc6a3 gc6b3 gc6c3 ; C2 = gc6a2 lgc6b2 lgc6c2 ; Cl = gc6al gc6bl gc6cl ; CO = gc6a0 gc6b0 gc6c0 ; enc gc4 Input : A3, A2, Al, AO Output : C9, C8, C7, C6, C 5, C4, C3, C2, Cl, CO gc4ab = Al|AO ; gc4ab9= 0 ; gc4ab8= 0 ; gc4ab7= gc4ab & (A3 | A2) gc4ab6= gc4ab& (A3 Al & (AO | tA2))) gc4ab5= gc4ab& (A3 A2 AO) gc4ab4= gc4ab& (A3 j ( ! A1 j ( ! A2& ! AO))) ; gc4ab3= gc4ab & (A2 ! A3 gc4ab2= gc4ab& ( ! A3 Al & (AO | SA2))) gc4abl= gc4ab& ( ! A3 A2 A AO) gc4abO= gc4ab& ( ! A3 ( ! Al ! A2 ! AO) gc4c = ( ! Al& ! AO) ; gc4c9= gc4c ; gc4c8= gc4c ; gc4c7= gc4c & (A3 & A2) ; gc4c6= gc4c & (A3 & ! A2) ; gc4c5= gc4c & (A2 & ! A3 gc4c4= gc4c & ( ! A3 & ! A2) ; gc4c3= 0 ; gc4c2= gc4c ; gc4cl= gc4c ; gc4cO= gc4c ; C9 = gc4ab9 |gc4c9 ; C8 = gc4ab8 |gc4c8 ; C7 = gc4ab7 |gc4c7 ; C6 = gc4ab6 |gc4c6 ; C5 = gc4ab5 |gc4c5 ; C4 = gc4ab4 |gc4c4 ; C3 = gc4ab3 |gc4c3 ; C2 = gc4ab2 |gc4c2 ; Cl = gc4abl |gc4cl ; CO = gc4abO |gc4cO ; enc _gcl enc gcl Input : AO Output : C9, C8, C7, C6, C5, C4, C3, C2, Cl, CO C9= 1 ; C8= 1 ; C7= AO ; C6= AO ; C5= AO ; C4= AO ; C3= ! AO ; C2= ! AO ; Cl= ! AO ; CO= ! AO ; enc gd6 Input : A5, A4, A3, A2, Al, AO Output : C9, C8, C7, C6, C5, C4, C3, C2, Cl, CO gd6a = ( ! A5) & ( ( A4) | (A4& ! A3)) gd6a9= gd6a ; gd6a8= gd6a ; gd6a7= gd6a& (A3 | (A4 & A2)) ; gd6a6= gd6a& ( ! A3 & (A2 ! A4)) ; gd6a5= gd6a & (A4 A A2) ; gd6a4= gd6a & ! A2 ; gd6a3= gd6a& (Al AO) gd6a2= gd6a & (Al ! AO) gd6al= gd6a & (AO | SA1) ; gd6aO= gd6a & (lAl | lAO) ; gd6b = (! A5&A4&A3) | (A5& ! A4) ; gd6b9= gd6b ; gd6b8= gd6b ; gd6b7= gd6b & (Al AO gd6b6= gd6b & (Al ! AO gd6b5= gd6b & (AO ! Al gd6b4= gd6b & (SAl | tAO) ; gd6b3= gd6b& (A3 & (A5 | A2)) gd6b2= gd6b& ( ! A3 | (A4 & A2)) ; gd6bl= gd6b & (A5 A ! A2) ; gd6bO= gd6b & ! A2 ; gd6cd = A5&A4& ! A3 ; gd6cd9= gd6cd ; gd6cd8= gd6cd ; gd6cd7= gd6cd& (A2 (A1& AO)) ; gd6cd6= gd6cd& (A2 (Al & ! AO)) ; gd6cd5= gd6cd& (A2 AO & ! A1)) ; gd6cd4= gd6cd& (A2 | (MA1 & ! AO)) ; gd6cd3= gd6cd& ( ! A2 Al & AO)) ; gd6cd2= gd6cd& ( ! A2 (Al & ! AO)) ; gd6cdl= gd6cd& (! A2 | (AO & ! A1)) ; gd6cdO= gd6cd& (IA2 1 ( ! Al & ! AO)) ; gd6ef = A5&A4&A3 ; gd6ef9= 0 ; gd6ef8= 0 ; gd6ef7= gd6ef & (A2 Al AO gd6ef6= gd6ef & (A2 Al ! AO gd6ef5= gd6ef & (A2 AO ! A1) gd6ef4= gd6ef & (A2 ! Al ! AO gd6ef3= gd6ef & (Al AO ! A2 gd6ef2= gd6ef & (Al ! A2 ! AO gd6efl= gd6ef & (AO | SA2 | MA1) ; gd6efO= gd6ef & ( ! A2 ! Al ! AO C9 = gd6a9 |gd6b9 |gd6cd9 |gd6ef9 ; C8 = gd6a8 |gd6b8 |gd6cd8 |gd6ef8 ; C7 = gd6a7 |gd6b7 |gd6cd7 |gd6ef7 ; C6 = gd6a6 |gd6b6 |gd6cd6 |gd6ef6 ; C5 = gd6a5 |gd6b5 |gd6cd5 |gd6ef5 ; C4 = gd6a4 |gd6b4 |gd6cd4 |gd6ef4 ; C3 = gd6a3 |gd6b3 |gd6cd3 |gd6ef3 ; C2 = gd6a2 |gd6b2 |gd6cd2 |gd6ef2 ; Cl = gd6al |gd6bl |gd6cdl |gd6efl ; CO = gd6aO |gd6bO |gd6cdO |gd6efO ; enc gd5 Input : A4, A3, A2, Al, AO Output : C9, C8, C7, C6, C 5, C4, C3, C2, Cl, CO C9= ! A4 ; C8= A4 ; C7= Al AO C6= (Al ! AO) ; C5= AO ! Al C4= ! Al ! AO C3= A3 A2 C2= A3 ! A2 Cl= (A2 | SA3) CO= ! A3 lA2 enc gd4 enc gd4 Input : A3, A2, Al, AO Output : C9, C8, C7, C6, C 5, C4, C3, C2, Cl, CO C9= A2 ; C8= ! A2 ; C7= A3 Al C6= (A3 ! A1) C5= (A3 | AO) C4= (A3 ! AO) C3= Al | lA3) C2= ! A3 ! Al Cl= AO lA3 CO= ! A3 ! AO enc gd3 Input : A2, Al, AO Output : C 9, C8, C7, C6, C 5, C4, C3, C2, C 1, CO C9 = Al ; C8 = ! A1 ; C7 = A2 AO C6 = A2 AO C5 = A2 ! AO C4 = A2 ! AO C3 = AO ! A2 C2 = AO ! A2 Cl = ! A2 ! AO CO = (SA2 | MAO) enc ge5 Input : A4, A3, A2, Al, AO Output : C 9, C8, C7, C6, C 5, C4, C3, C2, C 1, CO ge5a = ! A4 ; ge5a9= ge5a ; ge5a8= ge5a ; ge5a7= ge5a & (A3 A2) ; ge5a6= ge5a & (A3 ! A2) ; ge5a5= ge5a & (A2 ! A3 ge5a4= ge5a & ( | lA2) ge5a3= ge5a & (Al AO ge5a2= ge5a & (Al ! AO ge5al= ge5a & (AO | IA1) ; ge5aO= ge5a & (SAl | SAO) ; ge5bc = A4 ; ge5bc9= ge5bc & A2 ; ge5bc8= ge5bc & ! A2 ; ge5bc7= ge5bc & (A3 Al AO ge5bc6= ge5bc & (A3 Al ! AO) ge5bc5= ge5bc & (A3 | AO | SA1) ; ge5bc4= ge5bc & (A3 ! A1 ! AO) ge5bc3= ge5bc & (Al AO | MA3) ; ge5bc2= ge5bc & (Al ! A3 ! AO ge5bcl= ge5bc & (AO ! A3 ! Al ge5bc0= ge5bc & ( ! A3 ! Al ! AO C9 = ge5a9 Ige5bc9 ; C8 = ge5a8 |ge5bc8 ; C7 = ge5a7 Ige5bc7 ; C6 = ge5a6 |ge5bc6 ; C5 = ge5a5 Ige5bc5 ; C4 = ge5a4 |ge5bc4 ; C3 = ge5a3 ge5bc3 C2 = ge5a2 |ge5bc2 ; Cl = ge5al |ge5bcl ; CO = ge5aO jge5bc0 enc ge3 enc ge3 Input : A2, Al, AO Output : C 9, C8, C7, C6, C 5, C4, C3, C2, C 1, CO C9= 1 ; C8= 1 ; C7= (A2 Al) C6= (A2 | lA1) ; C5= (A2 AO) C4= (A2 ! AO) C3= (Al ! A2) C2= (SA2 | SA1) ; Cl= AO ! A2 CO= ! A2 ! AO enc ge2 Input : Al, AO Output : C 9, C8, C7, C6, C 5, C4, C3, C2, C 1, CO C9= 1 ; C8= 1 ; C7= Al AO C6= Al AO C5= (Al ! AO) C4= Al ! AO C3= (AO | lA1) ; C2= (AO ! Al Cl= ! Al ! AO CO= ! Al ! AO enc ge0 enc geO Output : C9, C8, C7, C6, C 5, C4, C3, C2, C 1, CO C9= 0 ; C8= 0 ; C7= 1 ; C6= 1 ; C5= 1 ; C4= 1 ; C3= 1 ; C2= 1 ; C1= 1 ; CO= 1 ; enc gf3 Input : A2, Al, AO Output : C9, C8, C7, C6, C 5, C4, C3, C2, C 1, CO C9= 1 ; C8= 1 ; C7= A2 Al AO C6= (A2 Al ! AO) C5= (A2 AO ! A1) C4= (A2 ! A1 ! AO) C3= (Al AO ! A2) C2= Al ! A2 ! AO Cl= AO ! A2 ! Al CO= ! A2 ! Al ! AO enc gfl Input : AO Output : C 9, C8, C7, C6, C 5, C4, C3, C2, C 1, CO C9= AO ; C8= ! AO ; C7= 1 ; C6= 1 ; C5= 1 ; C4= 1 ; C3= 1 ; C2= 1 ; Cl= 1 ; CO= 1 ; enc ggO Output : C 9, C8, C7, C6, C 5, C4, C3, C2, C1, CO C9= 1 ; C8= 1 ; C7= 1 ; C6= 1 ; C5= 1 C4= 1 C3= 1 ; C2= 1 Cl= 1 CO= 1 Note : gg0 is only used in JX Encoder but not in GX Encoder GX Encoder Output Mux Input : gb7 (9 : 0), gob6 (9 : 0), gb5 (9 : 0), gb4 (9 : 0), gb3 (9 : 0), gb2 (9 : 0), gc7 (9 : 0), gc6 (9 : 0), gc4 (9 : 0), gcl (9 : 0), gd6 (9 : 0), gd5 (9 : 0), gd4 (9 : 0), gd3 (9 : 0), ge5 (9 : 0), ge3 (9 : 0), ge2 (9 : 0), ge0 (9 : 0), gf3 (9 : 0), gfl (9 : 0), g_sel (19 : 0) Output : gw (9 : 0) If (g_selO) (gw (9 : 0) = gb7 (9 : 0)} If (g_sell) {gw (9 : 0) = gb6 (9 : 0)} If (g_sel2) {gw (9 : 0) = gb5 (9 : 0)} If (g_sel3) {gw (9 : 0) = gb4 (9 : 0)} If (sel4) {gw (9 : 0) = gb3 (9 : 0)} If (g_sel5) {gw (9 : 0) = gb2 (9 : 0)} If (gsel6) {gw (9 : 0) = gc7 (9 : 0)} If (g_sel7) {gw (9 : 0) = gc6 (9 0)} If (g_sel8) {gw (9 : 0) = gc4 (9 : 0)} If (g_sel9) {gw (9 : 0) = gcl (9 0) If (gsell0) {gw (9 : 0) = gd6 (9 : 0)} If (g-selll) {gw (9 : 0) = gd5 (9 : 0)) If (sell2) {gw (9 : 0) = gd4 (9 0) If (sell3) {gw (9 : 0) = gd3 (9 : 0)} If (sell4) {gw (9 : 0) = ge5 (9 : 0)} If (gsell5) {gw (9 : 0) = ge3 (9 0)} If (gsell6) {gw (9 : 0) = ge2 (9 0)} If (sell7) {gw (9 : 0) = geO (9 : 0)} If (g_sell8) {gw (9 : 0) = gf3 (9 : 0)} If (g sell 9) {gw (9 : 0) = gfl (9 : 0)

J-group encoder 260 (shown in FIG. 3) operates in a similar fashion as g- group encoder 258. FIG. 7 is a block diagram illustrating j-group encoder 260 in greater detail. J-group encoder 260 includes a plurality of j-subgroup encoders 330 and a j-group encoder output multiplexer 332. All of the j-subgroup encoders 330 are identical to the g-subgroup encoders 320 shown in FIG. 6. Each subgroup encoder 330 receives the respective bits of jd7 : o and encodes those bits into a corresponding j-group 10-bit code word segment for selection by multiplexer 322.

Multiplexer 332 selects the appropriate code word segment based on the j-group

select pattern js36:0, The selected code word segment is applied to j-group code word output jw9 : o.

Table 10 illustrates the logical operations performed by j-group encoder 260 according to one embodiment of the present invention.

Table 10 JX Encoder Output Mux Input : gb7 (9 : 0), gb6 (9 : 0), gb5 (9 : 0), gb4 (9 : 0), gb3 (9 : 0), gb2 (9 : 0), gc7 (9 : 0), gc6 (9 : 0), gc4 (9 : 0), gcl (9 : 0), gd6 (9 : 0), gd5 (9 : 0), gd4 (9 : 0), gd3 (9 : 0), ge5 (9 : 0), ge3 (9 : 0), ge2 (9 : 0), geO (9 : 0), gf3 (9 : 0), gfl (9 : 0), ggO (9 : 0), A (7 : 0), js (36 : 0) Output : jw (9 : 0) ub7 = (js0 jsl2) & ! A7 ub6 = (jsO | js12) & A7 & ! A6 ub5 = (jsO jsl2) & A7 & A6 & ! A5 ub4 = (jsO jsl2) & A7 & A6 & A5 & ! A4 ub3 = (j s 0 jsl2) & A7 & A6 & A5 & A4 & ! A3 ub2 = (js2 jsl4) & ! A2 uc7 = (js8 & ! A7) j s21 uc6 = (js8 & A7 & lA6) | js22 uc4 = (js9 & A5 & lA4) | js23 ucl = jsll I (js25 & ! Al) ud6 = (js4 & A7 & A6) | js26 ud5 = (js5 & ! A5) j s27 ud4 = (js5 & A5 & A4) | js28 ud3 = js6 js29 ue5 = jsl | js31 ue3 = (jsO & A7 & A6 & A5 & A4 & A3) | js32 ue2 = (js2 & A2) I js33 ueO = js3 I js34 uf3 = js24 | js35 ufl = (js25 & Al) j s36 ugO = js30 vc7 = (js4 & ! A7) j sl6 vc6 = (js4 & A7 & SA6) | js17 vc4 = (js5 & A5 & lA4) | js18 vcl = js7 ! (js20 & ! A1) vd6 = (js8 & A7 & A6) vd5 = (js9 & ! A5) vd4 = (js9 & A5 & A4) vd3 = jsl0 ve5 = jsl3 ve3 = (jsl2 & A7 & A6 & A5 & A4 & A3) ve2 = (jsl4 & A2) veO = jsl5 vf3 = jsl9 vfl = (js20 & Al) if (ud7) jw (9 : 0) = gb7 (9 : 0) if (ud6) jw (9 : 0) = gb6 (9 : 0) if (ud5) jw (9 : 0) = gb5 (9 : 0) if (ud4) jw (9 : 0) = gb4 (9 : 0) if (ud3) jw (9 : 0) = gb3 (9 : 0) if (ud2) jw (9 : 0) = gb2 (9 : 0) if (uc7) jw (9 : 0) = gc7 (9 : 0) if (uc6) jw (9 : 0) = gc6 (9 : 0) if (uc4) jw (9 : 0) = gc4 (9 : 0) if (ucl) jw (9 : 0) = gcl (9 : 0) if (ud6) jw (9 : 0) = gd6 (9 : 0) if (ud5) jw (9 : 0) = gd5 (9 : 0) if (ud4) jw (9 : 0) = gd4 (9 : 0) if (ud3) jw (9 : 0) = gd3 (9 : 0) if (ue5) jw (9 : 0) = ge5 (9 : 0) if (ue3) jw (9 : 0) = ge3 (9 : 0) if (ue2) jw (9 : 0) = ge2 (9 : 0) if (ue0) jw (9 : 0) = ge0 (9 : 0) if (uf3) jw (9 : 0) = gf3 (9 : 0) if (ufl) jw (9 : 0) = gfl (9 : 0) if (ug0) jw (9 : 0) = gg0 (9 : 0) if (vc7) jw (9 : 0) = gc7 (9 : 0) if (vc6) jw (9 : 0) = gc6 (9 : 0) if (vc4) jw (9 : 0) = gc4 (9 : 0) if (vcl) jw (9 : 0) = gcl (9 : 0) if (vd6) jw (9 : 0) = gd6 (9 : 0) if (vd5) jw (9 : 0) = gd5 (9 : 0) if (vd4) jw (9 : 0) = gd4 (9 : 0) if (vd3) jw (9 : 0) = gd3 (9 : 0) if (ve5) jw (9 : 0) = ge5 (9 : 0) if (ve3) jw (9 : 0) = ge3 (9 : 0) if (ve2) jw (9 : 0) = ge2 (9 : 0) if (ve0) jw (9 : 0) = ge0 (9 : 0) if (vf3) jw (9 : 0) = gf3 (9 : 0) if (vfl) jw (9 : 0) = gfl (9 : 0)

FIG. 8 is a block diagram, which illustrates encoder output circuit 262 (shown in FIG. 3) in greater detail. Encoder output circuit 262 includes code word generator 350 and RDS calculator 352. In one embodiment, code word generator 350 concatenates the g-group 10-bit code word segment gws : o with the j-group 10- bit code word segment jw9 : o to form a 20-bit code word on output Yls : o.

RDW calculator 352 calculates the next state based on the current state and the running digital sum of the current 20-bit code word provided on code word output Yls o. However if the current state is"1" (current RDS equals six) and the RDS of Yls : o is six, then RDS calculator 352 inverts the 20-bit code word such that the cumulative RDS and the next state become"0". The resulting 20-bit code word is output to code word output Wls : o. An interleave circuit 354 can be used if desired, to interleave adjacent 20-bit code words as discussed above.

Table 11 illustrates the logical operations performed by encoder output circuit 262 according to one embodiment of the present invention.

Table 11 Form Code Word Y (19 : 10) = gw (9: 0) ; Y (9 : 0) = jw (9: 0) ; if (Y (19 : 0) ==OxAAAAA) Y (19 : 0) = OxC03F3 ; if (Y (19 : 0) ==ou55555 Y (19 : 0) = OxC03FC ; RDS Calculator <BR> <BR> <BR> HW=Yl9+Y18+Y17+Y16+Y15+Y14+Y13+Y12+Yll+YlO+Y9+Y8+Y7+Y6+Y5+Y4 +Y3+Y2+Yl+YO RDS = (2*HW)-20 Note that Hamming weight (HW) of the code word Y (19 : 0) is the sum of the 20 code bits. The running digital sum (RDS) of the code word is calculated by subtracting the number of "0" by the number of"1"in the code word. For example, if there are 13"1" (HW=13) and number of "0" is (20-HW), the RDS is HW- (20-HW) = (2*HW) -20.

In a sequence of code words, the cumulative RDS is the RDS of all bits from the beginning of the first code word to the end of the current code word. Note that the cumulative RDS in this design must be equal to either 0, or 6. This number determines the state of the encoder (state=0 when cumulative RDS is 0, state=l when cumulative RDS is 6. if (state==0 && RDS==0) {next state=0 ; W (19 : 0) = Y (19 : 0) ;} if (state==0 && RDS==6) {next state=l ; W (19 : 0) = Y (19 : 0) ;} if (state= =1 && RDS= =0) { next state=1 ; W (19 : 0) = Y (19 : 0) ;}<BR> <BR> if (state==l && RDS==6) {next state=0 ; W (19 : 0) = ! Y (19 : 0) ;

2. Decoder Fig. 9 is a block diagram of a decoder 400 for decoding 20-bit code words Wls : o into corresponding 18-bit user data words I17:0 with each cycle of WORD CLOCK. Decoder 400 includes decoder input circuit 402, g-group decoder 404, j- group decoder 406 and decoder output circuit 408, which are shown in more detail in FIGS. 10-19.

Decoder input circuit 402 receives a 20-bit code word Wi9 : o with each rising edge of WORD CLOCK. Decoder input circuit 402 generates a corresponding g- group 10-bit code segment gcp9 : o and a corresponding j-group 10-bit code segment jcp9 : o. The g-group code segments are selectively inverted, based on the running digital sum of the code word Wl9 : o.

G-group decoder 404 decodes the g-group 10-bit segment gcp9 : o into a corresponding g-group data word gdw6:0 and a corresponding G-type according to Tables 2 and 4 above. The G-type corresponds to the pattern listed in the G- type column of Table 4.

Similarly, j-group decoder 406 decodes the j-group 10-bit code segment jcp9 : o into a corresponding j-group data word jdw7 : o and a corresponding J-type.

Again, the J-type pattern corresponds to the pattern provided in the corresponding J-type column in Table 4.

Decoder output circuit 408 regenerates the first, second and third user data word fragments from the g-group and j-group data words and the corresponding G- and J-types and outputs the resulting 18-bit user data word onto output Il7 : o.

FIG. 10 is a block diagram, which illustrates decoder input circuit 402 in greater detail. Decoder input circuit 402 includes 20-bit code word register 410, RDS valuator 412 and input multiplexer 414. The rising edge of WORD CLOCK is used to clock the 20-bit code word W19 : o into register 410. RDS valuator 412 calculates the running digital sum of the latched code word WM19:0 and generates a selective inversion signal SI if the running digital sum is less than zero. The RDS of code word W m1g : o is : RDS = (2*HW)-20, where HW is the Hamming weight of wm19:0.

If (RDS<0), then SI = 1 ; else,. SI = 0.

Input multiplexer 414 selectively inverts the code word wm19 : o as a function of signal SI, and separates the bits iato the g-group code segment gcp9:0 and the j- group code segment jcp9 : o. Input multiplexer 414 also substitutes the pattern OxAAAAA for OxCG3F3 and the pattern 0#55555 for the pattern 0#C03FC, which where eliminated during encoding to avoid undesirable strings of code words.

An example of the input multiplexer operation is shown in FIG. 10A.

Table 12 illustrates the logical operations performed by input multiplexer 414, according to one embodiment of the present invention.

Table 12 INPUT MUX if (wm (19 : 0) ==OxC03F3) wm (19 : 0) = OXAAAAA ; if (wm (19 : 0) ==OxC03FC) wm (19 : 0) = Ox55555 ; if (SI=0) {gcp (9 : 0) = wm (19 : 10) ; jcp (9 : 0) = wm (9 : 0) ;} else {gcp (9 : 0) = ! wm (19 : 10) ; jcp (9 : 0) = ! wm (9 : 0) ;}

FIG. 11 is a block diagram, which illustrates g-group decoder 404 in greater detail. G-group decoder 404 includes a digital sum circuit 420, which generates a five-bit signed value gds4 : o representing the digital sum of gcp9 : o. The possible values of gds4 : o are 8,6, 4,2, 0, -2,-4,-6 and-8. If the digital sum is less than 0, inverter circuit 422 inverts gcp9 : o to generate gwg : o.

Pattern generator 424 generates a 36-bit pattern that identifies one of the 36 possible g-subgroups with which gws : o can belong, as defined by Table 2 above.

G-subgroup decoders 426 receive g-group code segment gws : o and decodes the segment according to the 36-bit subgroup select pattern and generates a corresponding g-subgroup data word fragment and G-type for output multiplexer 428. Output multiplexer 428 selects the data word fragment and the G-type from the appropriate g-subgroup decoder 426 based on the g-subgroup select signal gds4 : o.

Table 13 illustrates the logical operation performed by some of the elements in g-group decoder 404, according to one embodiment of the present invention.

Table 13 GX Decoder Input : gcp (9 : 0) Output : gdw (6 : 0), Gtype (7 : 0), gm (3 : 0) get ds Input : gcp (9 : 0) Output : gds (4 : 0) gds (4 : 0) is a 5-bit signed value representing the digital sum of gcp (9 : 0). The possible values of gds (4 : 0) are 8, 6, 4, 2, 0,-2,-4,- 6, and-8. Let HW be the Hamming weight of gcp (9 : 0), then gds (4 : 0) = (2*HW)-10 Inverter Input : gcp (9 : 0), gds (4 : 0) Output : gw (9 : 0) If (gds>= 0) {gw (9 : 0) = gcp (9 : 0)} else {gw (9 : 0) = Mgcp (9 : 0)} gen p10 Input : A (9 : 0) Output : x (3 : 0), y (15 : 0), z (15 : 0) x [3] =A9&A8 ; x [2] =A9& ! A8 ; x [1] = ! A9&A8 ; x [0] = ! A9& ! A8 ; y [15] = A7& A6& A5& A4 ; z [15] = A3& A2& A1& AO ; y [14] = A7& A6& A5& ! A4 ; z [14] = A3& A2& Al& ! AO ; y [13] = A7& A6& ! A5& A4 ; z [13] = A3& A2& ! A1& AO ; y [12] = A7& A6&'A5&'A4 z [12] = A3& A2& ! Al& ! AO ; y [11] = A7& ! A6& A5& A4 ; [ll] = A3& ! A2& A1& AO ; yE10] = A7& ! A6& A5& ! A4 z [10] = A3& ! A2& A1& ! AO ; y 9] = A7& ! A6& ! A5& A4 ; zE 9] = A3& ! A2& ! A1& AO ; y 8] = A7& ! A6& ! A5& ! A4 ; z [8] = A3& ! A2& ! Al& ! AO ; y [7] = ! A7& A6& A5& A4 ; z 7] = ! A3& A2& A1& AO ; y [6] = ! A7& A6& A5& ! A4 ; z [6] = ! A3& A2& Al& ! AO ; y [5] ='A7& A6&'A5& A4 ; z 5] = ! A3& A2& ! A1& AO ; y [4] = ! A7& A6& ! A5& ! A4 ; z [4] = ! A3& A2& ! Al& ! AO ; y 3] = ! A7& ! A6& A5& A4 ; z ='A3& ! A2& A1& AO ; y 2] = ! A7& ! A6& A5& ! A4 ; zE 2] = ! A3& ! A2& Al& ! AO ; y [1] = ! A7& ! A6& ! A5& A4 ; z [1] = ! A3& ! A2& ! Al& AO ; y [01=IA7& ! A6& ! A5& ! A4 ; zE 0] = ! A3& ! A2& ! Al& ! AO ; FIG. 12 is a block diagram, which illustrates"gb-"subgroup decoder 426 in greater detail. The gb-subgroup decoder 426 includes pattern decode circuit 440,

gb-subgroup decoders 442 and multiplexer 444. Pattern decode circuit 440 generates a 6-bit select signal gb, which identifies the gb-subgroup (e. g. , gb6) to which the g-group code segment gwo : o belongs. Pattern decode circuit 440 also generates a three-bit signal gp20, ldvhich helps decode subgroups gb6 and gb7.

The gb-subgroup decoders 442 decode gus : o into corresponding data word fragments according to Table 2. Multiplexer 444 selects the appropriate data word fragment from the appropriate gb-subgroup based on the select signal gb provided by pattern decode circuit 440. Multiplexer 444 also generates a gb-type output GBGT7 : o, which identifies the corresponding G-type that is selected by multiplexer 428 in FIG. 11.

Table 14 illustrates the logical operations performed by gb-subgroup decoder 426.

Table 14 dec gb Input : gw (9 : 0), x (3 : 0), y (15 : 0), z (15 : 0) Output : gbdw (6 : 0), gbgt (7 : 0) Pattern Decode Input : x (3 : 0), y (15 : 0), z (15 : 0) Output : gb7, gb6, gb5, gb4, gb3, gb2, gp (2 : 0) gb7= (xf2) xfll) & ! (YfOYLlSI f71) gb5= (xL3l xLOI) & (YLlOI Yf9l yf6l Yf5l) ; gb4= (xf3lLOI) & (yLl5lYLOlzflSlLOI) gb6= (x [3] |x [0]) & ! (gb5|gb4) ; gb4= (x [3] x [0]) & (y [7]) ; gb6= (x [31 x [01) & ! (gb51gb4) ; gb3= (x [2] x [1]) & (z [7]) ; gb2= (xf2l xLll) & (YL151 Y OI) : if (gb7) {gp f1l= YLlI YL2l Yf4l YL8l ; gp [2] = z [l]) z [2] z [4] z [8] ; gp Ol= ! (gp ll gp [2]) ; } if (gb6) {gp fol= = z [l] lz [2] lz [4] lz [8] gp [1] zu4l z (131 zWl z f7 ; ) dec gb7 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO, gp (2 : 0) Output : D6, D5, D4, D3, D2, Dl, DO gb7a= gp [0] ; gb7b= gp [1] ; gb7c= gp [2] ; gb7a5= gb7a& (A7& ! A4) ; gb7a4= gb7a & (A7 ! A4 gb7a3= gb7a & ! A5 ; gb7a2= gb7a & A3 ; gb7al= gb7a & (A2 ! AO gb7aO= gb7a & (A3 A A1 gb7b5= gb7b & ! AO ; gb7b4=-gb7b & ! A1 ; gb7b3= gb7b & (A7 | A6 gb7b2= gb7b & (A7 A5 gb7bl= 0 ; gb7bO= 0 ; gb7c5= gb7c ; gb7c4= gb7c ; gb7c3= gb7c & (A3 A2 gb7c2= gb7c & (A3 Al gb7cl= gb7c & ( ! A5 ! A4 gb7cO= gb7c & (lA6 | lA4 D6 = A8 ; D5 = gb7a5 |gb7b5 Igb7c5 ; D4 = gb7a4 Igb7b4 |gb7c4 ; D3 = gb7a3 |gb7b3 |gb7c3 ; D2 = gb7a2 |gb7b2 |gb7c2 ; D1 = gb7al jgb7bl |gb7cl ; DO = gb7aO |gb7bO |gb7cO ; dec gb6 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO, gp (1 : 0) Output : D5, D4, D3, D2, Dl, DO gb6a= gp [O] ; gb6b= ! gb6a ; if ( ! A9) {A7= ! A7 ; A6= ! A6 ; A5= ! A5 ; A3= ! A3 ; A2= ! A2 ; A1= ! A1 ; AO= ! AO ; gb6a= gp [1] ; gb6b= ! gb6a ; }. gb6a4= gb6a & A7 ; gb6a3= gb6a A3 A2 gb6a2= gb6a A3 Al gb6al= 0 ; gb6aO= 0 ; gb6b4= gb6b & (A7 A6 gb6b3= gb6b & (A7 | A5) gb6b2= gb6b & A3 ; gb6bl= gb6b & (A2 ! AO gb6bO= gb6b & (A3 Al D5 = ! A9 ; D4 = gb6a4 |gb6b4 ; D3 = gb6a3 gb6b3 ; D2 = gb6a2 gb6b2 ; D1 = gb6al Igb6bl ; DO = gb6aO |gb6bO ; dec gb5 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO Output : D4, D3, D2, Dl, DO if ( ! A9) {A7= ! A7 ; A5= ! A5 ; A3= ! A3 ; A2= ! A2 ; Al= ! Al ; } D4= ! A9 ; D3= A7 ; D2= A5 ; D1= A3 A2 DO= A3 Al dec gb4 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO Output : D3, D2, Dl, DO if ( ! A8) {A9= ! A9 ; A7= ! A7 ; A6= ! A6 ; A5= ! A5 ; A4= ! A4 ; A2= ! A2 ; Al= ! Al ; AO= ! AO ; } D3= ! A8 ; D2= (A7 I A6) ; D1= (A9 & ((A5 A A4) | (A1 AO))) ; DO= (A9 & ( (A6"A4) (A2 AO))) ; dec gb3 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO Output : D2, D1, DO D2= A9 ; D1= (A7 | A6) ; DO= (A7 | A5) ; dec gb2 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO Output : D1, DO D1= A7 ; DO= A9 ; Mux gb Input : gb7D (6 : 0), gb6D (5 : 0), gb5D (4 : 0), gb4D (3 : 0), gb3D (2 : 0), gb2D (1 : 0) gb7, gb6, gb5, gb4, gb3, gb2 Output : gbdw (6 : 0), gbgt (7 : 0) if (gb7) {gbdw (6 : 0) = gb7D (6 : 0), gbgt (7 : 0) = [0, 0, 0, 0, 0, 1, 1, 1]} if (gb6) {gbdw (5 : 0) = gb6D (5 : 0), gbdw (6) = 0, gbgt (7 : 0) = [0, 0, 0, 0, 0, 1, 1, 0]} if (gb5) {gbdw (4 : 0) = gb5D (4 : 0), gbdw (6 : 5) = [0, 0], gbgt (7 : 0) = [0, 0, 0, 0, 0, 1, 0, 1] if (gb4) {gbdw (3 : 0) = gb4D (3 : 0), gbdw (6 : 4) = [0, 0, 0], gbgt (7 : 0) = [0, 0, 0, 0, 0, 1, 0, 0]} if (gb3) {gbdw (2 : 0) = gb3D (2 : 0), gbdw (6 : 3) = [0, 0, 0, 0], gbgt (7 : 0) = [0, 0, 0, 0, 0, 0, 1, 1] if (gb2) {gbdw (1 : 0) = gb2D (1 : 0), gbdw (6 : 2) = [0, 0, 0, 0, 0], gbgt (7 : 0) = [0, 0, 0, 0, 0, 0, 1, 0]} Note : In gbgt (7 : 0) = [0, 0, 0, 0, 0, 1, 1, 1], the leading bit or leftmost bit is bit 7 and the trailing bit or rightmost bit is bit 0.

FIGS. 13-16 illustrate gc-, gd-, ge-, and gf-subgroup decoders 426, respectively, in greater detail. These subgroup decoders operate similar to the gb- subgroup decoder shown and described with respect to FIG. 12. The logical operations performed by the gc-, gd-, ge-, and gf-subgroup decoders shown in FIGS. 13-16 are illustrated in Tables 15-18, respectively.

Table 15 dec gc Input : gw (9 : 0), x (3 : 0), y (15 : 0), z (15 : 0) Output : gcdw (6 : 0), gcgt (7 : 0) Pattern Decode Input : x (3 : 0), y (15 : 0), z (15 : 0) Output : gc7, gc6, gc4, gcl, gp (5 : 0) gc7= x [2] Ix [1] | (x [0] & ( ! y [15] & ! z [15])) ; gc6= x [3] & (! z [0] & ! z [7] & ! z [15]) ; gc4= (x [0] & (y [15] lz [15])) I (x [3] &z [7]) ; gcl= x [3] & (z [0] z [15]) ; if (gc7) {gp [0] = (x [2] lx [1]) & (z [14] z [13] lzE11] lz [7]) ; 3pfll= (xf21 xfl7) & (Yfl4] Y fl3l YLlll Y f7l) : gp [2] = (x [2] x [1]) &z [15] ; gp [31= x [0] & (! y [15] | ! z [15]) ; gp [4] = (x [0] & (z [13] z [14])) ; } if (gc6) {gp [O] = x [3] & (z [3] lz [5] lz [6] lz [9] lz [10] lz [12]) ; gp [1] = x [3] & (z [llllz [13] lz [141) ; gp [2] = x [3& (zLll zL2l z [47 L81) : } if (gc4) {gp [0] = x [0] &z [15] ; gp all x [3] &z [7] ; } dec gc7 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO, gp (4 : 0) Output : D6, D5, D4, D3, D2, Dl, DO gc7a = gp [0] ; gc7b = gp [1] ; gc7cd= gp [2] ; gc7e = gp [3] ; gc7a5= 0 ; gc7a4= gc7a & (A7 A ! A6 gc7a3= gc7a & (A7 & ! A6) ; gc7a2= gc7a & ! A4 ; gc7al= gc7a & ( ! Al ! AO gc7aO= gc7a & (lA2 | lAO) ; gc7b5= gc7b & (A3 A A2) ; gc7b4= gc7b & (A3 lA2) ; gc7b3= gc7b & (A3 ! A2) ; gc7b2= gc7b & ! AO ; gc7bl= gc7b & ( ! A5 ! A4) ; gc7bO= gc7b & ( ! A6 ! A4) ; gc7cd5 = gc7cd ; gc7cd4 = gc7cd ; gc7cd3= 0 ; gc7cd2 = gc7cd & ( ! A3 | ! A2) ; gc7cdl= gc7cd& ((! A7 & (A7 A 6) A7 & (Al AO) gc7cd0= gc7cd& ( ( A7 & (A7 ^ A6)) | (A5 & (A2 ^ lAO))) ; gc7e5= gc7e ; gc7e4= gc7e ; gc7e3= gc7e ; gc7e2= gc7e & ( | lAO) ; gc7el= gc7e & ( ! A 5 | ! A4) ; gc7eO= gc7e & ( ! A6 ! A4 D6 = A8 | gp [4] ; D5 = g c7a5 gc7b5 gc7cd5 gc7e5 ; D4 = gc7a4. lgc7b4 gc7cd4 Igc7 e4 ; D3 = gc7a3 gc7b3) gc7cd3 gc7e3 D2 = g c7a2 Igc7b2 Igc7cd2 gc7 e2 ; D1 = g c7al | gc7bl | gc7cdl | gc7 el ; DO = gc7aO |gc7bO |gc7cdO |gc7eO ; dec gc6 Input : A9, A8, A7, A6, A5, A4, A3, A2, A1, AO, gp (4 : 0) Output : D5, D4, D3, D2, Dl, DO gc6a = gp [o] ; gc6b = gp [1] ; gc6c = gp [2] ; gc6a5= gc6a & (A7 & ! A4) ; gc6a4= gc6a & (A7 ^ lA4) gc6a3= gc6a & ! A5 ; gc6a2= gc6a & A3 ; gc6al= gc6a & (A2 I ! AO gc6a0= gc6a & (A3 A Al gc6b5= gc6b & ! AO ; gc6b4= gc6b & ! A1 ; gc6b3= gc6b & (A7 A6) ; gc6b2= gc6b & (A7 A5 gc6bl= 0 ; gc6bO= 0 ; gc6c5= gc6c ; gc6c4= gc6c ; gc6c3= gc6c & (A3 A2 gc6c2= gc6c & (A3 Al gc6cl= gc6c & ( ! A5 ! A4 gc6cO= gc6c & ( | lA4) ; D5 = gc6a5 gc6b5 gc6c5 ; D4 = gc6a4 gc6b4 gc6c4 ; D3 = gc6a3 gc6b3 gc6c3 ; D2 = gc6a2 gc6b2 gc6c2 ; D1 = gc6al gc6bl gc6cl ; DO = gc6aO gc6bO gc6cO ; dec gc4 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO, gp (4 : 0) Output : D3, D2, D1, DO gc4ab= gp [0] ; gc4c = gp [1] ; gc4ab3= gc4ab & ( | tA2 | SA1) ; gc4ab2 = gc4ab & (A7 & A3) ; gc4abl= gc4ab& (! A4 | (! AO | (A6 & A2))) ; gc4abO= gc4ab& (! A9 & ((A7 A A5) | (A3 A A1))) ; gc4c3= gc4c & (A7 | A6) ; gc4c2= gc4c & (A7 AS gc4cl= 0 ; gc4cO= 0 ; D3 = gc4ab3 | gc4c3 ; D2 = gc4ab2 gc4c2 ; Dl = gc4abl gc4cl ; DO = gc4abO lgc4cO ; dec gcl Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO Output : DO DO= A7 ; Mux gc Input : gc7D (6 : 0), gc6D (5 : 0), gc4D (3 : 0), gclD (0) gc7, gc6, gc4, gcl Output : gcdw (6 : 0), gcgt (7 : 0) if (gc7) {gcdw (6 : 0) = gc7D (6 : 0), gcgt (7 : 0) = [0, 0, 0, 1, 0, 1, 1, 11 if (gc6) {gcdw (5 : 0) = gc6D (5 : 0), gcdw (6) = 0, gcgt (7 : 0) = [0, 0, 0, 1, 0, 1, 1, 0]} if (gc4) {gcdw (3 : 0) = gc4D (3 : 0), gcdw (6 : 4) = [0, 0, 0] gcgt (7 : 0) = [0, 0, 0, 1, 0, 1, 0, 0]} if (gcl) {gcdw (0) = gclD (O), gcdw (6 : 1) = [0, 0, 0, 0, 0, 0] gcgt (7 : 0) = [0, 0, 0, 1, 0, 0, 0, 11 Table 16 tS dec gd Input : gw (9 : 0), x (3 : 0), y (15 : 0), z (15 : 0) Output : gddw (6 : 0), gdgt (7 : 0) Pattern Decode Input : x (3 : 0), y (15 : 0), z (15 : 0) Output : gd6, gd5, gd4, gd3, gp (3 : 0) gd6= x [3] Ix [0] ; gd5= (x [2] x [l]) & ( ! y [15] & ! z [15]) ; gd4= (x [2] lx [1]) & ( (y [15] & (! z [3] & ! z [12])) | (z [15] & (! y [3] & ! y [12]))) gd3= (x [2] lx [1]) & ( (y [15] & (z [3] | z [12])) | (z [15] & (Y [3] | y [12]))) ; if (gd6) {gp [O] = z [7] lz [11] lz [13] lz [14] ; gpLll = YL7l IYlll Yl3l YLl4l : gp [2] = x [3] & (y [15] lz [15]) ; gp [3] = x [0] & (y [15] z [15]) ; } dec gd6 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO, gp (3 : 0) Output : D5, D4, D3, D2, Dl, DO gd6a = gp [O] ; gd6b = gp [1] ; gd6cd= gp [2] ; gd6ef= gp [3] ; gd6a5= 0 ; gd6a4= gd6a & (A7 A lA6) ; gd6a3= gd6a & (A7 & MA6) ; gd6a2= gd6a & ! A4 ; gd6al= gd6a & ( ! Al ! AO gd6aO= gd6a & ( ! A2 ! AO gd6b5= gd6b & (A3 A2 gd6b4= gd6b & (A3 ! SA2) ; gd6b3= gd6b & (A3 ! A2 gd6b2= gd6b & ! AO ; gd6bl= gd6b & ( | MA4) ; gd6bO= gd6b & ( | SA4) ; gd6cd5= gd6cd ; gd6cd4= gd6cd gd6cd3= 0 ; gd6cd2= gd6cd & ( | lA2) ; gd6cdl= gd6cd& (A9 & ( (A7 A6) | (A3 ^ A2))) ; gd6cdO= gd6cd& (A9 & ( (A7 A5) (A3 Al)) gd6ef5= gd6ef gd6ef4= gd6ef ; gd6ef3= gd6ef ; gd6ef2= gd6ef & ( ! A3 ! A2 ! Al ! AO gd6efl= gd6ef & ( ! AS lA4 ! Al ! AO gd6efO= gd6ef & ( ! A6 lA4 ! A2 ! AO D5 = gd6a5 |gd6b5 |gd6cd5 jgd6ef5 D4 = = gd6a4 |gd6b4 |gd6cd4 |yd6ef4 ; D3 = gd6a3 |gd6b3 gd6cd3 |gd6ef3 ; D2 = gd5a2 |gd6b2 |gd6cd2 |gd6ef2 ; Dl = gd6al ! gd6bl |gd6cdl |gd6efl ; DO = gd6aO jgd6b0 jgd6cd0) gd6ef0 dec gd5 Input : A9, A8, A7, A 6, A5, A4, A3, A 2, Al, AO Output : D4, D3, D2, D1, DO D4= lA9 ; D3= (tA1 |'AO) ; D2= ! A2 ! AO Dl= ('AS ! ! A4) ; DO= (A6 ! lA4) ; . _ |dec gd4 Input : A9, A8, A7, A 6, A5, A4, A3, A 2, Al, AO Output : D3, D2, D1, DO D3= ! A3 ! A2 D2= A9 ; 171= ( ! A6 I ! A2) : DO= lA4 ! AO dec gd3 Input : A9, A8, A7, A6, A5, A4, A3, A2, A1, AO Output : D2, Dl, DO D2 = ( ! A3 ! Al D1 = A9 ; DO = ( ! A5 ! Al Mux gd Input : gd6D (5 : 0), gd5D (4 : 0), gd4D (3 : 0), gd3D (2 : 0) gd6, gd5, gd4, gd3 Output : gddw (6 : 0), gdgt (7 : 0) if (gd6) {gddw (5 : 0) = gd6D (5 : 0), gddw (6) = 0, gdgt (7 : 0) = [0, 0, 1, 0, 0, 1, 1, 0]} if (gd5) {gddw (4 : 0) = gd5D (4 : 0.), gcdw (6 : 5) = [0, 0], gdgt (7 : 0) = [0, 0, 1, 0, 0, 1, 0, 11 if (gd4) {gddw (3 : 0) = gd4D (3 : 0), gcdw (6 : 4) = [0, 0, 0], gdgt (7 : 0) = [0, 0, 1, 0, 0, 1, 0, 0]} if (gd3) {gddw (2 : 0) = gd3D (2 : 0), gcdw (6 : 3) = [0, 0, 0, 0], gdgt (7 : 0) = [0, 0, 1, 0, 0, 0, 1, 11 Table 17 decode Input : gw (9 : 0),. x (3 : 0), y (15 : 0), z (15 : 0) Output : gedw (6 : 0), gegt (7 : 0) Pattern Decode Input : x (3 : 0), y (15 : 0), z (15 : 0) Output : ge5, ge3, gp (1 : 0) ge5= x [2llx [ll : LL31& ( ! Y [15l& ! z [151 ge3= x [3] & (y [151 z [151 & ( ! (y [3] |y [12] |z [3] |z [12])) ; ge2= x [3] & (y [15] lz [15]) & ((y [3] Iy [12] I z [311 z [121 geO= x [0] ; if (ge5) {gpfOl = x [3] ; gp [1] = y [15] z [15] ; } dec ge5 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO, gp (1 : 0) Output : D4, D3, D2, Dl, DO ge5a = gp [0] ; ge5bc= gp [l] ; ge5a4= 0 ; ge5a3= ge5a & ( ! A5 ! A4 ge5a2= ge5a & ( | tA4) ; ge5al= ge5a & ( ! Al ! AO ge5aO= ge5a & ( ! A2 ! AO ge5bc4= ge5bc ; ge5bc3= ge5bc & (lA3 ! A2 ! Al ! AO ge5bc2 = ge5bc & A9 ; ge5bcl= ge5bc & ( ! A5 ! A4 ! Al ! AO ge5bcO= ge5bc & ( ! AG ! A4 ! A2 ! AO D4 = ge5a4 ge5bc4 ; D3 = ge5a3 |ge5bc3 ; D2 = ge5a2 |ge5bc2 ; D1 = ge5al |ge5bcl ; DO = ge5aO |ge5bcO ; dec ge3 Input : A9, A8, A7, A 6, A5, A4, A3, A2, Al, AO Output : D2, D1, DO D2= ! A3 ! A2 D1= ! A6 ! A2 DO= ! A4 ! AO dec Input : A9, A8, A7, A 6, A5, A4, A3, A 2, Al, AO Output : D1, DO D1= ! A3 ! Al DO= ! A5 ! Al Mux ge Input : ge5D (4 : 0), ge3D (2 : 0), ge2D (1 : 0) ge5, ge3, ge2, geO Output : gedw (6 : 0), gegt (7 : 0) if (ge5) (gedw (4 : 0) = ge5D (4 : 0), gedw (6 : 5) = [0, 0], gegt (7 : 0) = [0, 0, 1, 1, 0, 1, 0, 1] if (ge3) {gedw (2 : 0) = ge3D (2 : 0), gedw (6 : 3) = [0, 0, 0, 0], gegt (7 : 0) = [0, 0, 1, 1, 0, 0, 1, 1] if (ge2) {gedw (1 : 0) = ge2D (1 : 0), gedw (6 : 2) = [0, 0, 0, 0, 0], gegt (7 : 0) = [0, 0, 1, 1, 0, 0, 1, 0]} if (ge0) {gedw (6 : 0) = [0, 0, 0, 0, 0, 0, 0], gegt (7 : 0) = [0, 0, 1, 1, 0, 0, 0, 0]} Table 18 dec f Input : gw (9 : 0), x (3 : 0), y (15 : 0), z (15 : 0) Output : gfdw (6 : 0), gfgt (7 : 0) Pattern Decode Input : x (3 : 0), y (15 : 0), z (15 : 0) Output : gp (1 : 0) gf3= x [3] ; gfl= ! x [3] ; dec gf3 Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO, gp (1 : 0) Output : D2, D1, DO D2= ( ! A3 ! A2 I ! A1 ! AO) : D1= ( ! A5 ! A4 ! A1 ! AO) ; DO= ( ! A6 j ! A4) ! A2) ! AO) ; dec gfl Input : A9, A8, A7, A6, A5, A4, A3, A2, Al, AO Output : DO DG= A9 ; Mux gf Input : gf3D (2 : 0), gflD (O) gf3, gfl Output : gfdw (6 : 0), gfgt (7 : 0) if (gf3) {gfdw (2 : 0) = gf3D (2 : 0), gfdw (6 : 3) = [0, 0, 0, 0], gfgt (7 : 0) = [0, 1, 0, 0, 0, 0, 1, 1] if (gfl) {gfdw (0) = gflD (0), gfdw (6 : 1) = [0, 0, 0, 0, 0, 0], gfgt (7 : 0) = [0, 1, 0, 0, 0, 0, 0, 11 GX Output Mux Input : gbdw (6 : 0), gcdw (6, 0), gddw (6, 0), gedw (6, 0), gfdw (6, 0), gbgt (7 : 0), gcgt (7, 0), gdgt (7, 0), gegt (7, 0), gfgt (7, 0), gds (4 : 0) Output : gdw (6 : 0), Gtype (7 : 0), gm (3 : 0) if (gds==0) {gdw (6 : 0) =gbdw (6 : 0) ; Gtype (7 : 0) =gbgt (7 : 0) ; if (gds==2) (gdw (6 : 0) =gcdw (6 : 0) ; Gtype (7 : 0) =gcgt (7 0) ;} if (gds==4) {gdw (6 : 0) =gddw (6 : 0) ; Gtype (7 : 0) =gdgt (7 : 0) ; ? if (gds==6) {gdw (6 : 0) =gedw (6 : 0) ; Gtype (7 : 0) =gegt (7 : 0) ; if (gds==8) {gdw (6 : 0) =gfdw (6 : 0) ; Gtype (7 : 0) =gfgt (7 : 0) ;} if (gds==-2) {gdw (6 : 0) =gedw (6 : 0) ; Gtype (7 0) =gcgt (7 0)) 0x80 ;} if (gds==-4) {gdw (6 : 0) =gddw (6 : 0) ; Gtype (7 : 0) =gdgt (7 0)) 0x80 ;} if (gds==-6) {gdw (6 : 0) =gedw (6 : 0) ; Gtype (7 : 0) =gegt (7 : 0) 1 Ox8O ; if (gds==-8) {gdw (6 : 0) =gfdw (6 : 0) ; Gtype (7 : 0) =gfgt (7 : 0) |0x80 ;} gm (3 : 0) =Gtype (7 : 4) ;

FIG. 17 is a block diagram, which illustrates j-group decoder 406 (shown in FIG. 9) in greater detail. J-group decoder 406 includes input circuit 500, j- subgroup decoders 502 and output multiplexer 5Q4. Input circuit 500 receives the j-group 10-bit code segment jcp9 : o and the most significant four bits gm3 : o of the G- type from g-group decoder 404 (shown in FIG. 9). Input circuit 500 generates a 10-bit j-group word segment jW9 : o, which is selectively inverted, and generates a five-bit digital sum value jds40 for the segment and a 36-bit subgroup select signal XYZ. J-subgroup decoders 502 decode the j-group code segment jw9 : o based on the XYZ select signal and the definitions provided in Table 2. J-subgroup decoders 502 are identical to g-subgroup decoders 426 shown in FIG. 11. Output circuit 504 selects the appropriate output from j-subgroup decoders 502 to form the j-group user data word fragment jdw7 : o and the corresponding J-type70.

FIG. 18 is a block diagram, which illustrates input circuit 500 in greater detail. Input circuit 500 includes inverters 510 and 512, digital sum calculator 514 and pattern generator 516. Inverter 500 selectively inverts the j-group code segment jcp9 : o as a function of the G-type bits gm3 : o and produces a selectively inverted output jumbo. Digital sum calculator 514 calculates the digital sum, jds40, of jug : o, wherein the possible values of jds40 are 10,8, 6,4, 2,0,-2,-4,-6 and-8. If jds4 : o is less than zero, ju9 : o must be inverted again, and invert select signal nj is activated. Inverter 512 selectively inverts ju#: o as a function of the signal nj and produces the j-group code segment jw9 : o for decoding. Pattern generator 516 generates a 36-bit select pattern XYZ based on the pattern formed by jw9 : o.

Table 19 illustrates the logical operations performed by input circuit 500, according to one embodiment of the present invention.

Table 19 INV A Input : jcp (9 : 0), gm (3 : 0) Output : ju (9 : 0) ju (9 : 0) = jcp (9 : 0) ; if (gm (3 : 0) == Ox2) {ju (9 : 0) = ! jcp (9 : 0) ;} if (gm (3 : 0) == Ox3) {ju (9 : 0) = ! jcp (9 : 0) ;} if (gm (3 : 0) == Ox9) {ju (9 : 0) = ! jcp (9 : 0) ;} get jds Input : ju (9 : 0) Output : nj, jds (5, 0) getjds calculates the digital sum of ju (9 : 0) Let HW be the Hamming weight of ju (9 : 0), then its digital sum, jds = (2*HW)-10 The possible values of jds (4 : 0) are 10, 8, 6, 4, 2, 0,-2,-4,-6, and- 8. if (jds < 0) nj=l ; else nj=O ; INV B Input : ju (9 : 0), nj Output : jw (9 : 0) if (nj == 1) jw (9 : 0) = ! ju (9 : 0) else {jw (9 : 0) = ju (9 : 0) ;} gen pl0 is the same as that in GX Decoder.

Table 20 illustrates the logical operations performed by j-group output circuit 504 shown in FIG. 17.

Table 20 JX Output Input : gbdw (6 : 0), gcdw (6 : 0), gddw (6 : 0), gedw (6 : 0), gfdw (6 : 0), gbgt (7 : 0), gcgt (7 : 0), gdgt (7 : 0), gegt (7 : 0), gfgt (7 : 0), gm (3 : 0), jds (4 : 0) Output : jdw (7 : 0), j t (7, 0) if (gm (3 : 0) = Ox0) or (gm (3 : 0) = Ox3) {if (jds= 0) {if (gbgt =-Ox07) {jdw (7 : 0) = (gbdw (6 : 0) &Ox7F) ; jt=Ox08 ;} if (gbgt == Ox06) {jdw (7 : 0) = (gbdw (6 : 0) &Ox3F) |Ox80 ; jt=Ox08 ;} if (gbgt == Ox05) {jdw (7 : 0) = (gbdw (6 0) &OxlF) OxCO ; jt=Ox08 ;} if (gbgt == Ox04) {jdw (7 : 0) = (gbdw (6 0) &OxOF) OxEO ; jt=Ox08 ;} if (gbgt == Ox03) {jdw (7 : 0) = (gbdw (6 0) &Ox07) OxFO ; jt=Ox08 ;} if (gbgt === 0x02) {jdw (7 : 0) = (gbdw (6 : 0) &Ox03) ; jt=ox03i} if (jds= 6) {if (gegt == ou35) {jdw (7 : 0) = (gedw (6 : 0) &OxlF) ; jt=Ox05 ;} if (gegt == Ox33) {jdw (7 : 0) = (gedw (6 : 0) &Ox07) |0xF8 ; jt=Ox08 ;} if (gegt == 0x32) {jdw (7 : 0) = (gedw (6 : 0) &Ox03) |0x04 ; jt=Ox03 ;} if (gegt == Ox30) {jdw (7 : 0) = (OxOO) ; jt=Ox00 ;} } if (gm (3 : 0) = Ox3) {jt = (jt&OxOF) IOx30 ; } if (gm (3 : 0) = Ox1) or (gm (3 : 0) = Ox2) {if (jds=-2) {if (gcgt == Oxl7) {jdw (7 : 0) = (gcdw (6 : 0) &Ox7F) ; jt=Oxl8 ;} if (gcgt == Oxl6) {jdw (7 : 0) = (gcdw (6 : 0) &Ox3F) |Ox80 ; jt=Oxl8 ;} if (gcgt == Ox14) {jdw (7 : 0) = (gcdw (6 : 0) &OxOF) |Ox20 ; jt=Oxl6 ;} if (gcgt Oxll) jdw (7 : 0) = (gcdw (6 : 0) &OxO1) ; jt=Oxll ;} } if (jds= 4) {if (gdgt == Ox26) {jdw (7 : 0) = (gddw (6 : 0) &Ox3F) OxCO ; jt=Oxl8 ;} if (gdgt == Ox2 5) {jdw (7 : 0) = (gddw (6 : 0) &OxlF) ; jt=Ox16 ;} if (gdgt == Ox24) {jdw (7 : 0) = (gddw (6 : 0) &OxOF) |Ox30 ; jt=Oxl6 ;} if (gdgt == Ox23) {jdw (7 : 0) = (gddw (6 : 0) &Ox07) ; jt=Oxl3 ;} } if (gm (3 : 0) = Ox2) {jt = (jt&OxOF) |ox20 ;} } if (gm (3 : 0) == Ox4) or (gm (3 : 0) = Ox9) {if (jds=-2) {if (gcgt == 7) {jdw (7 : 0) = (gcdw (6 : 0) &Ox7F) ; jt=Ox47 ;} if (gcgt == Ox16) {jdw (7 : 0) = (gcdw (6 : 0) &Ox3F) ; jt=Ox46 ;} if (gcgt == 0x14) {jdw (7 : 0) = (gcdw (6 : 0) &OxOF) ; jt=Ox44 ;} if (gcgt == 0x11) {jdw (7 : 0) = (gcdw (6 : 0) &0xO1) ; jt=Ox42 ;} } if (jds=-8) {if (gfgt == ou43) {jdw (7 : 0) = (gfdw (6 : 0) &0x07) ; jt=Ox43 ;} if (gfgt == Ox41) {jdw (7 : 0) = (gfdw (6 : 0) &Ox01) |OxO2 ; jt=Ox42 ;} } if (gm (3 : 0) = Ox9) {jt = (jt&OxOF) IOx90 ; } if (gm (3 : 0) = OxA) {if (jds= 4) {if (gdgt = Ox26) {jdw (7 : 0) = (gddw (6 : 0) &Ox3F) ; jt=OxA6 ;} if (gdgt = Ox25) {jdw (7 : 0) = (gddw (6 : 0) &OxlF) ; jt=OxA5 ;} if (gdgt = Ox24) {jdw (7 : 0) = (gddw (6 : 0) &OxOF) ; jt=OxA4 ;} if (gdgt = Ox23) {jdw (7 : 0) = (gddw (6 : 0) &0x07) ; jt=OxA3 ;} } if (jds= 10) {jdw (7 : 0) = (OxOO) ; jt=OxAO ; } if (gm (3 : 0) = OxB) {if (gegt = Ox35) {jdw (7 : 0) = (gedw (6 : 0) &OxlF) ; jt=OxB5 ;} if (gegt = Ox33) {jdw (7 : 0) = (gedw (6 : 0) &0x07) ; jt=OxB3 ;} if (gegt = Ox32) {jdw (7 : 0) = (gedw (6 : 0) &0x03) ; jt=OxB2 ;} if (gegt = Ox30) {jdw (7 : 0) = (0x00) ; jt=oxBO ;} } if (gm (3 : 0) = OxC) {if (gfgt = Ox43) {jdw (7 : 0) = (gfdw (6 : 0) &Ox07) ; jt=OxC3 ;} j j t=OacC3 ; if (gfgt = Ox41) {jdw (7 : 0) = (gfdw (6 : 0) &0xO1) ; jt=OxCl ;}

FIG. 19 is a block diagram, which illustrates decoder output circuit 408 (shown in FIG. 9) in greater detail. Decoder output circuit 408 combines the appropriate bits of g-group data word fragment dgw6:0 and j-group data wprd fragment jdw7:0 according to Table 4 and the values of the G-type7:0 and J-type7:0 to produce the original 18-bit user data word Ii7 : o.

Table 21 illustrates the logical operations performed by decoder output circuit 408, according to one embodiment of the present invention.

Table 21 Decoder Output Input : gdw (6 : 0), jdw (7 : 0), Gtype (7 : 0), Jtype (7 : 0) Output : 1 (18 : 0) if ( (gt==Ox07) && (jt==Ox08)) {I (17 : 15) = [0, 0, 0] ; I (14 : 8) =gdw (6 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Oxl7) && (jt==Oxl8)) {I (17 : 15) = [0, 0, 1] ; I (14 : 8) =gdw (6 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox06) && (jt==Ox08)) {I (17 : 14) = [0, 1, 0, 0] ; I (13 : 8) =gdw (5 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Oxl6) && (jt==Oxl8)) {I (17 : 14) = [0, 1, 0, 1] ; I (13 : 8) =gdw (5 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox26) && (jt==Ox28)) {I (17 : 14) = [0, 1, 1, 0] ; I (13 : 8) =gdw (5 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox97) && (jt==Ox97)) {I (17 : 14) = [0, 1, 1, 1] ; I (13 : 7) =gdw (6 : 0) ; I (6 : 0) =jdw (6 : 0) ;} if ( (gt==OxO5) && (jt==Ox08)) {I (17 : 13) = [1, 0, 0, 0, 01 ; I (12 : 8) =gdw (4 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Oxl7) && (jt==Oxl6)) {I (17 : 13) = [1, 0, 0, 0, 1] ; I (12 : 6) =gdw (6 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==Ox25) && (jt==Ox28)) {I (17 : 13) = [1, 0, 0, 1, 0] ; I (12 : 8) =gdw (4 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox35) && (jt==Ox38)) {I (17 : 13) = [1, 0, 0, 1, 1] ; I (12 : 8) =gdw (4 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox97) && (jt==Ox96)) {I (17 : 13) = [1, 0, 1, 0, 0] ; I (12 : 6) =gdw (6 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==Ox96) && (jt==Ox97)) {I (17 : 13) = [1, 0, 1, 0, 1] ; I (12 : 7) =gdw (5 : 0) ; I (6 : 0) =jdw (6 : 0) ;} if ( (gt==OxO7) && (jt==Ox05)) {I (17 : 12) = [1, 0, 1, 1, 0, 0] ; I (11 : 5) =gdw (6 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OxO4) && (jt==OxO8)) {I (17 : 12) = [1, 0, 1, 1, 0, 1] ; I (11 : 8) =gdw (3 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Oxl6) && (jt==Oxl6)) {I (17 : 12) = [1, 0, 1, 1, 1, 0] ; I (11 : 6) =gdw (5 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==Oxl4) && (jt==Oxl8)) {I (17 : 12) = [1, 0, 1, 1, 1, 1] ; I (11 : 8) =gdw (3 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox26) && (jt==Ox26)) {I (17 : 12) = [1, 1, 0, 0, 0, 0] ; I (11 : 6) =gdw (5 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==Ox24) && (jt==Ox28)) {I (17 : 12) = [1, 1, 0, 0, 0, 1] ; I (11 : 8) =gdw (3 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox96) && (jt==Ox96)) {I (17 : 12) = [1, 1, 0, 0, 1, 0] ; I (11 : 6) =gdw (5 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==OxA6) && (jt==OxA6)) {I (17 : 12) = [1, 1, 0, 0,-1, 1] ; I (11 : 6) =gdw (5 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==OxO6) && (jt==Ox05)) {I (17 : 11) = [1, 1, 0, 1, 0, 0, 0] ; I (10 : 5) =gdw (5 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==Ox03) && (jt==OxO8)) {I (17 : 11) = [1, 1, 0, 1, 0, 0, 1] ; I (10 : 8) =gdw (2 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox25) && (jt==Ox26)) {1 (17 : 11) = [1, 1, 0, 1, 0, 1, 0] ; I (10 : 6) =gdw (4 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==Ox23) && (jt==Ox28)) {I (17 : 11) = [1, 1, 0, 1, 0, 1, 1] ; I (10 : 8) =gdw (2 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox33) && (jt==Ox38)) {I (17 : 11) = [1, 1, 0, 1, 1, 0, 0] ; I (10 : 8) =gdw (2 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==Ox97) && (jt==Ox94)) {I (17 : 11) = [1, 1, 0, 1, 1, 0, 13 ; I (10 : 4) =gdw (6 : 0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==Ox94) && (jt==Ox97)) {I (17 : 11) = [1, 1, 0, 1, 1, 1, 0] ; I (10 : 7) =gdw (3 : 0) ; I (6 : 0) =jdw (6 : 0) ;} if ( (gt==OxA6) && (jt==OxA5)) {I (17 : 11) = [1, 1, 0, 1, 1, 1, 1] ; I (10 : 5) =gdw (5 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OXA5) && (jt==OXA6)) {I (17 : 11) = [1, 1, 1, 0, 0, 0, 0] ; I (10 : 6) =gdw (4 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==OX07) && (jt==OX03)) {I (17 : 10) = [1, 1, 1, 0, 0, 0, 1, 0] ; I (9 : 3) =gdw (6 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX05) && (jt==OX05)) {I (17 : 10) = [1, 1, 1, 0, 0, 0, 1, 1] ; I (9 : 5) =gdw (4 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OX02) && (jt==OX08)) {I (17 : 10) = [1, 1, 1, 0, 0, 1, 0, 0] ; I (9 : 8) =gdw (3 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==oxm) && (jt==oxis>) {I (m : 10) = [1, 1, 1, 0, 0, 1, 0, 1] ; I (9 : 3) =gdw (6 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX14) && (jt==OX16)) {I (17 : 10) = [1, 1, 1, 0, 0, 1, 1, 0] ; I (9 : 6) =gdw (3 : 0) ; I (5 : 0) =jdw (5 : 0) ; if ( (gt==OX24) && (jt==OX26)) {I (17 : 10) = [1, 1, 1, 0, 0, 1, 1, 1] ; I (9 : 6) =gdw (3 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==OX35) && (jt==OX35)) {I (17 : 10) = [1, 1, 1, 0, 1, 0, 0, 0] ; I (9 : 5) =gdw (4 : 0) ; I (4 : 0) =jdw (4 : 0) ; if ( (gt==OX32) && (jt==OX38)) {I (17 : 10) = [1, 1, 1, 0, 1, 0, 0, 1] ; I (9 : 8) =gdw (1 : 0) ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==OX43) && (jt==OX47)) {I (17 : 10) = [1, 1, 1, 0, 1, 0, 1, 0] ; I (9 : 7) =gdw (2 : 0) ; I (6 : 0) =jdw (6 : 0) ;} if ( (gt==OX97) && (jt==OX93)) {I (17 : 10) = [1, 1, 1, 0, 1, 0, 1, 1] ; I (9 : 3) =gdw (6 : 0) ; I (2 : 0) =jdw (2 : 0) : if ( (gt==OX96) && (jt==OX94)) {I (17 : 10) = [1, 1, 1, 0, 1, 1, 0, 0] ; I (9 : 4) =gdw (5 : 0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==OX94) && (jt==OX96)) {I (17 : 10) = [1, 1, 1, 0, 1, 1, 0, 1] ; I (9 : 6) =gdw (3 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==OXA6) && (jt==OXA4)) {I (17 : 10) = [1, 1, 1, 0, 1, 1, 1, 0] ; I (9 : 4) =gdw (5 : 0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==OXA5) && (jt==OXA5)) {I (17 : 10) = [1, 1, 1, 0, 1, 1, 1, 1] ; I (9 : 5) =gdw (4 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OXA4) && (jt== OXA6)) {I (17 : 10) = [1, 1, 1, 1, 0, 0, 0, 0] ; I (9 : 6) =gdw (3 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==OXB5) && (jt==oxas)) {z (m : 10) = [1, 1, 1, 1, 0, 0, 0, 1] ; I (9 : 5) =gdw (4 : 0) ; I (4 : 0) =jdw (4 : 0) ; if ( (gt==OX06) && (jt==OX03)) {I (17 : 9) = [1, 1, 1, 1, 0, 0, 1, 0, 0] ; I (8 : 3) =gdw (5 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX04) && (jt==OX05)) {I (17 : 9) = [1, 1, 1, 1, 0, 0, 1, 0, 1 I (8 : 5) =gdw (3 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OX16) && (jt==OX13)) {I (17 : 9) = [1, 1, 1, 1, 0, 0, 1, 1, 0] ; I (8 : 3) =gdw (5 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXll) && (jt==OX18)) {1 (17 : 9) = [1, 1, 1, 1, 0, 0 1, 1, il ; I (8) =gdw (0) ; I (7 : 0) =jdw (7 : 0) ; if ( (gt==OX26) && (jt==OX23)) {z (17 : 9) = [1, 1, 1, 1, 0, 1, 0, 0, 0] ; I (8 : 3) =gdw (5 : 0) ; I (2 : 0) =jdw (2 : 0) ;} ift (gt==OX23) && (jt==OX26)) {I (17 : 9) = [1, 1, 1, 1, 0, 1, 0, 0, 1] ; I (8 : 6) =gdw (2 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==OX43) && (jt==OX46)) {I (17 : 9) = [1, 1, 1, 1, 0, 1, 0, 1, 0] ; I (8 : 6) =gdw (2 : 0) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==OX97) && (jt==OX92)) {I (17 : 9) = [1, 1, 1, 1, 0, 1, 0, 1, 1] ; I (8 : 2) =gdw (6 : 0) ; I (1 : 0) =jdw (1 : 0) ;} if ( (gt==OX96) && (jt==OX93)) {1 (17 : 9) = [1, 1, 1, 1, 0, 1, 1, 0, 0] ; I (8 : 3) =gdw (5 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXA6) && (jt==OXA3)) {1 (17 : 9) = [1, 1, 1, 1, 0, 1, 1, 0, 1] ; I (8 : 3) =gdw (5 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXA5) && (jt==OXA4)) {I (17 : 9) = [1, 1, 1, 1, 0, 1, 1, 1, 0] ; I (8 : 4) =gdw (4 : 0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==OXA4) && (jt==OXA5)) {1 (17 : 9) = [1, 1, 1, 1/0, 1, 1, 1, 1] ; I (8 : 5) =gdw (3 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OXA3) && (jt==OXA6)) {I (17 : 9) = [1, 1, 1, 1, 1, 0, 0, 0, 0] ; I (8 : 6) =gdw (2 : 0) ; I (5 : 0) =jdw (5 : 0) ; if ( (gt==OX05) && (jt==OX03)) {1 (17 : 8) = [1, 1, 1, 1, 1, 0, 0, 0, 1, 0] ; I (7 : 3) =gdw (4 : 0) ; I (2 : 0) =jdw (2 : 0) ; if ( (gt==OX03) && (jt==OX05)) {1 (17 : 8) = [1, 1, 1, 1, 1, 0, 0, 0, 1, 1] ; I (7 : 5) =gdw (2 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OX17) && (jt==OXll)) {1 (17 : 8) = [1, 1, 1, 1, 1, 0, 0, 1, 0, 0] ; I (7 : 1) =gdw (6 : 0) ; I (O) =jdw (O) ;} if ( (gt==OX25) && (jt==OX23)) {1 (17 : 8) = [1, 1, 1, 1, 1, 0, 0, 1, 0, 1 I (7 : 3) =gdw (4 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX35) && (jt==OX33)) {1 (17 : 8) = [1, 1, 1, 1, 1, 0, 0, 1, 1, 0] ; I (7 : 3) =gdw (4 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX33) && (jt==OX35)) {1 (17 : 8) = [1, 1, 1, 1, 1, 0, 0, 1, 1, 1 I (7 : 5) =gdw (2 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OX30) && (jt== OX38)) {I (17 : 8) = [1, 1, 1, 1, 1, 0, 1, 0, 0, 0] ; I (7 : 0) =jdw (7 : 0) ;} if ( (gt==OX41) && (jt==OX47)) {I (17 : 8) = [1, 1, 1, 1, 1, 0, 1, 0, 0, 1 I (7) =gdw (0) ; I (6 : 0) =jdw (6 : 0) ;} if ( (gt==OX96) && (jt==OX92)) {I (17 : 8) = [1, 1, 1, 1, 1, 0, 1, 0, 1, 0] ; I (7 : 2) =gdw (5 : 0) ; I (1 : 0) =jdw (1 : 0) ;} if ( (gt==OX94) && (jt==OX94)) {I (17 : 8) = [1, 1, 1, 1, 1, 0, 1, 0, 1, 1 I (7 : 4) =gdw (3 : 0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==OX91) && (jt==OX97)) {I (17 : 8) = [1, 1, 1, 1, 1, 0, 1, 1, 0, 0] ; I (7) =gdw (O) ; I (6 : 0) =jdw (6 : 0) ;} if ( (gt==OXA5) && (jt==OXA3)) {I (17 : 8) = [1, 1, 1, 1, 1, 0, 1, 1, 0, 1] ; I (7 : 3) =gdw (4 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXA4) && (jt== OXA4)) {I (17 : 8) = [1, 1, 1, 1, 1, 0, 1, 1, 1, 0] ; I (7 : 4) =gdw (3 : 0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==OXA3) && (jt==OXA5)) {1 (17 : 8) = [1, 1, 1, 1, 1, 0, 1, 1, 1, 1 I (7 : 5) =gdw (2 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OXB5) && (jt==OXB3)) {I (17 : 8) = [1, 1, 1, 1, 1, 1, 0, 0, 0, 0] ; I (7 : 3) =gdw (4 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXB3) && (jt==OXB5)) {I (17 : 8) =tel, 1, 1, 1, 1, 1, 0, 0, 0, 1 I (7 : 5) =gdw (2 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OX07) && (jt==OXOO)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0 I (6 : 0) =gdw (6 : 0) ;} if ( (gt==OX04) && (jt==OX03)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 0, 1, 0, il I (6 : 3) =gdw (3 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX02) && (jt===OX05))' {'1 (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 01 ; I (6 : 5) =gdw (1 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OXl6) && (jt==OX11)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1] ; I (6 : 1) =gdw (5 : 0) ; I (O) =jdw (O) ;} if ( (gt==OX14) && (jt==OX13)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0] ; I (6 : 3) =gdw (3 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXll) && (j t== OX16)) 1 (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1] ; I (6) =gdw (O) ; I (5 : 0) =jdw (5 : 0) ;} ift (gt==OX26) && (jt==OX21)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 0] ; I (6 : 1) =gdw (5 : 0) ; I (O) =jdw (O) ;} if ( (gt==OX24) && (jt==OX23)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1] ; I (6 : 3) =gdw (3 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX32) && (jt==OX35)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0] ; I (6 : 5) =gdw (1 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OX43) && (jt==OX44)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 1] ; I (6 : 4) =gdw (2 : 0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==OX41) && (jt==OX46)) {= (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0] ; I (6) =gdw (0) ; I (5 : 0) =jdw (5 : 0) ; if ( (gt==OX94) && (jt==OX93)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1] ; I (6 : 3) =gdw (3 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX91) && (jt==OX96)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0] ; I (6) =gdw (O) ; I (5 : 0) =jdw (5 : 0) ;} if ( (gt==OXA4) && (jt==OXA3)) {1 (17 : 7) = [1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1] ; I (6 : 3) =gdw (3 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXA3) && (jt==OXA4)) {Il17 : 7) = [1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0] ; I (6 : 4) =gdw (2 : 0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==OXB5) && (jt==OXB2)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1] ; I (6 : 2) =gdw (4 : 0) ; I (1 : 0) =jdw (1 : 0) ;} if ( (gt==OXB2) && (jt==OXB5)) {I (17 : 7) = [1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0] ; I (6 : 5) =gdw (1 : 0) ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OX06) && (jt==OXOO)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 0 I (5 : 0) =gdw (5 : 0) ;} if (gt==OX03) && (jt==OX03)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1 I (5 : 3) =gdw (2 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX25) && (jt==OX21)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0] ; I (5 : 1) =gdw (4 : 0) ; I (O) =jdw (0) ;} if ( (gt==OX23) && (jt==OX23)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 1 I (5 : 3) =gdw (2 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX33) && (jt==OX33)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0] ; I (5 : 3) =gdw (2 : 0) ; I (2 : 0) =jdw (2 : 0) ; if ( (gt==OX43) && (jt==OX43)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1 I (5 : 3) =gdw (2 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX94) && (jt==OX92)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 I (5 : 2) =gdw (3 : 0) ; I (1 : 0) =jdw (1 : 0) ;} if ( (gt==OXA6) && (jt==OXAO)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1 I (5 : 0) =gdw (5 : 0) ;} if ( (gt==OXA3) && (jt==OXA3)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0 I (5 : 3) =gdw (2 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXB3) && (jt==OXB3)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1 I (5 : 3) =gdw (2 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXC3) && (jt==OXC3)) {I (17 : 6) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0] ; I (5 : 3) =gdw (2 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX05) && (jt==OXOO)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 0] ; I (4 : 0) =gdw (4 : 0) if ( (gt==OX02) && (jt==OX03)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1] ; I (4 : 3) =gdw (1 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX14) && (jt==OXll)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0] ; I (4 : 1) =gdw (3 : 0) ; I (0) =jdw (0) ;} if ( (gt==OX24) && (jt==OX21)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 1] ; I (4 : 1) =gdw (3 : 0) ; I (0) =jdw (0) ;} if ( (gt==OX35) && (jt==OX30)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0] ; 1 (4 : 0) =gdw (4 : 0) ;} if ( (gt==OX32) && (jt==OX33)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1] ; I (4 : 3) =gdw (1 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX30) && (jt==OX35)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0] ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OX43) && (jt==OX42)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1] ; I (4 : 2) =gdw (2 : 0) ; I (1 : 0) =jdw (1 : 0) ;} if ( (gt==OX41) && (jt==OX44)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0] ; I (4) =gdw (0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==OX91) && (jt==OX94)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1] ; I (4) =gdw (0) ; I (3 : 0) =jdw (3 : 0) ;} if ( (gt==OXA5) && (jt==OXAO)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0] ; I (4 : 0) =gdw (4 : 0) ;} if ( (gt==OXB5) && (jt==OXBO)) {I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1] ; I (4 : 0) =gdw (4 : 0) ;} if ( (gt==OXB3) && (jt==OXB2)) I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0] ; I (4 : 2) =gdw (2 : 0) ; I (l : 0) =jdw (1 : 0) ;} if ( (gt==OXB2) && (jt==OXB3)). I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1] ; I (4 : 3) =gdw (1 : 0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXBO) && (jt==OXB5)) {I (17 : 5) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0] ; I (4 : 0) =jdw (4 : 0) ;} if ( (gt==OX04) && (jt==OXOO)) {I (17 : 4) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0] ; I (3 : 0) =gdw (3 : 0) ;} if ( (gt==OXll) && (jt==OX13)) I (17 : 4) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1] ; I (3) =gdw (0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX23) && (jt==OX21) I (17 : 4) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0] ; I (3 : 1) =gdw (2 : 0) ; I (O) =jdw (O) ;} if ( (gt==OX41) && (jt==OX43)) I (17 : 4) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1] ; I (3) =gdw (0) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX91) && (jt==OX93)) I (17 : 4) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0] ; I (3) =gdw (O) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OXA4) && (jt==OXAO)) {I (17 : 4) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1) ; I (3 : 0) =gdw (3 : 0) ;} if ( (gt==OXB2) && (jt==OXB2)) {I (17 : 4) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0] ; I (3 : 2) =gdw (1 : 0) ; I (1 : 0) =jdw (1 : 0) ;} if ( (gt==OXC3) && (jt==OXCl)) I (17 : 4) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1] ; I (3 : 1) =gdw (2 : 0) ; I (O) =jdw (O) ;} if ( (gt==OXCl) && (jt==OXC3)) I (17 : 4) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0] ; I (3) =gdw (O) ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX03) && (jt==OXOO)) I (17 : 3) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0] ; I (2 : 0) =gdw (2 : 0) ;} if ( (gt==OX33) && (jt==OX30)) {I (17 : 3) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1] ; 1 (2 : 0) =gdw (2 : 0) ;} if ( (gt==OX30) && (jt==OX33)) {I (17 : 3) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0] ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX41) && (jt==OX42)) 1 (17 : 3) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1] ; I (2) =gdw (O) ; W : 0) =jdwy : 0) ;} if ( (gt==OX91) && (jt==OX92)) 1 (17 : 3) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0] ; I (2) =gdw (O) ; I (1 : 0) =jdw (1 : 0) ;} if ( (gt==OXA3) && (jt==OXAO)) {I (17 : 3) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1] ; I (2 : 0) =gdw (2 : 0) ;} if ( (gt==OXB3) && (jt==OXBO)) {I (17 : 3) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0] ; I (2 : 0) =gdw (2 : 0) ; if ( (gt==OXBO) && (jt==OXB3)) I (17 : 3) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1] ; I (2 : 0) =jdw (2 : 0) ;} if ( (gt==OX02) && (jt==OX00)) {I (17 : 2) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0] ; I i1 : 0) =gdwil : 0) ; if ( (gt==OXll) && (jt==OXll)) I (17 : 2) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1] ; I (1) =gdw (O) ; I (O) =jdw (O) ;} if ( (gt==OX32) && (jt==OX30)) {I (17 : 2) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0] ; I (1 : 0) =gdw (1 : 0) ; if ( (gt==OXB2) && (jt==OXBO)) I (17 : 2) = [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] ; I (1 : 0) =gdw (1 : 0) ;}

It is to be understood that even though numerous characteristics and advantages of various embodiments of the invention have been set forth in the foregoing description, together with details of the structure and function of various embodiments of the invention, this disclosure is illustrative only, and changes may be made in detail, especially in matters of structure and arrangement of parts within the principles of the present invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed. For example, the particular elements may vary depending on the particular application for the communication system while maintaining substantially the same functionality without departing from the scope and spirit of the present invention. In addition, although the embodiments described herein are directed to a coding system for a disc drive, it will be appreciated by those skilled in the art that the teachings of the present invention can be applied to system such as satellite communications and cellular phones, without departing from the scope and spirit of the present invention. Also, a digital"word"can have any number of bits in alternative embodiments of the present invention.