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Patent Searching and Data


Title:
DECOUPLED STORE ADDRESS AND DATA IN A MULTIPROCESSOR SYSTEM
Document Type and Number:
WIPO Patent Application WO2005020088
Kind Code:
A3
Abstract:
In a computer system having a plurality of processors connected to a shared memory, a system and method of decoupling an address from write data in a store to the shared memory. A write request address is generated for a memory write, wherein the write request address points to a memory location in shared memory. A write request is issued to the shared memory, wherein the write request includes the write request address. The write request address is noted in the shared memory and addresses in subsequent load and store requests are compared in share memory to the write request address. The write data is transferred to the shared memory and matched, within the shared memory, to the write request address. The write data is then stored into the shared memory as a function of the write request address.

Inventors:
SCOTT STEVEN L (US)
FAANES GREGORY J (US)
Application Number:
PCT/US2004/026814
Publication Date:
May 12, 2005
Filing Date:
August 18, 2004
Export Citation:
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Assignee:
CRAY INC (US)
SCOTT STEVEN L (US)
FAANES GREGORY J (US)
International Classes:
G06F12/08; (IPC1-7): G06F12/08
Other References:
ABTS D ET AL: "o many states, so little time: verifying memory coherehnce in the Cray X1", PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM, 2003. PROCEEDINGS. INTERNATIONAL APRIL 22-26, 2003, PISCATAWAY, NJ, USA,IEEE, 22 April 2003 (2003-04-22), pages 11 - 20, XP010645295, ISBN: 0-7695-1926-1
HENNESSY J L, PATTERSON D A: "Computer Architecture. A quantative approach", June 2002, MORGAN KAUFMANN, XP002318184
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