DELTA-SIGMA MODULATING FRACTIONAL-N PLL FREQUENCY SYNTHESIZER AND WIRELESS COMMUNICATION DEVICE EQUIPPED WITH SAME

WIPO Patent Application WO/2012/093424

A1

A delta-sigma modulating fractional-n PLL frequency synthesizer for performing fractionalization by modulating a divider (25), the synthesizer comprising: an arithmetic processing means (27) for obtaining a shift amount (S) that is to be added to a fractional-part data (K), and outputting the shift amount (S) and a shifted fractional-part data (K2); a first delta-sigma modulator (28) for integrating and quantizing the shifted fractional-part data (K2); a second delta-sigma modulator (29) for integrating and quantizing the shift amount (S); a first adder (30) for adding the output series from the first delta-sigma modulator (28) and the sign-inversion output from the second delta-sigma modulator (29); and a second adder (31) for adding an integral-part data (M) and the output from the first adder (30). The divider (25) is modulated by the output from the second adder (31).

JP5056886	Clock signal generator and electronic device
JP2004166179	SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE FOR RADIO COMMUNICATION

HORIUCHI YOICHIRO

PCT/JP2011/003182

July 12, 2012

June 06, 2011

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PANASONIC CORP (JP)
HORIUCHI YOICHIRO

H03L7/183; H03L7/08; H03L7/197; H03M7/32

JP2003046389A	2003-02-14
JP2004147106A	2004-05-20
US7187313B1	2007-03-06

KOKUBO, M. ET AL.: "Spread-spectrum clock generator for serial ATA using fractional PLL controlled by DELTASIGMA modulator with level shifter", 2005 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS, 10 February 2005 (2005-02-10), pages 160 - 161,590

MAEDA, Hiroshi et al. (JP)
Hiroshi Maeda (JP)

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