CLAIM OF PRIORI TY

[0001] This patent application claims the benefit of priority to U.S. Application Serial No. 17/116,370, filed December 9, 2020, which is incorporated by reference herein in its entirety.

TECHNICAL FIELD

[0002] Embodiments described herein generally relate to detecting anomalies on a controller area network (CAN) bus.

BACKGROUND

[0003] Detecting anomalies on controller area network (CAN) bus can increase security and allow predictive maintenance. However, while several methods exist, none permit for the detection of a broad range of anomalies.

BRIEF DESCRIPTION OF THE DRAWINGS

[0004] In the drawings, which are not necessarily drawn to scale, like numerals may describe similar components in different views. Like numerals having different letter suffixes may represent different instances of similar components. Some embodiments are illustrated by way of example, and not limitation, in the figures of the accompanying drawings.

[0005] FIGS. 1A and 1 B are a block diagram illustrating features and operations of a system and method to detect anomalies on a controller area network (CAN) bus.

[0006] FIG. 2 is a block diagram of a computer system upon which one or more of the disclosed embodiments can execute.

DETAILED DESCRIPTION

[0007] In previous methods that attempted to determine anomalies on controller area networks (CAN) networks, it was required to install software on the devices on the CAN bus. Each device would then have to encrypt/decrypt its own messages. This caused problems since CAN networks m general do not have the processing power to handle this. However, an embodiment of the present disclosure is passive, it simply examines packets as the packets are transmitted through the network. An embodiment does not require that the CAN bus be modified, only that the software be added to the bus. Moreover, when CAN networks were developed, no emphasis \vas placed on security. Embodiments of this disclosure therefore address this issue. Further, embodiments of this disclosure do not have to be deployed at each endpoint of the network. Rather, the embodiments simply have to be positioned somewhere on the bus. .Additionally, it is noted that the disclosed embodiments do not employ any machine learning like other approaches do. Virtually everything is known about the CAN bus, so the embodiments can be rules based and deterministic such that the same message will always result in the same determination. That is, the rules can be very strict.

[0008] As is known to those of skill in the art, a controller area network (CAN) bus is a communications bus protocol commonly used in commercial and military' systems. However, the protocol for the CAN bus is outdated, and is lacking any built-in security. Since the CAN bus protocol is outdated, there is little incentive to putting significant resources into improving the security of the CAN bus. To address this situation, one or more embodiments disclosed herein provide an anomaly detection system that uses multiple means of detection that are specifically built to protect CAN bus networks. It is noted however that one or more embodiments and/or one or more techniques of these embodiments may be applicable to other types of networks.

[0009] One or more embodiments are designed to require very few computational resources so that the embodiments can run in real time on embedded systems. For example, an embodiment can be deployed as an operating system application for monitoring and/or passive protection, or on a field programmable gate array (FPGA) intellectual property (IP) core on the bus interface itself to inform a firewall for active protection and/or mitigation.

[0010] Consequently, in general, one or more embodiments of the present disclosure relate to an anomaly detection system that uses three approaches to check for anomalies in a controller area network (CAN) bus. These three approaches can be referred to as a signature-based approach, a frequency-based approach, and a bus load-based approach. The signature-based approach uses two methods to verify messages. First, it analyzes the arbitration/control field, and second it inspects the data field. The arbitration/control field of each message is first checked to ensure the arbitration identifier and data length code can be found in a whitelist. Then, various parts of the data field are interpreted as signals based on signal rales defined in a configuration file. Rules in the configuration file can either be whitelist rules to define what is allowed or blacklist rules to define what is not allowed. Each rale is viewed as a different allowed state for the machine. The state space is searched using a decision tree. For this approach, a tree is built using each allowed option for each field in the message. For each message, the tree can be traced from the top to the tip of a branch, and if all the field options in the message are found along the branch then the message is correct (i.e., not an anomaly). If the tip of a branch cannot be reached with the given field options, then the message is anomalous.

[0011] While the signature-based approach looks at the actual data that are sent over the bus, the heuristic-based frequency and bus load monitor approaches use features of the bus as a whole to monitor for anomalies.

[0012] The frequency -based approach employs a message-specific frequency monitor that tracks how often specific message identifiers are sent across the bus. In an embodiment, if a message is sent at more than twice the nominal frequency as defined in a specification file, then an alarm is generated. Other multiples of the nominal frequency can also be used. It is noted that messages appearing at a much higher rate than usual could result from a. failing device or another device that is using the same identifier. In an embodiment, the message- specific frequency monitor takes at most one second to recognize an anomaly. [0013] The bus load monitoring approach alerts a user when the overall bus load is above a certain percentage of the maximum value as specified in a rules table. For example, in an embodiment, an alert is transmitted when the overall bus load is 80% above the maximum value. The alert, can also be based on different percentages. If the bus becomes saturated above this amount or some other amount, there is an increased chance that the system will fail to send lower-priority messages. This could indicate a potential Denial of Service (DOS) attack. The bus load monitor calculates the bus load over the previous second, or other relatively short time frame, so like the frequency-based approach, the bus load monitor approach takes at most one second to recognize a saturated bus.

[0014] In summary, the signature-based approach, the frequency-based approach, and the bus load-based approach are used in combination in real-time for a CAN bus. The variability in signature definition is combined with the use of both a whitelist and a blacklist for monitoring message frequency in correlation with bus loading in real time. The increased coverage that results from using the combination of the various approaches does not come at the cost of increased overhead. This can be run in real time to keep up with the bus and still be deployed on embedded systems with minimal resources.

[0015] FIGS. 1A and IB are a block diagram illustrating operations and features of an example system for detecting anomalies on a controller area network (CAN) bus. FIGS. 1A and IB include a number of process blocks 110 - 146. Though arranged substantially serially in the example of FIGS. 1A and IB, other examples may reorder the blocks, omit one or more blocks, and/or execute two or more blocks in parallel using multiple processors or a single processor organized as two or more virtual machines or sub-processors.

Moreover, still other examples can implement the blocks as one or more specific interconnected hardware or integrated circuit modules with related control and data signals communicated between and through the modules. Thus, any process flow is applicable to software, firmware, hardware, and hybrid implementations.

[0016] Referring now to FIGS. 1A and IB, a process for detecting anomalies on a controller area network (CAN) bus at 110 analyzes an arbitration field in a message on the GAN bus, and at 120 inspects a data field in the message on the CAN bus. At 130, the process monitors a frequency of message identifiers that are transmitted across the CAN bus, and at 140, determines that an overall bus load crosses a threshold. Thereafter, at 150, the process transmits an alert when the analyzing the arbitration field, the inspecting the data field, the monitoring the frequency, and the determining the overall bus load indicate that an anomaly has occurred on the CAN bus.

[0017] Other features of the process for detecting anomalies on the CAN are as follows. As noted at 112, the analysis of the arbitration field can include a determination that an arbitration identifier and a data length code are contained on a whitelist. The presence of the arbitration identifier and data length code on the whitelist indicates that an anomaly has not occurred.

[0018] At 122, the inspection of the data field can include interpreting one or more parts of the data field as a signal. The interpretation of the data field as a signal can be based on one or more signal rules that are stored in a configuration file. In an embodiment, as indicated at 124, the signal rides in the configuration file can include a list of data that are allowed and a list of data that are not allowed.

[0019] At 132, a normal frequency for the frequency of message identifiers that are transmitted across the CAN bus is determined by reading a table. At 134, an alarm is generated when the frequency of message identifiers that are transmitted across the CAN bus deviates from the normal frequency. In a particular embodiment, as indicated at 136, the deviation from the normal frequency is when the frequency of message identifiers is approximately twice the normal frequency.

[0020] The determination that the overall bus load crosses a threshold is determined as follows. At 142, the threshold is read from a table, and at 144, the alert is transmitted when the overall bus load is greater than the threshold. In a particular example embodiment, as indicated at 146, the threshold is set to a value of approximately 80% above a maximum threshold of the CAN bus, [0021] FIG. 2 is a block diagram illustrating a computing and communications platform 200 in the example form of a general-purpose machine on which some or all the operations of FIGS. 1A and IB may be carried out according to various embodiments. In certain embodiments, programming of the computing platform 200 according to one or more particular algorithms produces a special- purpose machine upon execution of that programming. In a networked deployment, the computing platform 200 may operate in the capacity of either a server or a client machine in server-client network environments, or it may act as a peer machine in peer-to-peer (or distributed) network environments.

[0022] Example computing platform 200 includes at least one processor 202 (e.g., a central processing unit (CPU), a graphics processing unit (GPU) or both, processor cores, compute nodes, etc.), a main memory 204 and a static memory 206, which communicate with each other via a link 208 (e.g, bus). The computing platform 200 may further include a video display unit 210, input devices 212 (e.g., a keyboard, camera, microphone), and a user interface (UI) navigation device 214 (e.g., mouse, touchscreen). The computing platform 200 may additionally include a storage device 216 (e.g., a drive unit), a signal generation device 218 (e.g., a speaker), and a RF -environment interface device (RFEID) 220.

[0023] The storage device 216 includes a non-transitory machine-readable medium 222 on which is stored one or more sets of data structures and instructions 224 (e.g., software) embodying or utilized by any one or more of the methodologies or functions described herein. The instructions 224 may also reside, completely or at least partially, within the main memory 204, static memory 206, and/or within the processor 202 during execution thereof by the computing platform 200, with the main memory 204, static memory 206, and the processor 202 also constituting machine-readable media.

[0024] While the machine-readable medium 222 is illustrated in an example embodiment to be a single medium, the term “machine-readable medium” may include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) that store the one or more instructions 224. The term “machine-readable medium” shall also be taken to include any tangible medium that is capable of storing, encoding or carrying instructions for execution by the machine and that cause the machine to perform any one or more of the methodologies of the present disclosure or that is capable of storing, encoding or carrying data structures utilized by or associated with such instructions. The term “machine-readable medium” shall accordingly be taken to include, but not be limited to, solid-state memories, and optical and magnetic media. Specific examples of machine-readable media include non- volatile memory, including but not limited to, by way of example, semiconductor memory devices (e.g., electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM)) and flash memory devices; magnetic disks such as internal hard disks and removable disks; magneto-optical disks; and CD-ROM and D VD- ROM disks.

[0025] RFEID 220 includes radio receiver circuitry/, along with analog-to- digital conversion circuitry , and interface circuitry/ to communicate via link 208 according to various embodiments. Various form factors are contemplated for RFEID 220. For instance, RFEID may be m the form of a wideband radio receiver, or scanning radio receiver, that interfaces with processor 202 via link 208, In one example, link 208 includes a PCI Express (PCIe) bus, including a slot into which the NIC form-factor may removably engage. In another embodiment, RFEID 220 includes circuitry/ laid out on a motherboard together with local link circuitry, processor interface circuitry, other input/output circuitry, memory circuitry , storage device and peripheral controller circuitry , and the like. In another embodiment, RFEID 220 is a peripheral that interfaces with link 208 via a peripheral input/output port such as a universal serial bus (USB) port. RFEID 220 receives RE emissions over wireless transmission medium 226. RFEID 220 may be constructed to receive RADAR signaling, radio communications signaling, unintentional emissions, or some combination of such emissions.

[0026] The above detailed description includes references to the accompanying draw?ings, w?hich form a part of the detailed description. The drawings show, by way of illustration, specific embodiments that, may be practiced. These embodiments are also referred to herein as “examples.” Such examples may include elements in addition to those shown or described. However, also contemplated are examples that include the elements shown or described. Moreover, also contemplated are examples using any combination or permutation of those elements shown or described (or one or more aspects thereof), either with respect to a particular example (or one or more aspects thereof), or with respect to other examples (or one or more aspects thereof) shown or described herein.

[0027] Publications, patents, and patent documents referred to in this document are incorporated by reference herein in their entirety, as though individually incorporated by reference. In the event of inconsi stent, usages between this document and those documents so incorporated by reference, the usage in the incorporated reference(s) are supplementary to that of this document; for irreconcilable inconsistencies, the usage in this document controls.

[0028] In this document, the terms “a” or “an” are used, as is common in patent documents, to include one or more than one, independent of any other instances or usages of “at least one” or “one or more.” In this document, the term “or” is used to refer to a nonexclusive or, such that “A or B” includes “A but not B,” “B but not A,” and “A and B,” unless otherwise indicated. In the appended claims, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein ” Also, in the following claims, the terms “including” and “comprising” are open-ended, that is, a system, device, article, or process that includes elements in addition to those listed after such a term in a claim are still deemed to fall within the scope of that claim. Moreover, in the following claims, the terms “first,” “second,” and “third,” etc. are used merely as labels, and are not intended to suggest a numerical order for their objects.

[0029] The above description is intended to be illustrative, and not restrictive. For example, the above-described examples (or one or more aspects thereof) may be used in combination with others. Other embodiments may be used, such as by one of ordinary skill in the art upon reviewing the above description. The Abstract is to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Also, in the above Detailed Description, various features may be grouped together to streamline the disclosure. However, the claims may not set forth every feature disclosed herein as embodiments may feature a subset of said features. Further, embodiments may include fewer features than those disclosed in a particular example. Thus, the following claims are hereby incorporated into the Detailed Description, with a claim standing on its own as a separate embodiment. The scope of the embodiments disclosed herein is to be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.