A DIFFERENTIAL, LOW VOLTAGE SWING REDUCER

WIPO Patent Application WO2001046704

A3

A small swing reducer circuit. An apparatus includes a first number of input terminals including at least two input terminals coupled to receive a differential small swing signal and a reducer circuit to generate differential, small swing sum and carry output signals based on data received via the input terminals.

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CHEN FENG (US)
FLETCHER THOMAS (US)
JAMSHIDI SHAHRAM (US)

PCT/US2000/042397

February 21, 2002

November 29, 2000

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INTEL CORP (US)
CHEN FENG (US)
FLETCHER THOMAS (US)
JAMSHIDI SHAHRAM (US)

G01R3/00; G06F7/50; G06F7/60; H03K19/017; (IPC1-7): G06F7/50; H03K19/017

EP0653702A1	1995-05-17
US5568069A	1996-10-22

KAZUO YANO ET AL: "A 3.8-NS CMOS 16 X 16-B MULTIPLIER USING COMPLEMENTARY PASS-TRANSISTOR LOGIC", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE INC. NEW YORK, US, vol. 25, no. 2, 1 April 1990 (1990-04-01), pages 388 - 395, XP000116678, ISSN: 0018-9200
FUSE T ET AL: "AN ULTRA LOW VOLTAGE SOI CMOS PASS-GATE LOGIC", IEICE TRANSACTIONS ON ELECTRONICS, INSTITUTE OF ELECTRONICS INFORMATION AND COMM. ENG. TOKYO, JP, vol. E80-C, no. 3, 1 March 1997 (1997-03-01), pages 472 - 477, XP000751697, ISSN: 0916-8524
CHENG ET AL: "A suggestion for low-power current-sensing complementary pass-transistor logic interconnection", 1997 ISCAS, June 1997 (1997-06-01), Hong Kong, pages 1948 - 1951, XP002179278

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