Because of its numerous advantages such as programmability, flexibility, immunity to noise and ease of integration, a digital controller is widely used to regulate an output of, for example, a power converter system (such as a lamp driver, motor driver, voltage regulator, etc. ). As shown in Figure 1, the digital controller 10 comprises an analog-to- digital (A/D) converter 11 to sense a signal Sense, such as the regulated output voltage of the power converter. The digital output of the A/D converter 11 is then sent to a feedback compensation unit 12 (e. g. , micro-controller or programmable logic circuit such as FPGA or CPLD) to implement the feedback compensation function in accordance to a reference Vref, so as to stabilize the feedback loop. An output signal is generated by a signal generator 13 to control the power switches of the power converter to regulate the output voltage.

For most applications, the bandwidth of the system shown in Figure 1 is limited by the sampling speed of the A/D converter 11. For a system requiring higher resolution and bandwidth, the power consumption of the controller increases significantly. For example, a 10-time-speed improvement in the A/D converter 11 could increase the power consumption of the A/D converter 11 by 3-5 times. Therefore, a high-speed high- resolution A/D converter is high power consuming.

In a low-cost application, instead of using an expensive high-speed high-resolution A/D converter, either a high-speed low-resolution or a low-speed high-resolution A/D converter is used. A high-speed low-resolution A/D converter can easily meet the requirement of the dynamic response due to the high bandwidth control, it, however, could have problem with the steady state requirement of the system. On the other hand, a low-speed high-resolution A/D converter can easily meet the requirement of the steady state, but could have problem with dynamic responses.

Therefore, there is a need for a new digital converter resolution which is low in cost and power consumption but is still able to meet both dynamic transient and steady state requirements of the system.

The present invention provides a novel digital controller in which two control paths are employed instead of one. In particular, each control path has an A/D converter and a compensation unit, and the two A/D converters have different sampling speeds and/or resolutions to meet both requirements of dynamic response and steady state. Thus, a costly and high power consumption high-speed high resolution A/D converter can be replaced by a combination of a high-speed low resolution A/D converter and a low-speed high-resolution A/D converter.

Preferably, the sampling speeds of the two A/D converters are substantially different such that the control of the two control paths is de-coupled and will not interfere with each other. The two control paths may sense the same signal source or different digital sources.

The above and other features and advantages will be clearer from the detailed description of the preferred embodiments of the present invention with reference to the accompanying drawings in which: Figure 1 is a conventional digital controller with a single control path; Figure 2 is a first employment of the present invention incorporating two control paths, in which the two paths sense the same signal source;

Figure 3 is a second employment of the present invention incorporating two control paths, in which the two paths sense two different signal sources.

As shown in Figure 2, instead of a single control path (with a A/D converter) in the prior art shown in Figure, 1, two control paths are used in the present invention each having an A/D converter. One path deals with the fast responses of the system, such as dynamic transient, while the other deals with the slow responses, such as steady state.

In particular, the first control path comprises a fast- speed low-resolution (e. g. , 6-bit) A/D converter lla and a high frequency compensation unit 12a, and the second control path comprises a low-speed high-resolution (e. g., 10-bit) A/D converter lib and a low frequency compensation unit 12b. The two paths sense the same signal resource Vsense, e. g. , the output voltage or current of the power converter, and use the same reference Vref.

A/D converter lla has a fast sampling speed to control fast transient, while A/D converter lib has a high resolution to control steady state. Both A/D converters lla and llb is of low power consumption and low cost. The total power consumption

of the two A/D converters lla and llb is half or even less than a single 10-bit fast A/D converter.

For transient, the power converter usually has less strict specification compared with the one in steady state, thus a low-resolution A/D converter (e. g. , 6-bit A/D converter lla) is sufficient to control the dynamic changes. The low- resolution A/D converter lla also requires a reduced sampling clock frequency compared with a high-resolution A/D converter (e. g. , 10-bit A/D converter llb) with the same sampling speed, which results in lower power consumption and cost.

The 10-bit A/D converter llb controls the steady state of the system. The bandwidth of this path and therefore the sampling speed of the A/D converter lib can be much lower. The sampling speed of the A/D converter lib can be selected 10-100 times slower than that of the 6-bit A/D converter lla.

The outputs of both the two paths are sent to a signal generator 13, such as PWM or VCO, to generate a control signal Control which will be sent to the regulated system, such as a power converter.

Preferably, in order to de-couple the control of the two paths, one path has a much higher sampling speed or bandwidth than the other. For example, A/D converter lla has a sampling speed as 10-100 times fast as that of A/D converter llb.

Both the A/D converters lla and llb are much lower in cost and power consumption as compared to a high-speed high resolution A/D converter. Therefore, the total cost and the power consumption of the two A/D converters lla and llb can be reduced significantly as compared to the prior art in which an expensive and high power consumption single high-speed high- resolution A/D converter is used. At the same time, each control path can have a simpler control algorithm, which also reduces the calculation time of the compensations if the control is implemented in software.

The two paths can have the same sensed signal sources as shown in Figure 2, such as the output voltage of the power converter, or have different sensed sources such as voltage and current, as shown in Figure 3 in which the two paths sense different signal sources VBensel and Vsense2, each with own reference Vref1 and Vref2, respectively. The output of the two paths are sent to a signal generator 13 to generate a control signal Vcontrol. The signal generator can be a PWM such as in flyback, buck and boost circuits or a VCO such as in resonant circuits.

Although preferred embodiments have been described in detail as above, it shall be appreciated that numerous changes and variations are possible to a skilled person in the art without departing the spirit of the invention. Thus, the scope of the invention is solely limited in the following claims.