Title:
DOUBLE-SIDED POLISHING METHOD
Document Type and Number:
WIPO Patent Application WO/2023/218812
Kind Code:
A1
Abstract:
The present invention provides a double-sided polishing method including a startup stage for gradually increasing a polishing rate from a polishing stopped state, a main polishing step, continuous with the startup stage, for performing double-sided polishing, and a ramp-down stage for gradually lowering the polishing rate from the main polishing step to return to the polishing stopped state, characterized in that the main polishing step includes a plurality of substeps for performing double-sided polishing with different polishing rates, and the polishing rate at which the double-sided polishing is performed in the last of the plurality of substeps is at most equal to 0.35 μm/minute. This makes it possible to provide a double-sided polishing method that has a high productivity and that enables wafers having good nanotopography to be obtained.
Inventors:
YOSHIDA YASUKI (JP)
Application Number:
PCT/JP2023/014173
Publication Date:
November 16, 2023
Filing Date:
April 06, 2023
Export Citation:
Assignee:
SHINETSU HANDOTAI KK (JP)
International Classes:
B24B37/08; B24B37/24; H01L21/304
Domestic Patent References:
| WO2019043895A1 | 2019-03-07 | |||
| WO2019077687A1 | 2019-04-25 |
Foreign References:
| JP2014103398A | 2014-06-05 | |||
| JP2013094954A | 2013-05-20 | |||
| US20020173222A1 | 2002-11-21 | |||
| JPS56171158U | 1981-12-17 | |||
| JP2021082696A | 2021-05-27 | |||
| JP2020513682A | 2020-05-14 |
Attorney, Agent or Firm:
YOSHIMIYA Mikio et al. (JP)
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