Title:
AN EFFICIENT MEMORY ALLOCATION SCHEME FOR DATA COLLECTION
Document Type and Number:
WIPO Patent Application WO2001061572
Kind Code:
A3
Abstract:
A system and method that provides an integrated circuit which includes a small on-chip buffer to store collected data, thereby shifting the burden of storing the majority of the collected data to external system memory, which is typically comprised of commodity memory chips. Since this external system memory is already in use by other system functions, utilizing such unused regions of this external memory increases overall hardware efficiency, while achieving lower ASIC manufacturing cost.
Inventors:
CHEN JOEY Y (US)
MOTE RANDALL L (US)
LIN THUJI SIMON (US)
HEBSGAARD ANDERS (US)
MOTE RANDALL L (US)
LIN THUJI SIMON (US)
HEBSGAARD ANDERS (US)
Application Number:
PCT/US2001/005187
Publication Date:
March 14, 2002
Filing Date:
February 16, 2001
Export Citation:
Assignee:
BROADCOM CORP (US)
CHEN JOEY Y (US)
MOTE RANDALL L (US)
LIN THUJI SIMON (US)
HEBSGAARD ANDERS (US)
CHEN JOEY Y (US)
MOTE RANDALL L (US)
LIN THUJI SIMON (US)
HEBSGAARD ANDERS (US)
International Classes:
G06F11/34; G06F12/00; G11C29/00; (IPC1-7): G06F17/40; G06F11/34
Foreign References:
| US5560036A | 1996-09-24 | |||
| EP0316609A2 | 1989-05-24 | |||
| US5768152A | 1998-06-16 |
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