Title:
ELECTRICAL DESIGN RULE CHECKING METHOD AND DEVICE FOR INTEGRATED CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2020/155290
Kind Code:
A1
Abstract:
The present disclosure relates to an electrical design rule checking method and device for an integrated circuit. The method comprises: acquiring a parasitic parameter netlist of the integrated circuit; receiving circuit simulation results and electrical design rule checking (DRC) rules of the integrated circuit; and performing electrical DRC on the integrated circuit according to the parasitic parameter netlist, the circuit simulation results and the electrical DRC rules. According to the method, a dynamic electrical DRC can be automatically performed, and the physical position of an error occurring in the electrical DRC can be accurately located, thereby greatly improving the speed and accuracy of the electrical DRC, reducing the false fault of the electrical DRC inspection, and avoiding the overdesign of the integrated circuit.
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Inventors:
TANG YAQUAN (CN)
Application Number:
PCT/CN2019/077021
Publication Date:
August 06, 2020
Filing Date:
March 05, 2019
Export Citation:
Assignee:
SPREADTRUM COMM SHANGHAI CO (CN)
International Classes:
G06F17/50
Foreign References:
| CN104933214A | 2015-09-23 | |||
| CN102866349A | 2013-01-09 | |||
| US9684750B1 | 2017-06-20 |
Other References:
See also references of EP 3920005A4
Attorney, Agent or Firm:
LINDA LIU & PARTNERS (CN)
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