Title:
ELECTRONIC DEVICE AND METHOD FOR GENERATING ATTESTATION CERTIFICATE BASED ON FUSED KEY
Document Type and Number:
WIPO Patent Application WO/2021/025482
Kind Code:
A1
Abstract:
An electronic device and method of operating an electronic device are provided. The electronic device includes an integrated circuit including at least one key, at least one processor including the integrated circuit, and a memory operatively connected to the at least one processor. The memory stores instructions that, when executed, cause the at least one processor to obtain at least one piece of hardware information related to the electronic device, generate a signed certificate signing request including the at least one piece of hardware information, based on the at least one key, transmit the signed certificate signing request to an external electronic device, receive an attestation certificate generated based on the signed certificate signing request, from the external electronic device, and store the received attestation certificate in the memory.
Inventors:
KONG SUNJUNE (KR)
KIM BUMHAN (KR)
KIM JINHYOUNG (KR)
YOO SUNGHOON (KR)
KIM BYEONGHWA (KR)
KIM JEONGIL (KR)
JUNG MINCHEOL (KR)
KIM BUMHAN (KR)
KIM JINHYOUNG (KR)
YOO SUNGHOON (KR)
KIM BYEONGHWA (KR)
KIM JEONGIL (KR)
JUNG MINCHEOL (KR)
Application Number:
PCT/KR2020/010395
Publication Date:
February 11, 2021
Filing Date:
August 06, 2020
Export Citation:
Assignee:
SAMSUNG ELECTRONICS CO LTD (KR)
International Classes:
H04L9/32; H04L9/08
Domestic Patent References:
| WO2014099687A1 | 2014-06-26 |
Foreign References:
| US20100183154A1 | 2010-07-22 | |||
| US10193697B1 | 2019-01-29 | |||
| US20190020647A1 | 2019-01-17 |
Other References:
SHOUHEI IMACHI, MAKOTO ONAKA: "Conjugate Addition of Electron-rich Aromatics to Acrolein in the Confined Space of Zeolite Y", CHEMISTRY LETTERS, CHEMICAL SOCIETY OF JAPAN,NIPPON KAGAKUKAI, JP, vol. 34, no. 5, 1 May 2005 (2005-05-01), JP, pages 708 - 709, XP055444210, ISSN: 0366-7022, DOI: 10.1246/cl.2005.708
COSTAN VICTOR, LEBEDEV ILIA, DEVADAS SRINIVAS: "Secure Processors Part II: Intel SGX Security Analysis and MIT Sanctum Architecture", FOUNDATIONS AND TRENDS IN ELECTRONIC DESIGN AUTOMATION, NOW PUBLISHERS INC., HANOVER, MA, US, vol. 11, no. 3, 1 January 2017 (2017-01-01), US, pages 249 - 361, XP055778047, ISSN: 1551-3939, DOI: 10.1561/1000000052
See also references of EP 3984165A4
COSTAN VICTOR, LEBEDEV ILIA, DEVADAS SRINIVAS: "Secure Processors Part II: Intel SGX Security Analysis and MIT Sanctum Architecture", FOUNDATIONS AND TRENDS IN ELECTRONIC DESIGN AUTOMATION, NOW PUBLISHERS INC., HANOVER, MA, US, vol. 11, no. 3, 1 January 2017 (2017-01-01), US, pages 249 - 361, XP055778047, ISSN: 1551-3939, DOI: 10.1561/1000000052
See also references of EP 3984165A4
Attorney, Agent or Firm:
KWON, Hyuk-Rok et al. (KR)
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