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Title:
EQUALIZATION CIRCUIT, DATA COLLECTION METHOD AND MEMORY
Document Type and Number:
WIPO Patent Application WO/2022/062468
Kind Code:
A1
Abstract:
Provided are an equalization circuit, a data collection method and a memory. The equalization circuit comprises a first input buffer circuit, a second input buffer circuit and a selection and sampling circuit, wherein the first input buffer circuit and the second input buffer circuit are respectively connected to the selection and sampling circuit, and the first input buffer circuit and the second input buffer circuit use different reference voltages; and the selection and sampling circuit chooses, according to data output by the equalization circuit the previous time, to perform data sampling on data signals output by the first input buffer circuit or the second input buffer circuit, and takes the collected data as data currently output by the equalization circuit. That is, the equalization circuit comprises two different input buffer circuits, and when collecting data, a selection and sampling circuit needs to select, according to data output by the equalization circuit the previous time, a data signal output by one of the two input buffer circuits so as to perform data collection, such that the quality of the received data signal can be more effectively improved.

Inventors:
ZHANG ZHIQIANG (CN)
Application Number:
PCT/CN2021/097401
Publication Date:
March 31, 2022
Filing Date:
May 31, 2021
Export Citation:
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Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G11C7/10
Domestic Patent References:
WO2020005592A12020-01-02
WO2018005137A12018-01-04
Foreign References:
CN105471787A2016-04-06
CN1889552A2007-01-03
CN101340408A2009-01-07
CN107657978A2018-02-02
EP0381095A21990-08-08
US20160209462A12016-07-21
CN202011018885A2020-09-24
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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