Title:
ERROR-CORRECTING APPARATUS
Document Type and Number:
WIPO Patent Application WO/1984/003808
Kind Code:
A1
Abstract:
When very important data are contained in n of (n+k+m+$(1,3)$) symbols which are being subjected to error-correction encoding, and when (n+k) symbols are being subjected to individual error detection or error-correction encoding, a flag indicating the number of erroneous symbols in the (n+k) symbols is first generated and is employed for the error correction of (n+k+m+$(1,3)$) symbols in a subsequent stage. Alternatively, error magnitudes and error locations are first detected for the (n+k+m+$(1,3)$) symbols, and the result of the inspection is employed for checking the error correction of the (n+k) symbols. In addition, a flag indicating the number of erroneous symbols in the (n+k) symbols is generated and is employed for the error correction of the (n+k+m+$(1,3)$) symbols in the subsequent stage.
Inventors:
FURUYA TSUNEO (JP)
HORI KATSUYA (JP)
HORI KATSUYA (JP)
Application Number:
PCT/JP1984/000099
Publication Date:
September 27, 1984
Filing Date:
March 12, 1984
Export Citation:
Assignee:
SONY CORP (JP)
International Classes:
G11B5/09; G11B20/18; (IPC1-7): H04L1/10; G11B5/09; H03K13/32
Foreign References:
| JPS5710561A | 1982-01-20 | |||
| JPS56111349A | 1981-09-03 | |||
| JPS58148551A | 1983-09-03 |
Other References:
IEEE Transactions on Information Theory, Vol. IT-24, No. 1, (January 1978) IRVINGS. REED, et al (The Fast Decording of Reed-Codes Using Fermat Theotetic Transforms and Continued Fractions), p. 100-106
See also references of EP 0144431A4
See also references of EP 0144431A4
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