Title:
ERROR CORRECTING DECODING DEVICE AND ERROR CORRECTING DECODING METHOD
Document Type and Number:
WIPO Patent Application WO/2020/170435
Kind Code:
A1
Abstract:
This error correcting decoding device comprises: an internal coding repetition decoding circuit; a parameter generating circuit; and a first control circuit. The first control circuit receives, as parameters, a maximum number of repetitions and threshold generated by the parameter generation circuit, and if the maximum number of repetitions has not been reached, the non-zero numbers sequentially outputted from the internal code repeating decoding circuit are compared with the threshold set for each number of repetitions, and if the comparison results satisfy predetermined stopping conditions, the repetition operation by the internal coding repetition decoding circuit is stopped.
Inventors:
YOSHIDA HIDEO (JP)
KONISHI YOSHIAKI (JP)
ISHII KENJI (JP)
SUGIHARA TAKASHI (JP)
KONISHI YOSHIAKI (JP)
ISHII KENJI (JP)
SUGIHARA TAKASHI (JP)
Application Number:
PCT/JP2019/006837
Publication Date:
August 27, 2020
Filing Date:
February 22, 2019
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H03M13/19
Foreign References:
| JP2008544692A | 2008-12-04 | |||
| JP2005223440A | 2005-08-18 | |||
| JP2009177416A | 2009-08-06 | |||
| JP2008193460A | 2008-08-21 | |||
| JP2008539623A | 2008-11-13 | |||
| JP2010277645A | 2010-12-09 | |||
| JP2012129591A | 2012-07-05 |
Other References:
SHIN,DONGHYUK ET AL.: "A Stopping Criterion for Low-Density Parity-Check Codes", IEEE 65TH VECHICULAR TECHNOLOGY CONFERENCE VTC2007, 25 April 2007 (2007-04-25), pages 1529 - 1533, XP031092885
ALLEYNE,D ET AL.: "On Stopping Criteria for Low-Density Parity-Check Codes", 6TH INTERNATIONAL SYMPOSIUM ON COMMUNICATION SYSTEM, NETWORKS AND DIGITAL SIGNAL PROCESSING, 25 July 2008 (2008-07-25), pages 633 - 637, XP031314879
K. SUGIHARAY. MIYATAT. SUGIHARAK. KUBOH. YOSHIDAW. MATSUMOTOT. MIZUOCHI: "A spatially-coupled type LDPC code with an NCG of 12 dB for optical transmission beyond 100 Gb/s", PROC. OFC/NFOEC 2013, OM2B.4, 2013
HISASHI FUTAKITOMOAKI OHTSUKI: "Low-Density Parity-Check (LDPC) Coded OFDM Systems", VTC FALL 2001, no. 01CH37211, 2001
TINOOSH MOHSENINHOUSHMAND SHIRANI-MEHRBEVAN BAAS: "Low power LDPC decoder with efficient stopping scheme for undecodable blocks", ISCAS 2011, 2011
See also references of EP 3913810A4
ALLEYNE,D ET AL.: "On Stopping Criteria for Low-Density Parity-Check Codes", 6TH INTERNATIONAL SYMPOSIUM ON COMMUNICATION SYSTEM, NETWORKS AND DIGITAL SIGNAL PROCESSING, 25 July 2008 (2008-07-25), pages 633 - 637, XP031314879
K. SUGIHARAY. MIYATAT. SUGIHARAK. KUBOH. YOSHIDAW. MATSUMOTOT. MIZUOCHI: "A spatially-coupled type LDPC code with an NCG of 12 dB for optical transmission beyond 100 Gb/s", PROC. OFC/NFOEC 2013, OM2B.4, 2013
HISASHI FUTAKITOMOAKI OHTSUKI: "Low-Density Parity-Check (LDPC) Coded OFDM Systems", VTC FALL 2001, no. 01CH37211, 2001
TINOOSH MOHSENINHOUSHMAND SHIRANI-MEHRBEVAN BAAS: "Low power LDPC decoder with efficient stopping scheme for undecodable blocks", ISCAS 2011, 2011
See also references of EP 3913810A4
Attorney, Agent or Firm:
SOGA, Michiharu et al. (JP)
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