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Title:
ERROR DETECTION AND CORRECTION METHOD AND APPARATUS IN A MAGNETO-RESISTIVE RANDOM ACCESS MEMORY
Document Type and Number:
WIPO Patent Application WO2004112048
Kind Code:
A3
Abstract:
The present invention relates to a method and apparatus for reducing data errors in a magneto-resistive random access memory (MRAM). According to the disclosed method, data bits and associated error correction code (ECC) check bits are stored into a storage area. Thereafter, the data bits and ECC check bits are read out and any errors are detected and corrected. A data refresh is then initiated based on a count and data bits and associated ECC check bits stored in the storage area are then refreshed by accessing the stored data bits and the associated ECC check bits, and ultimately by checking, correcting and restoring the data bits and the ECC check bits to the storage area.

Inventors:
DEBROSSE JOHN (US)
HOENIGSCHMID HEINZ (US)
LEUSCHNER RAINER (US)
MUELLER GERHARD (DE)
Application Number:
PCT/EP2004/006019
Publication Date:
April 07, 2005
Filing Date:
June 03, 2004
Export Citation:
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Assignee:
INFINEON TECHNOLOGIES AG (DE)
IBM (US)
DEBROSSE JOHN (US)
HOENIGSCHMID HEINZ (US)
LEUSCHNER RAINER (US)
MUELLER GERHARD (DE)
International Classes:
G06F11/10; G11C7/24; G11C11/406; (IPC1-7): G11C29/00; G11C11/15
Foreign References:
US20030023923A12003-01-30
US4493081A1985-01-08
US20030023927A12003-01-30
US20030023922A12003-01-30
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