Title:
ERROR DETECTION METHOD AND DEVICE RELATED THERETO
Document Type and Number:
WIPO Patent Application WO/2022/257871
Kind Code:
A1
Abstract:
An error detection method, which relates to the technical field of computers. The error detection method comprises: obtaining a first scheduling table of a first task, wherein the first scheduling table comprises a first test mode, the first test mode is used for detecting an error of a target logic circuit, the target logic circuit is a logic circuit for executing the first task, and the first task is used for being executed within a target fault detection time interval (FDTI); detecting whether the first test mode has been executed within the target FDTI; and if it is detected that the first test mode has not been executed within the target FDTI, executing the first test mode in the target FDTI according to the first scheduling table. The present application ensures that the same test mode is executed only once within the FDTI and is not executed repeatedly. The processor load imposed by a test mode in an STL is reduced and the time spent by the processor on error detection is reduced, and the working efficiency of the processor is thus improved.
Inventors:
CAO JIANLONG (CN)
FANG RUI (CN)
CHEN ZHAODI (CN)
FANG RUI (CN)
CHEN ZHAODI (CN)
Application Number:
PCT/CN2022/097095
Publication Date:
December 15, 2022
Filing Date:
June 06, 2022
Export Citation:
Assignee:
HUAWEI TECH CO LTD (CN)
International Classes:
G06F11/36
Foreign References:
| US20150161323A1 | 2015-06-11 | |||
| CN108491288A | 2018-09-04 | |||
| CN110192186A | 2019-08-30 | |||
| CN111078550A | 2020-04-28 | |||
| CN202110657038A | 2021-06-11 |
Attorney, Agent or Firm:
SHENPAT INTELLECTUAL PROPERTY AGENCY (CN)
Download PDF: