BACKGROUND

The present invention relates to antenna switching for alternatively connecting a transmitter and a receiver to a common antenna, and more particularly to a fast antenna switch, and still more particularly to a fast antenna switch having high tolerance for high transmission voltages and low loss characteristics while operating in millimeter wave equipment.

In wireless equipment using time division duplex operation between transmission and reception, the transmitter and receiver are connected to the antenna through an antenna switch. During transmission, the transmitter is connected to the antenna and the receiver is disconnected. It is important that the amount of transmission signal reaching the receiver be as little as possible in order to avoid damage. It is also important that noise from the transmitter reaching the receiver during receive operation be as little as possible. For this reason, when operation of the equipment transitions from transmission to reception, the transmitter is disconnected and the receiver is connected to the antenna. In addition to providing high isolation, the switch should have as low insertion loss as possible, both in the receive mode and in the transmit mode, in order not to degrade the transmitter efficiency and output power, or the receiver sensitivity. Furthermore, the switch must have sufficient linearity and must be able to tolerate the peak transmit power without damaging the devices.

Different technologies can be used to meet the stringent requirements of the antenna switch. In millimeter wave antenna array systems a high integration level is desired, and fully integrated antenna switches are needed. It is therefore important to further develop antenna switches in silicon processes.

In short range wireless systems, the symbol time can be reduced, and fast transitioning between receive and transmit modes is then needed to limit switching time overhead, putting new demands on the antenna switch. This is particularly true for short range pulsed radar systems, where after transmission the receiver must be quickly switched in. The switching transients must also be small so as not to desensitize the receiver.

Current switches do not address this aspect, and although capable of handling high signal frequencies, switch control can be slow. This is due to switch architectures not being optimized for switching speed, but rather for power handling. In these architectures some switching devices have high voltage amplitudes across their terminals during transmission. The devices then need to be fabricated as thick oxide devices and/or series stacked in order to tolerate the voltage. In addition or alternatively, floating (series) devices can be used. All of these conventional options are inherently slower than non-stacked thin-oxide devices connected to signal ground.

E. Adabi and A. M. Niknejad, “Analysis and Design of Transformer-Based mm-Wave Transmit/Receive Switches”, Hindawi Publishing Corporation, International Journal of Microwave Science and Technology, 2012 discloses an antenna switch using a transformer. During transmission mode, the switch device in the transmit branch has the full transmit voltage between its drain and source terminals, so it does not solve the problems described above.

There is therefore a need for antenna switching technology that addresses the above and/or related problems.

SUMMARY

It should be emphasized that the terms “comprises” and “comprising”, when used in this specification, are taken to specify the presence of stated features, integers, steps or components; but the use of these terms does not preclude the presence or addition of one or more other features, integers, steps, components or groups thereof.

Moreover, reference letters may be provided in some instances (e.g., in the claims and summary) to facilitate identification of various steps and/or elements. However, the use of reference letters is not intended to impute or suggest that the so-referenced steps and/or elements are to be performed or operated in any particular order.

In accordance with one aspect of the present invention, the foregoing and other objects are achieved in technology (e.g., methods, apparatuses, nontransitory computer readable storage media, program means) for switching a connection to an antenna between a transmitter and a receiver.

In one class of exemplary embodiments, an antenna switch has an antenna port, a transmitter path, a receiver path, and a switch control portion. The transmitter path includes a transmitter input port for receiving a transmitter output signal, a transformer, and a transmitter switch (e.g., a transistor switch). The transformer has a primary winding and a secondary winding, wherein the primary winding is connected to receive a signal from the transmitter input port, and wherein the secondary winding is connected at a first end to the antenna port. The transmitter switch is connected between a second end of the secondary winding of the transformer and signal ground. The receiver path includes a receiver port for supplying an antenna signal to a receiver, and a receiver switch connected between the receiver port and signal ground. In some but not necessarily all embodiments, the transmitter switch and the receiver switch are each fabricated as non-stacked thin oxide transistors (e.g., FD-SOI transistors).

The switch control portion has a switch control port for receiving a switch control signal. In some but not necessarily all embodiments, the switch control portion further includes one or more inverters as may be required (depending on the polarity of the switch control signal and on the types of receiver and transmitter switches being used) to cause the switch control portion to respond to the switch control signal by closing the transmitter switch and the receiver switch when the switch control signal indicates a transmitting state of operation and to open the transmitter switch and the receiver switch when the switch control signal indicates a receiving state of operation. The inverters may be cascaded inverters.

In some but not necessarily all embodiments, the transmitter switch is configured to have a low parasitic capacitance that substantially isolates the antenna port from the transmitter input port when the transmitter switch is in an off-state.

In some but not necessarily all embodiments, isolation between the antenna port and the transmitter input port when the transmitter switch is in an off-state is further enhanced in the transmitter path by also including an inductor connected in parallel with the transmitter switch.

In some, but not necessarily all embodiments, the inductor is configured to operate in parallel with parasitic capacitance of the transmitter switch in an off-state to resonate at a center frequency of operation when the switch control signal indicates the receiving state of operation.

For even more isolation, the antenna switch can further include one or more additional switches in the transmitter path. For example, a switch can be included in series with the primary winding.

In some embodiments, the antenna switch is configured to receive a single-ended signal from the transmitter input port. In such embodiments, the primary winding is connected between the transmitter input port and signal ground, as shown in Figure 1.

In some alternative embodiments, the antenna switch is configured to receive a differential signal from the transmitter input port. In such embodiments, the transmitter input port is a differential transmitter input port having first and second terminals, and the primary winding is connected between the first and second terminals of the transmitter input port.

In still further aspects, and in accordance with some but not necessarily all embodiments consistent with the invention, the antenna switch further includes a series inductor and a shunt capacitor. The series inductor is coupled between the antenna port and the receiver port. The shunt capacitor is connected in parallel with the receiver switch. In some but not necessarily all embodiments, at least part of the capacitance of the shunt capacitor is constituted as parasitic capacitance of the receiver switch when operating in an off-state.

In still further aspects, the antenna switch may be configured to operate at 30GHz.

Also, in some embodiments, the antenna switch is fabricated on a single integrated circuit.

And in some embodiments, the antenna switch is connected to an antenna element in an antenna array.

In another class of exemplary embodiments, an exemplary antenna switch consistent with the invention has an antenna port, a switch control circuit, a transmitter switching circuit, and a receiver switching circuit. The switch control circuit causes the antenna switch to selectively operate in one of two states: a transmitting state and a receiving state. The transmitter switching circuit has a transmitter port, a transformer, a high impedance circuit, and a transmitter switch. The transformer has a primary winding and a secondary winding, wherein the primary winding is connected to receive a signal from the transmitter port, and wherein the secondary winding is connected at a first end to the antenna port.

The high impedance circuit is connected between a second end of the secondary winding and signal ground, and is configured to cause a high isolation between the antenna and transmitter ports when it is engaged. For this purpose it is advantageous to have the high impedance circuit configured to be on the order of several times the antenna impedance.

The transmitter switch is connected in parallel with the high impedance circuit and is configured to connect the second end of the secondary winding to signal ground when the switch control circuit causes the antenna switch to operate in the transmitting state and to insert the high impedance circuit between the second end of the secondary winding and signal ground and thereby cause substantial isolation between the antenna port and the transmitter port when the switch control circuit causes the antenna switch to operate in the receiving state.

The receiver switching circuit includes a receiver port, a receiver signal path between the receiver port and the antenna port, and a receiver switch connected between the receiver port and signal ground. The receiver switch is configured to connect the receiver port to signal ground when the switch control circuit causes the antenna switch to operate in the transmitting state, and to disconnect the receiver port from signal ground when the switch control circuit causes the antenna switch to operate in the receiving state. In some but not necessarily all embodiments, the high impedance circuit includes an inductor connected in parallel with parasitic off-state capacitance of the transmitter switch, and the high impedance circuit is configured to resonate at a center frequency of operation.

In some alternative embodiments, the high impedance circuit includes a low parasitic capacitance that substantially isolates the antenna port from the transmitter input port when the transmitter switch is in an open-state.

In an aspect of some embodiments, the primary winding is connected between the transmitter port and signal ground.

In another aspect of some embodiments, the transmitter port is a differential transmitter input port having first and second terminals, and the primary winding is connected between the first and second terminals of the transmitter port.

In some embodiments, the transmitter switching circuit further comprises a transmitter impedance matching circuit configured to match an impedance between the transmitter port and an antenna connected to the antenna port.

In some embodiments, the receiver switching circuit further includes a receiver impedance matching circuit configured to match an impedance between a receiver connected to the receiver port and an antenna connected to the antenna port. In some but not necessarily all such embodiments, the receiver impedance matching circuit includes a series inductor coupled between the antenna port and the receiver port, and a shunt capacitor connected in parallel with the receiver switch. In some of such embodiments, at least part of the capacitance of the shunt capacitor is constituted as parasitic capacitance of the receiver switch when operating in an off- state.

In another aspect of some embodiments, the antenna switch includes at least one component that is functional in both the transmitter impedance matching circuit and the receiver impedance matching circuit.

In some embodiments, the receiver switch is a first transistor switch, the transmitter switch is a second transistor switch, and the first and second transistor switches are both operated in an ON state when the antenna switch is operated in the transmitting state, and are both operated in an OFF state when the antenna switch is operated in the receiving state.

Each of the first and second transistor switches can be, for example, a non-stacked thin oxide device.

In yet another aspect of embodiments consistent with the invention, an antenna switch is used in a communication device that includes an antenna switch consistent with the invention, a transmitter, a receiver, and a controller. The transmitter is coupled to the transmitter port of the antenna switch and is configured to generate a transmitter output signal. The receiver is coupled to the receiver port and is configured to receive an antenna signal. The controller is coupled to a control input port of the switch control circuit and is configured to generate a control signal having a first state for causing the antenna switch to operate in the transmitting state and having a second state for causing the antenna switch to operate in the receiving state. The controller includes circuitry configured to carry out any one or any combination of the various functions described above. Such circuitry could, for example, be entirely hard-wired circuitry (e.g., one or more Application Specific Integrated Circuits - “ASICs”). In alternative embodiments, the controller can comprise programmable circuitry, comprising a processor coupled to one or more memory devices (e.g., Random Access Memory, Magnetic Disc Drives, Optical Disk Drives, Read Only Memory, etc.) and to an interface that enables bidirectional communication with other elements of the radar device. The memory device(s) store program means (e.g., a set of processor instructions) configured to cause the processor of the controller to control other system elements so as to carry out any of the aspects described above. The memory device(s) may also store data (not shown) representing various constant and variable parameters as may be needed by the processor and/or as may be generated when carrying out its functions such as those specified by the program means.

In some but not necessarily all embodiments, the communication device is a radar device.

In some but not necessarily all embodiments, the communication device is a mm-Wave communication device.

BRIEF DESCRIPTION OF THE DRAWINGS

The objects and advantages of the invention will be understood by reading the following detailed description in conjunction with the drawings in which:

Figure 1 is a schematic diagram of an exemplary embodiment consistent with the invention.

Figure 2 is a set of graphs showing the RX-mode transfer parameters.

Figure 3 is a set of graphs depicting the transfer parameters of the exemplary embodiment when operating in TX mode.

Figure 4 is a set of graphs showing the results of a simulation of an embodiment consistent with Figure 1.

Figure 5 is a block diagram of an exemplary antenna switch consistent with the invention. Figure 6 is a block diagram of a radar device that includes an antenna switch consistent with herein-described embodiments.

DETAILED DESCRIPTION

The various features of the invention will now be described with reference to the figures, in which like parts are identified with the same reference characters.

The various aspects of the invention will now be described in greater detail in connection with a number of exemplary embodiments. To facilitate an understanding of the invention, many aspects of the invention are described in terms of sequences of actions to be performed by elements of a computer system or other hardware capable of executing programmed instructions. It will be recognized that in each of the embodiments, the various actions could be performed by specialized circuits (e.g., analog and/or discrete logic gates interconnected to perform a specialized function), by one or more processors programmed with a suitable set of instructions, or by a combination of both. The term “circuitry configured to” perform one or more described actions is used herein to refer to any such embodiment (i.e., one or more specialized circuits alone, one or more programmed processors, or any combination of these). Moreover, the invention can additionally be considered to be embodied entirely within any form of nontransitory computer readable carrier, such as solid-state memory, magnetic disk, or optical disk containing an appropriate set of computer instructions that would cause a processor to carry out the techniques described herein. Thus, the various aspects of the invention may be embodied in many different forms, and all such forms are contemplated to be within the scope of the invention. For each of the various aspects of the invention, any such form of embodiments as described above may be referred to herein as “logic configured to” perform a described action, or alternatively as “logic that” performs a described action.

An aspect of the herein-described technology involves an antenna switch architecture that achieves high switching speed without sacrificing performance in terms of power handling or losses. Due to its high switching speed it is suitable for use in short range radar and communication applications.

In an aspect of inventive embodiments, the architecture employs at least two switching devices, both connected to signal ground and both being on (closed) during transmission. This results in there not being any large switching device terminal voltages, so non-stacked thin oxide transistors can be used, resulting in high switching speed and low charge induced transients during switching. An example of a non-stacked thin oxide device is a fully depleted silicon-on- insulator (FD-SOI), also known as an ultra-thin or extremely thin sili con-on-insulator (ET-SOI) device. Simulations of an exemplary embodiment involving 22nm FD-SOI technology have found that a 30GHz switch can be turned on or off in less than a nanosecond.

In another aspect of some inventive embodiments, a transformer is used in the transmitter (TX) path. A switch is placed in series with the transformer output winding, to be activated during transmission. By making the switch large enough, both the TX signal voltage over the switch and the losses in the TX mode are minimized. A thin oxide device having a very short channel length can advantageously be used, achieving low on-state resistance and off-state capacitance.

In another aspect of some but not necessarily all embodiments, the influence of off-state capacitance can be further suppressed by connecting an inductor in parallel with the switch, resonating at the center frequency of operation.

In another aspect of some but not necessarily all embodiments the receive path has a series inductor and a shunt capacitor and a switching transistor at the low noise amplifier port.

More aspects of inventive embodiments will be described with reference to the figures.

Figure 1 is a schematic diagram of an exemplary embodiment consistent with the invention. An antenna switch 100 has an antenna port 101, a transmitter path, a receiver path, and a switch control portion 109.

The transmitter path includes a transmitter input port 103 for receiving a transmitter output signal, a transformer 105, and a transmitter switch M2 (e.g., a transistor switch).

The transformer 105 has a primary winding L3 and a secondary winding L2, wherein the primary winding L3 is connected to receive a signal from the transmitter input port 103, and wherein the secondary winding L2 is connected at a first end to the antenna port 101. The transmitter switch M2 is connected between a second end of the secondary winding (L2) of the transformer (105) and signal ground.

The receiver path includes a receiver port 107 for supplying an antenna signal to a receiver, and a receiver switch Ml connected between the receiver port 107 and signal ground.

In some but not necessarily all embodiments, the transmitter switch M2 and the receiver switch Ml are each fabricated as non-stacked thin oxide transistors (e.g., FD-SOI transistors).

The switch control portion 109 has a switch control port 109 for receiving a switch control signal. In some but not necessarily all embodiments, the switch control portion further includes one or more inverters Bl, B2 as may be required (depending on the polarity of the switch control signal and on the types of receiver and transmitter switches Ml, M2 being used) to cause the switch control portion 109 to respond to the switch control signal by closing the transmitter switch M2 and the receiver switch Ml when the switch control signal indicates a transmitting state of operation and to open the transmitter switch M2 and the receiver switch Ml when the switch control signal indicates a receiving state of operation. The inverters Bl, B2 may be cascaded inverters.

In some but not necessarily all embodiments, the transmitter switch M2 is configured to have a low parasitic capacitance that substantially isolates the antenna port 101 from the transmitter input port 103 when the transmitter switch M2 is in an off-state.

In some but not necessarily all embodiments, isolation between the antenna port 101 and the transmitter input port 103 when the transmitter switch M2 is in an off-state is further enhanced in the transmitter path by also including an inductor L4 connected in parallel with the transmitter switch M2. In some, but not necessarily all embodiments, the inductor L4 is configured to operate in parallel with parasitic capacitance of the transmitter switch M2 in an off-state to resonate at a center frequency of operation when the switch control signal indicates the receiving state of operation.

For even more isolation, the antenna switch 100 can further include one or more additional switches in the transmitter path. For example, a switch can be included in series with the primary winding L3.

In some embodiments, the antenna switch 100 is configured to receive a single-ended signal from the transmitter input port 103. In such embodiments, the primary winding L3 is connected between the transmitter input port 103 and signal ground, as shown in Figure 1.

In some alternative embodiments, the antenna switch 100 is configured to receive a differential signal from the transmitter input port 103. In such embodiments, the transmitter input port 103 is a differential transmitter input port having first and second terminals, and the primary winding L3 is connected between the first and second terminals of the transmitter input port 103.

In still further aspects, and in accordance with some but not necessarily all embodiments consistent with the invention, the antenna switch 100 further includes a series inductor LI and a shunt capacitor Cl. The series inductor LI is coupled between the antenna port 101 and the receiver port 107. The shunt capacitor Cl is connected in parallel with the receiver switch ML In some but not necessarily all embodiments, at least part of the capacitance of the shunt capacitor Cl is constituted as parasitic capacitance of the receiver switch Ml when operating in an off- state.

In still further aspects, the antenna switch 100 may be configured to operate at 30GHz. Also, in some embodiments, the antenna switch 100 is fabricated on a single integrated circuit.

And in some embodiments, the antenna switch 100 is connected to an antenna element in an antenna array.

The circuit according to Figure 1 was simulated in a 22nm FDSOI CMOS design-kit. The following parameters were used:

• LI : 260pH, Rp=lkQ (Q=20 at 30GHz)

• L2, L3 and L4: 300pH, Rp=1.5kQ, coupling between L2 and L3 with k=0.9

• Cl: lOfF

• C2: lOOfF

• C3:120fF

• Ml and M2: lvtnfet_rf, 2.4um/20nm, Multiplier=100, bulk and gate connected together

• B1 and B2: Two cascaded inverters, transistors lvtnfet rf and lvtpfet rf, size 2.4um/20nm. The first inverter has M=1 for nmos and M=4 for pmos, the second inverter has M=5 for both nmos and pmos. The second stage has a lpF capacitor to signal ground at its output to provide low impedance at RF, and to slow down the transitions thereby reducing spikes at the receiver port.

• Supply voltage: 800 mV

The S-parameters were simulated for the two modes, RX and TX. The modes were selected by connecting the inputs of B1 and B2 to ground or supply. Figure 2 is a set of graphs showing the RX-mode transfer parameters. Curve 201 is a graph of S21 dB20; curve 203 is a graph of S31 dB20; and curve 205 is a graph of S32 dB20. It can be seen that the loss from antenna to RX input is just 0.7dB at the targeted operating frequency of 30GHz. At the same time, the transmit port is isolated by about 26dB from the antenna and RX ports.

Figure 3 is a set of graphs depicting the transfer parameters of the exemplary embodiment when operating in TX mode. Curve 301 is a graph of S13 dB20; curve 303 is a graph of S23 dB20; and curve 305 is a graph of S12 dB20. As can be seen from these graphs, the loss from transmitter to antenna is about 0.9dB at 30GHz, and the receive port is isolated by more than 30dB.

It can be noted that if the 26dB isolation in RX mode would not be sufficient to suppress the TX noise, or if high isolation is needed over more bandwidth, additional switches may be added in the TX branch. For instance, a switch can be used in series with the primary winding L3, and configured to be on during transmission. For other additional switch placements, the switch will be off during transmission, and these will then have to tolerate the full TX voltage, and will therefore need stacked devices, which are slower than non-stacked. These switches can then be used to increase the dynamic range when the switching can be allowed more time, for example, when the transmit pulses are longer, at long distances. Since receiver sensitivity is most critical for long distance measurements, this is a favorable option.

A transient simulation was also performed on the arrangement of Figure 1 to evaluate the behavior for short TX pulses. Figure 4 is a set of graphs showing the results of this simulation. The top trace (curve 401 corresponding to VT(*/net013*) is the transmitted pulse, in this case with about 500mV amplitude and 4.5ns duration. The next trace (curve 403, corresponding to VT(*/net019*) is the antenna port, resembling the TX signal, with no significant difference except for a slight attenuation. The next trace (curve 405, corresponding to VT(*/net3*) is the RX port, which should have as low a signal level as possible in order not to saturate the receiver. As can be seen, the TX signal is reduced to about 14mV, and the switching spikes are below that level. The last trace (curve 407, corresponding to VT(*/net017*) is the switch control signal, and as can be seen the switching spikes at the RX port coincide with the flanks of that. As can further be seen the switching transients last less than 0.5ns.

Additional aspects of inventive embodiments will now be discussed with reference to Figure 5, which is a block diagram of an exemplary antenna switch 500 consistent with the invention. The antenna switch 500 has an antenna port 501, a switch control circuit 503, a transmitter switching circuit 505, and a receiver switching circuit 515. The switch control circuit 503 causes the antenna switch 500 to selectively operate in one of two states: a transmitting state and a receiving state.

The transmitter switching circuit 505 has a transmitter port 507, a transformer 509, a high impedance circuit 511, and a transmitter switch 513. The transformer 509 has a primary winding L3 and a secondary winding L2, wherein the primary winding L3 is connected to receive a signal from the transmitter port 507, and wherein the secondary winding L2 is connected at a first end to the antenna port 501.

The high impedance circuit 511 is connected between a second end of the secondary winding L2 and signal ground, and is configured to cause a high isolation between the antenna and transmitter ports 501, 507 when it is engaged. For this purpose it is advantageous to have the high impedance circuit 511 configured to be on the order of several times the antenna impedance.

The transmitter switch 513 is connected in parallel with the high impedance circuit 511 and is configured to connect the second end of the secondary winding L2 to signal ground when the switch control circuit 503 causes the antenna switch 500 to operate in the transmitting state and to insert the high impedance circuit 511 between the second end of the secondary winding L2 and signal ground and thereby cause substantial isolation between the antenna port 501 and the transmitter port 507 when the switch control circuit 503 causes the antenna switch 500 to operate in the receiving state.

The receiver switching circuit 515 includes a receiver port 517, a receiver signal path 519 between the receiver port 517 and the antenna port 501, and a receiver switch 521 connected between the receiver port 517 and signal ground. The receiver switch 521 is configured to connect the receiver port 517 to signal ground when the switch control circuit 503 causes the antenna switch 500 to operate in the transmitting state, and to disconnect the receiver port 517 from signal ground when the switch control circuit 503 causes the antenna switch 500 to operate in the receiving state.

In some but not necessarily all embodiments, the high impedance circuit 511 includes an inductor connected in parallel with parasitic off-state capacitance of the transmitter switch 513, and the high impedance circuit 511 is configured to resonate at a center frequency of operation.

In some alternative embodiments, the high impedance circuit 511 includes a low parasitic capacitance that substantially isolates the antenna port 501 from the transmitter input port 507 when the transmitter switch 513 is in an open-state.

In an aspect of some embodiments, the primary winding L3 is connected between the transmitter port 507 and signal ground.

In another aspect of some embodiments, the transmitter port 507 is a differential transmitter input port having first and second terminals, and the primary winding L3 is connected between the first and second terminals of the transmitter port 507.

In some embodiments, the transmitter switching circuit 505 further comprises a transmitter impedance matching circuit 523 configured to match an impedance between the transmitter port 507 and an antenna connected to the antenna port 501.

In some embodiments, the receiver switching circuit 515 further includes a receiver impedance matching circuit 525 configured to match an impedance between a receiver connected to the receiver port and an antenna connected to the antenna port 501. In some but not necessarily all such embodiments, the receiver impedance matching circuit 525 includes a series inductor LI coupled between the antenna port 501 and the receiver port 517, and a shunt capacitor Cl connected in parallel with the receiver switch 521. In some of such embodiments, at least part of the capacitance of the shunt capacitor Cl is constituted as parasitic capacitance of the receiver switch 521 when operating in an off-state.

In another aspect of some embodiments, the antenna switch 500 includes at least one component 527 that is functional in both the transmitter impedance matching circuit 523 and the receiver impedance matching circuit 525.

In some embodiments, the receiver switch 521 is a first transistor switch Ml, the transmitter switch 513 is a second transistor switch M2, and the first and second transistor switches Ml, M2 are both operated in an ON state when the antenna switch 500 is operated in the transmitting state, and are both operated in an OFF state when the antenna switch 500 is operated in the receiving state.

Each of the first and second transistor switches Ml, M2 can be, for example, a non- stacked thin oxide device.

Because of its very fast switching characteristics, embodiments of an antenna switch consistent with any of the above-described embodiments are very well suited to radar applications in which switching between transmission of a radar signal and reception of the signal echoes puts a very high demand on the equipment. To illustrate this point, reference is made to Figure 6, which is a block diagram of a radar device 600 that includes an antenna switch 100, 500 such as those described above. The radar device 600 also includes a transmitter 601, a receiver 603, and a controller 605. The transmitter 601 is coupled to the transmitter port 103, 507 of the antenna switch 100, 500 and is configured to generate a mm-Wave transmitter output signal.

The receiver 603 is coupled to the receiver port 107, 517 and is configured to receive a mm-Wave antenna signal.

The controller 605 coupled to a control input port 109, 529 of the switch control circuit 109, 503 and is configured to generate a control signal having a first state for causing the antenna switch 100, 500 to operate in the transmitting state and having a second state for causing the antenna switch 100, 500 to operate in the receiving state. The controller 605 includes circuitry configured to carry out any one or any combination of the various functions described above. Such circuitry could, for example, be entirely hard- wired circuitry (e.g., one or more Application Specific Integrated Circuits - “ASICs”). In alternative embodiments, the controller 605 can comprise programmable circuitry, comprising a processor coupled to one or more memory devices (e.g., Random Access Memory, Magnetic Disc Drives, Optical Disk Drives, Read Only Memory, etc.) and to an interface that enables bidirectional communication with other elements of the radar device 600. The memory device(s) store program means (e.g., a set of processor instructions) configured to cause the processor of the controller 605 to control other system elements so as to carry out any of the aspects described above. The memory device(s) may also store data (not shown) representing various constant and variable parameters as may be needed by the processor and/or as may be generated when carrying out its functions such as those specified by the program means.

As will be understood from the above, various embodiments provide a fast antenna switch for short range communication and radar. The antenna switch uses switching devices connected to signal ground, all being operated in an on-state during transmission. This enables single thin oxide devices to be used as the switching devices. A transformer is used in the transmit branch of the antenna switch to connect the transmit port to the antenna port, with a switching device in series with the output winding of the transformer. In the receive branch, a series inductor is used, with a shunt switch device and a parallel capacitance at the receive port.

The antenna switch may be extended in some embodiments with additional switches in the transmit branch. For example, a switch can be provided in series with the input winding of the transformer, with similar properties as the one in series with the output winding. Using other switch locations will not be as fast as the core switches of the exemplary embodiments discussed above, but may be used to improve the receiver sensitivity when switching time is less critical and high sensitivity is needed (e.g., for detecting targets or communicating at long range).

In other alternatives of embodiments consistent with the invention, other types of switches can be used in place of transistor switches. For example, microelectromechanical switches (MEMs) or diodes can be used instead of transistor switches.

Embodiments consistent with the invention provide a number of advantages over conventional technology, including but not limited to:

• Short switching transition time

• Low switching transients

• Simple structure

• Application in short range radar and communication

• Full integration • Can be extended with reconfigurable switching devices The invention has been described with reference to particular embodiments. However, it will be readily apparent to those skilled in the art that it is possible to embody the invention in specific forms other than those of the embodiment described above. Thus, the described embodiments are merely illustrative and should not be considered restrictive in any way. The scope of the invention is further illustrated by the appended claims, rather than only by the preceding description, and all variations and equivalents which fall within the range of the claims are intended to be embraced therein.