Title of Invention: Fast LCR Meter with Sub-balancing

Technical Field The current invention relates to instruments for impedance measuring in a wide frequency range.

Background Art The main parameters of an LCR meter are accuracy and speed of measurements. The rate of measurements is essential if the LCR meter is used as part of an impedance analyzer or in production. The impedance measurement is based on measuring voltage drops across a range resistor with known impedance and a device under test (DUT) placed in series. The impedance of the DUT is calculated by knowing the current through and voltage drop of the DUT. In this case, the leading cause of an error [Fig. 1] is a leakage current through a leakage impedance between a middle point of the DUT and the range resistor to the ground. The leakage current is the reason for the non-equality of the currents through the range resistor and the DUT. To decrease the leakage current, different methods are used. One of them is a guard method, which helps to decrease voltage between the middle point and the shield in a cable to the DUT from the LCR meter’s low potential (LP) terminal to the DUT by applying a voltage to the guard through a voltage follower. This method is used in Digital Impedance Meter ESI Model 251 “A History of Impedance Measurements by Henry P. Hall “ p.49. Another method is an auto-balancing bridge by the trans-impedance amplifier (TIA). This method is used in the Digital Impedance Meter GR Type 1685-A “A History of Impedance Measurements by Henry P. Hall” p.49. Both these methods have instant action for balancing, but they have a low gain at high frequencies and, therefore, low common voltage suppression between the middle point and the cable shield. Also, they may have stability problems. LCR meters with modem-type auto-balancing bridges have good balancing accuracy at high frequencies, as in Hewlett Packard 4271 A LCR meter “A History of Impedance Measurements by Henry P. Hall” p.49. But they include low-speed integrators that need a few periods of signal frequency for settling time and, for this reason, take long measurement time at low and medium frequencies. Also, they are expensive. A digital version of modem-type autobalancing bridge exists in US Patent 7,616,008 B1 Rayman et al. (2009) but has the same flaw as the analog version, low speed at low and medium frequencies. Some other digital methods exist, like in US Patent 10,013,015 B2 Ida et al. (2018), CN110320410A Fajie et al. (2019), “A Novel Fast Balance Technique for the Digital AC Bridge” Zhang et al. (1998). But all of them need at least two voltage measurements and at least two periods of signal frequency for balancing.

Summary of Invention A trans-impedance amplifier (TIA) provides an analog method for fast balancing at a low cost. The TIA has instant balancing at all frequencies. But the TIA has a low gain at high frequencies. As a result, a significant residual unbalanced voltage exists in the middle point between the DUT and the range resistor at high frequencies. The present invention uses the sub-balancing method to remove this residual unbalanced voltage. The sub-balancing method comprises measuring the unbalanced voltage and applying some voltage with inverted polarity from an additional digital-to-analog converter (DAC) to the non-inverting input of the TIA. It is a fast, non-iterative method of increasing accuracy. The LCR meter with the sub-balancing method needs only one measurement of voltages at high frequencies for balancing and has instant balancing at low and medium frequencies.

Technical Problem Some LCR meters use for balancing, to exclude current through leakage impedance, a trans-impedance amplifier (TIA). It is a low-cost solution for impedance measurement. But this solution has low accuracy at high frequencies because the TIAs have low gain at high frequencies.

Solution to Problem The current invention decides the problem of low accuracy TIA-based LCR meters by measuring the unbalanced voltage on the inverting input of the TIA and applying it to the non-inverting input of the TIA with opposite polarity by an additional voltage source. Thus, the accuracy of setting the output voltage of the TIA, which creates compensating current through the range resistor for balancing, is not limited by a gain of the TIA.

Advantageous Effects of Invention TIA-based LCR meters have the best measurement time at infra-low and low frequencies. The measurement time of TIA-based LCR meters is limited only by one whole period of measurement frequency at these frequencies. The current invention extends their high impedance measuring accuracy to a wider frequency range. The hardware structure extends the frequency range even more by calibration voltage channels relatively each to others.

Brief Description of Drawings

Fig. 1 [Fig. 1] shows the leading cause of inaccuracy in LCR meters.

Fig. 2 [Fig. 2] shows a method of leakage impedance measurement.

Fig. 3 [Fig. 3] shows a simplified diagram of the first embodiment of the present invention.

Fig. 4 [Fig. 4] shows an example of the input multiplexer’s voltages of the LCR meter for one signal period.

Fig. 5 [Fig. 5] shows the ADC1 input voltages for the first embodiment.

Fig. 6 [Fig. 6] shows the ADC1 input voltages for the first embodiment with more details.

Fig. 7 [Fig. 7] shows a low-pass anti-aliasing filter's gain and phase frequency responses.

Fig. 8 1 [Fig. 8] shows a block diagram of the first embodiment of the present invention.

Fig. 9 [Fig. 9] shows a block diagram of low-level processing for the first embodiment. Fig. 10 [Fig . 10] shows a flowchart of a low-level work process of the processor.

Reference Signs List

1002 first voltage source (VoltSrcI).

1004 high current (HC) terminal.

1006 high potential (HP) terminal.

1008 device under test (DUT).

1010 low potential (LP) terminal.

1012 middle point between the DUT and the range resistor.

1014 leakage impedance (Zleak).

1016 low current (LC) terminal.

1018 range resistor, set of reference resistors (Zrange).

1020 voltage on the second terminal of the range resistor (Vrr).

1022 second voltage source (VoltSrc2).

3002 output impedance of the first voltage source (Zoutl).

3004 impedance of series current limiting resistor (Zser_res).

3006 output impedance of the first voltage source’s buffer (Zbuffl).

3008 impedance of the cable wire between the high current terminal and the device under test (Zwirel ).

3010 capacitance of the cable between the HP terminal and the DUT (Ccablel).

3011 impedance of the cable wire between the LC terminal and the device under test (Zwire2).

3012 switch to connect the non-inverting input of the trans-impedance amplifier

(TIA) either to the ground or to the second voltage source.

3014 trans-impedance amplifier (TIA).

3016 voltage on the output of the second voltage source (Vsb).

3018 switch to connect the second terminal of the range resistor either to the output of the TIA or to the output of the second voltage source.

3020 output impedance of second voltage source buffer (Zbuff2).

8010 high potential voltage input buffer.

8012 low potential voltage input buffer.

8014 low current voltage input buffer.

8016 range resistor voltage input buffer. 8018 second voltage source voltage input buffer.

8024 first voltage source output buffer.

8026 output buffer of the second voltage source.

8028 first low pass filter (LPF1).

8030 input multiplexer.

8032 output buffer of the multiplexer.

8033 control interface of the multiplexer.

8034 second low pass filter (LPF2).

8036 first digital-to-analog converter (DAC) (DAC1).

8038 first analog-to-digital converter (ADC) (ADC1).

8040 second DAC (DAC2).

8042 digital signal to the first DAC.

8044 digital signal from the first ADC.

8046 digital signal to the second DAC.

8048 processor.

9002 first set of memory buffers.

9004 second set of memory buffers.

9006 direct Fourier transform (DFT) block.

9008 cosine multiplier.

9010 sine multiplier.

9012 demultiplexer and accumulators.

9014 software direct digital synthesizer (DDS).

9016 controlling and processing core.

10002 common direct memory access (DMA) flowchart.

10004 direct Fourier transform processing for ADC data flowchart.

10006 DMA data preparation for DACs and reference buffers flowchart.

Description of Embodiments [Fig. 3] shows a simplified diagram of the present invention. The present invention uses the trans-impedance amplifier (TIA) to set voltage in the middle point between the DUT and the range resistor close to zero to minimize the leakage current. The TIA has good instant balancing for low and medium frequencies. But the TIA has a low gain at high frequencies and, as a result, a significant residual unbalanced voltage. [Math. 1] The impedance measurement is based on Ohm law:

Zdut = Vdut / Idut [Math. 2] In the ideal case, the currents through the DUT and range resistor are equal:

Idut = Irange But some residual unbalanced voltage VIp in the middle point between the DUT and the range resistor is present. [Math. 3] Therefore, a current through a leakage impedance Zleak also is present: lleak = VIp / Zleak The leakage current gives an error in the impedance measurement. The present invention removes the error in two ways. The first way is a sub-balancing method. The sub-balancing method is based on a property of an operational amplifier to have equal amplification for both inputs, inverting and non-inverting. To get the same output voltage, it does not matter to each input of the operational amplifier that the input voltage is applied. The only difference is the polarity of the input voltage. If the input voltage is applied to the inverting input, it must have the opposite polarity relative to the output voltage. If the input voltage is applied to the non-inverting input, it must have the same polarity relative to the output voltage. So, if measuring the voltage on the inverting input of the TIA, which is in steady mode, and applying the voltage with the same value but opposite polarity to the non-inverting input of the TIA, then the voltage on the inverting input will become close to zero. And the current through the leak impedance also will become close to zero. Applying the sub-balancing voltage changes the current through the DUT, the fixture, and the output impedance of the first voltage source. The new current through the DUT depends on the first voltage source's output impedance and the fixture's parasitic impedances. They are constant and may be measured on calibration time and saved to memory for use on measurement time. Knowing these impedances allows a more accurate calculation of the needed subbalancing voltage. The second voltage source 1022 and switch 3012 provide this sub-balancing voltage. For this operation, only one additional measurement of voltages is necessary. The second way is the compensation of the leakage current. The leakage current may be calculated if the voltage drop on the leakage impedance is known. [Math. 4] And the actual current through the DUT may be obtained:

Idut = Irange - lleak Since the leakage impedance for the used fixture is constant, it may be measured on calibration time and saved to memory for use on measurement time. [Fig. 2] shows the method of measuring the leakage impedance. The leakage impedance is high at low and medium frequencies, and the TIA has minor balancing errors. But sub-balancing, even in one step, takes time. In this case, only the leakage compensation is necessary. The leakage compensation especially is essential for infralow frequencies and very high DUT impedances when the sub-balancing alone is not enough to get high accuracy of measurements. The sub-balancing and the leakage compensation are both necessary at high frequencies, especially with a long cable to the fixture.

Embodiment 1 The first embodiment [Fig. 8] includes a processor 8048, which provides digital signals 8042 and 8046 to the first 1002 and the second 1022 voltage sources. The first embodiment also comprises DACs 8036 and 8040, low pass filters 8028 and 8034, and output buffers 8024 and 8026. The processor receives digital signal 8044 from an ADC 8038 and controls an analog multiplexer 8030. The output of the first voltage source 1002, through its output impedance 3002 [Fig. 3], is connected to the DUT 1008. The output impedance 3002 includes output impedance 3006 of a buffer 8024, a series resistor 3004, a wire impedance 3008, and a capacitance of cables 3010 between the HC 1004 and HP 1006 terminals of the LCR meter and the DUT 1008. One side of the DUT 1008 is connected to the HC terminal 1004 and the HP terminal 1006. Another side of the DUT 1008 is connected to the LP terminal 1010, the LC terminal 1016, and the first terminal of the range resistor 1018. The first embodiment includes a TIA 3014 with the inverting input connected to the LP terminal 1010. The non-inverting input of the TIA is connected through a switch 3012 either to the ground or the output of the second voltage source. The first terminal of the range resistor 1018 is connected to the LC terminal 1016. The second terminal of the range resistor 1018 is connected through a switch 3018 either to the output of the TIA or to the output of the second voltage source. Switch 3018 is necessary for the leakage impedance measurement. This measurement is done by applying voltage from the second voltage source to the second terminal of the range resistor and measuring voltages on the LP terminal, the HP terminal, and both terminals of the range resistor. The HP terminal 1006 is connected to input buffer 8010. The LP terminal 1010 is connected to input buffer 8012. The first terminal of the range resistor 1018 is connected to input buffer 8014. The second terminal of the range resistor 1018 is connected to input buffer 8016. The output of the second voltage source 1022 is connected to input buffer 8018. The outputs of the input buffers 8010, 8012, 8014, 8016, and 8018 are connected to the inputs of the multiplexer 8030. The output of the multiplexer 8030 through a buffer 8032 is connected to the ADC 8038.

Operation of the first embodiment The leakage impedance and the series impedances are measured during open/short calibration in the first embodiment [Fig. 2], [Fig. 3], and [Fig. 8], The first embodiment may also use the guard to decrease voltage between the middle point and the cable's shield. In this case, all equations are the same; the only difference is that the leakage impedance is higher.

Leakage Calibration and Compensation [Fig. 2] shows a method of measurement of the leakage impedance. The method includes: setting the open state of the fixture by removing a DUT; applying a predetermined voltage through a predetermined impedance of range resistor; measuring the voltage across the open fixture; eliminating the influence of the open fixture by setting the same voltage on the HP terminal as on the LP terminal and adjusting it in a predetermined number of iterations to get the closest values of these voltages to decrease the current through the open fixture; measuring the voltages across the leakage impedance and the range resistor; calculating the leakage impedance. To set necessary voltages on the HP terminal, use the method in equations 22 and 23 to calculate a value of the input signal of the first voltage source. For the leakage impedance measurement, switch 3018 must connect the second terminal of a range resistor to the second voltage source 1022. [Math. 5] The leakage impedance:

Zleak = VIp * Zrange I (Vic - Vrr)

All values are complex. While measuring the parameters of a DUT, the leakage impedance is used to calculate a leakage current and compensate for its influence by subtracting the current value through the leakage impedance from the current value through the range resistor (equations 12...14).

Calibration of Series Impedances [Fig. 3] shows a method of measurement of the series impedances, including the output impedance of the first 1002 voltage source and the impedance of the wire between the DUT and the low current terminal 3011. These impedances are necessary to calculate the precision sub-balancing voltage. These impedances are measured for the used fixture. Both open and short states of measurement circuitry are required to measure and calculate the series impedances. Both sets of all measured voltages, open and short, are saved and used for calculating the series impedances in the calibration process. [Math. 6] The current change of the first voltage source: dl = (Vlc_short - Vrr_short) I Zrange + Vlp_short I Zleak [Math. 7] The output impedance of the first voltage source:

Zoutl ™ (Vhp_open - Vhp_short) / dl [Math. 8] The impedance of the wire between the DUT and the LP terminal: Zwire2 = (Vlp_short - Vlc_short) I dl All values are complex.

Sub-balancing Method The first embodiment includes the TIA 3014, which performs instant analog auto-balancing. But the TIA has insufficient gain at high frequencies to get an auto-balancing voltage equal to almost zero. [Math. 9] The gain of the operational amplifier used as TIA: G_opamp = - Vrr / VIp [Math. 10] And input voltage

VIp = - Vrr / G_opamp strongly depends on the gain of the TIA G_opamp. This voltage is a residual unbalanced voltage. But if we apply to the non-inverting input of the TIA a voltage equal to the residual unbalanced voltage but with opposite polarity instead of zero voltage, the voltage on inverting input will become equal to almost zero. It is a “simplified sub-balancing.” [Math. 11] The more correct sub-balancing voltage:

Vsb = (Vrr - VIp) * (G_opamp + 1) / (G_opamp) ^A 2 It is the “moderate sub-balancing” method. The method considers increasing a current through the range resistor after applying a sub-balancing voltage. A more detailed description of “accurate sub-balancing” is lower.

The start conditions of the first embodiment [Fig. 8] are as follows: the first voltage source 1002 provides an excitation voltage; switch 3012 connects the non-inverting input of the TIA 3014 to the ground; switch 3018 connects the second terminal of the range resistor 1018 to the output of the TIA; the second voltage source 1022 provides a predetermined voltage Vsb 3016. The voltage of the second voltage source is equal to the electro-moving force (EMF) if no load is present. After all input voltages are measured, a needed sub-balancing voltage is calculated and applied to the non-inverting input of the TIA to get more accurate balancing (equations 12...23). [Math. 12] The current through the range resistor:

I range = (Vic - Vrr) / Zrange [Math. 13] The current through the leakage impedance: lleak = - VIp / Zleak [Math. 14] The current through the DUT :

Idut = Irange - lleak [Math. 15] The rough impedance of the DUT : Zdut = (Vhp - VIp) / Idut

0064 [Math. 16] The gain of the operational amplifier used as TIA:

G_opamp = - Vrr / VIp

0065 [Math. 17] The electro-moving force (EMF) of the first voltage source:

EMF1 = Vhp + Idut * Zoutl

0066 [Math. 18] The new current through the DUT after VIp = 0: ldut_New = EMF1 / (Zdut + Zoutl)

0067 [Math. 19] The new current through the range resistor for accurate balancing: lrange_New = ldut_New

0068 [Math. 20] The new voltage on the range resistor:

Vrr_New = - lrange_New * (Zwire2 + Zrange)

0069 [Math. 21] The EMF of the second voltage source, no load:

Vsb_New = Vrr_New I G_opamp

0070 [Math. 22] The correcting coefficient for EMF of the second voltage source:

CorrCoeff = Vsb_New I Vsb

0071 [Math. 23] The new value of the digital signal 8046 for the second voltage source:

S2_New = CorrCoeff * S2

All values are complex.

0072 Calculating a correcting coefficient (CorrCoeff) as the relation between new and old EMFs is the implicit replacement of the explicit calculation of the low pass filter (LPF) frequency response. [Fig. 7] shows an example of high-order LPF amplitude and phase frequency responses for an LCR meter with the maximal signal frequency of 1 MHz and the sampling frequency of 3Msps. The calculation of the CorrCoeff allows excluding the necessity of calibration of the LPFs with very steep slopes at high frequencies.

0073 After applying the new digital signal S2_New 8046 and connecting the noninverting input of the TIA to the second voltage source, the accurate DUT impedance can be measured. After measuring the voltages with the balanced conditions, repeat the calculation of the parameters of the DUT by using equations 12...15. Low-level Processing

0074 The first embodiment uses a structure with one ADC and a five-channel multiplexer to switch voltage channels for a lower cost. [Fig. 4] shows input voltages, and [Fig. 5] shows the voltages on the ADC input.

0075 Multiplexer’s channels produce commutation noise, and noisy time intervals after the multiplexer’s switching need to exclude from the ADC signal processing. [Fig. 6] shows noisy and proper time intervals.

0076 By the Nyquist theorem, the sampling frequency must be more than two times higher than the signal bandwidth. And to measure vector voltage by direct Fourier transform (DFT), at least one whole period of signal frequency is necessary. So, the minimum vector voltage measurement time is limited by one period of signal frequency and at least three ADC samples for every measured voltage. Therefore, all voltages must be measured simultaneously [Fig. 5], and at least three sample groups must be used. Equations 24...28 describe the condition for low and medium frequencies if minimum measurement time is needed.

0077 [Math. 24] A sample period:

Tsample = 1 I Fsample

0078 [Math. 25] A signal period:

Tsignal = 1 / Fsignal

0079 [Math. 26] A buffer time interval:

Tbuffer = Tsample * BufferSize

0080 [Math. 27] A sample group interval:

Tsmpl_gr = Tbuffer * Nchannels

0081 [Math. 28] A minimum measurement time:

Tmeas Minimum ~ Tsignal = M * Tsmpl gr (M > 3)

All values are complex.

0082 The BufferSize, the Nchannels, and the M are integer numbers. The BufferSize is the size of direct memory access (DMA) buffers, Nchannels is the number of voltage channels, and the M is the number of sample groups. 0083 [Fig. 9] shows the first embodiment’s signal processing with more details.

Processor 8048 performs low-level processing of instant digital values of input and output voltages and high-level processing of digital representations of these voltages to calculate results in controlling and processing core 9016.

0084 Low-level processing includes: a direct digital synthesizer 9014; first 9002 and second 9004 sets of memory buffers to store samples of input and output voltages, references’ values; multipliers for direct Fourier transform (DFT) 9008 and 9010; a demultiplexer and accumulators 9012 to separate input voltage samples from different voltage channels and accumulate them in the DFT process; interfaces to transfer digital signals S1 and S2 to DACs 8042 and 8046; an interface to transmit digital signal from the ADC 8038 to memory 9002 and 9004.

To speed up the processing, direct memory access (DMA) is used to transfer data from memory to DACs 8036 and 8040 and ADC 8038 to memory buffers 9002 and 9004.

0085 Flowcharts in [Fig. 10] show the data processing flow. First, data from ADC and reference data already filled in the previous DMA cycle are processed. These data are used for DFT. Second, data for the next DMA cycle are prepared. These data will be used for the DACs and the DFT. The reference data are filled with the DACs data to save time during the DFT processing.

0086 This processing is described for implementation in a processor but may also be implemented in microcontrollers, DSPs, FPGAs, ASICs, and other hardware.

Industrial Applicability

0087 The current invention may be used in any industry where impedance measurements are necessary. The current invention either decreases the cost of production impedance measuring instruments with the same accuracy and frequency range or increases accuracy and extends the frequency range of the instruments. Citation List

0088 Citation List follows:

Patent Literature

0089

U.S. Patents

Patent Number Kind Code Issue Date Patentee

10,013,015 B2 2018-07-03 Ida et al.

9,910,074 B2 2018-03-06 Lindell et al.

7,616,008 B1 2009-11-10 Rayman et al

U.S. Patent documents added by examiner Robert P Olejnikov

20210333348 A1 2021-10 Fortney; Houston

20200135441 A1 2020-04 Jones; Anthony Michael

20140348502 A1 2014-11 Miura; Tomoko

8547135 B1 2013-10 Yarlagadda; Archana

6028309 A 2000-02 Parrish; William J.

Foreign Patent Documents

Foreign Doc. Country Code Publication Date Patentee 11032041 OA CN 2019-10-11 Fajie et al.

Non-Patent Literature

0090

Zhang et al. A Novel Fast Balance Technique for the Digital AC Bridge (April 1998)

A History of Impedance Measurements by Henry P. Hall

Keysight E4980A Precision LCR Meter Datasheet (2021)

Keysight Impedance Measurement Handbook 6th Ed (2021)