Title:
FAULT TOLERANT SYSTEM
Document Type and Number:
WIPO Patent Application WO/2018/066124
Kind Code:
A1
Abstract:
This fault tolerant system is provided with three or more calculation devices (10) that acquire node information from nodes, wherein each calculation device (10) is provided with: an output signal generation unit (231) which generates an output signal; a majority circuit (26) which compares the output signals generated by the calculation devices and outputs a majority signal; a time code provision unit (22) which provides a time code that is shared by the calculation devices (10); a calculation unit (232) which performs a logical operation between the output signal generated by the host calculation device (10) and a bit pattern transformed from the time code, and outputs the operation result; a communication unit (21) which repeatedly receives operation results output by the calculation devices (10) other than the host calculation device (10); a first unupdated-state determination unit (27) which, if the value of a operation result received from a calculation device (10) other than the host calculation device (10) is equal to the value of the operation result previously received from that calculation device (10), determines that the output signal generated by that calculation device (10) has not yet been updated, and outputs a first unupdated-state signal; and a fault diagnostic unit (28) which performs a fault diagnosis of the three or more calculation devices (10) on the basis of said majority signal and said first unupdated-state signal.
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Inventors:
HAYAMA MICHIYA (JP)
Application Number:
PCT/JP2016/079943
Publication Date:
April 12, 2018
Filing Date:
October 07, 2016
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
G06F11/18
Domestic Patent References:
| WO2016067420A1 | 2016-05-06 |
Foreign References:
| JP2011028685A | 2011-02-10 | |||
| JP2008191924A | 2008-08-21 |
Attorney, Agent or Firm:
INABA, Tadahiko et al. (JP)
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