Title:
FEEDTHROUGH MULTILAYER CERAMIC CAPACITOR
Document Type and Number:
WIPO Patent Application WO/2024/004304
Kind Code:
A1
Abstract:
Provided is a feedthrough multilayer ceramic capacitor capable of avoiding proximity among a plurality of external electrodes to be arranged on a multilayer body while avoiding inconvenience in terms of manufacturing due to a reduction in size of the feedthrough multilayer ceramic capacitor. The feedthrough multilayer ceramic capacitor according to the present invention is provided with: a multilayer body which includes a plurality of stacked dielectric layers and a plurality of internal electrode layers each stacked on each dielectric layer and has a first main surface and a second main surface which oppose each other in the stack direction, a first side surface and a second side surface which oppose each other in a width direction orthogonal to the stack direction, and a first end surface and a second end surface which oppose each other in a length direction orthogonal to the stack direction and the width direction; a first internal electrode layer which is of the plurality of internal electrode layers and extends to the first end surface and the second end surface; a second internal electrode layer which is of the plurality of internal electrode layers and extends to the first side surface and the second side surface; a first external electrode which is arranged on the first end surface and is connected to the first internal electrode layer; a second external electrode which is arranged on the second end surface and is connected to the first internal electrode layer; a third external electrode which is arranged on the first side surface and is connected to the second internal electrode layer; and a fourth external electrode which is arranged on the second side surface and is connected to the second internal electrode layer. The first external electrode includes a first plated layer which is arranged on the first end surface, and a first strip electrode which is arranged on the first end surface and is arranged over a length shorter than the length of the first plated layer in the width direction, the second external electrode includes a second plated layer arranged on the second end surface, and a second strip electrode which is arranged on the second end surface and is arranged over a length shorter than the length of the second plated layer in the width direction, the third external electrode includes a third plated layer arranged on the first side surface, and a third strip electrode which is arranged on the first side surface and is arranged over a length shorter than the length of the third plated layer in the length direction, and the fourth external electrode includes a fourth plated layer arranged on the second side surface, and a fourth strip electrode which is arranged on the second side surface and is arranged over a length shorter than the length of the fourth plated layer in the length direction.
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Inventors:
SAWADA TAKASHI (JP)
USUI KAZUNORI (JP)
USUI KAZUNORI (JP)
Application Number:
PCT/JP2023/013546
Publication Date:
January 04, 2024
Filing Date:
March 31, 2023
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G4/30; H01G4/232
Foreign References:
| JP2005340371A | 2005-12-08 | |||
| JP2019212746A | 2019-12-12 | |||
| JP2013021300A | 2013-01-31 |
Attorney, Agent or Firm:
OKADA, Masahiro (JP)
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