Title:
FIN TRANSISTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2024/036676
Kind Code:
A1
Abstract:
The present disclosure provides a fin transistor structure and a manufacturing method therefor. The manufacturing method for a fin transistor structure comprises: providing a substrate, wherein a fin-shaped portion extends out of the top surface of the substrate; forming an isolation layer on the substrate, wherein the top surface of the isolation layer is lower than the top of the fin-shaped portion, so that the upper part of the fin-shaped portion is exposed above the isolation layer; and performing doping treatment on the upper part of the fin-shaped portion by using a diffusion process, so as to form at least one of a source region and a drain region in the upper part of the fin-shaped portion. The manufacturing method for a fin transistor structure can reduce or even eliminate the lattice defect of the fin transistor structure, and can improve the uniformity of the surface junction depth of a lightly doped source/drain region and improve the performance of a fin transistor.
Inventors:
LIU YOUMING (CN)
Application Number:
PCT/CN2022/118318
Publication Date:
February 22, 2024
Filing Date:
September 13, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L29/78; H01L21/336; H01L27/092; H01L29/08
Foreign References:
| CN108231885A | 2018-06-29 | |||
| CN107958873A | 2018-04-24 | |||
| US20160365432A1 | 2016-12-15 | |||
| US20160093740A1 | 2016-03-31 | |||
| CN109994547A | 2019-07-09 |
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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