FRAME SYNCHRONIZATION SYSTEM, FRAME SYNCHRONIZATION CIRCUIT, AND FRAME SYNCHRONIZATION METHOD

WIPO Patent Application WO/2021/215286

A1

A frame synchronization system (1) of the present invention comprises: a frame signal generating circuit (20) for generating a frame signal including a plurality of first frame signals including a first frame synchronization signal and a first payload signal, the first frame synchronization signal consisting of at least one symbol and having a mean amplitude set lower than the first payload signal; and a frame synchronization circuit (60) for receiving the frame signal via an optical transmission path (70), detecting the first frame synchronization signal from the received signal, dividing the received signal into frames of a symbol length of the first frame signal, adding the coordinate values on an IQ plane of the signals at the same symbol position of a plurality of the divided frames, over the plurality of frames, and determining that a symbol identified by size comparison in the frames on the basis of a result of the addition is the first frame synchronization signal. Even in the case of a high transmission rate, the probability of erroneous synchronization can be decreased, and the time before frame synchronization can be reduced.

ENDOH YASUYUKI (JP)
IIZUKA MASAAKI (JP)

PCT/JP2021/015135

October 28, 2021

April 12, 2021

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NTT ELECTRONICS CORP (JP)

H04L7/06; H04L27/34

WO2011125964A1

2011-10-13

JP2009218744A	2009-09-24
JPH11177546A	1999-07-02
JPH01261939A	1989-10-18
JP2016072942A	2016-05-09

YAMAKAWA, Shigeki et al. (JP)

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